2 SHARP X1 Emulator 'eX1'
3 SHARP X1twin Emulator 'eX1twin'
4 SHARP X1turbo Emulator 'eX1turbo'
6 Author : Takeda.Toshiya
14 #ifdef _X1TURBO_FEATURE
15 #include "io_wait_hireso.h"
19 void IOBUS::initialize()
21 prev_clock = vram_wait_index = 0;
27 memset(vram, 0, sizeof(vram));
28 vram_b = vram + 0x0000;
29 vram_r = vram + 0x4000;
30 vram_g = vram + 0x8000;
31 vram_mode = signal = false;
33 #ifdef _X1TURBO_FEATURE
34 memset(crtc_regs, 0, sizeof(crtc_regs));
40 void IOBUS::write_signal(int id, uint32 data, uint32 mask)
43 bool next = ((data & 0x20) != 0);
48 column40 = ((data & 0x40) != 0);
51 void IOBUS::write_io8w(uint32 addr, uint32 data, int* wait)
53 write_port8(addr, data, false, wait);
56 uint32 IOBUS::read_io8w(uint32 addr, int* wait)
58 return read_port8(addr, false, wait);
61 void IOBUS::write_dma_io8w(uint32 addr, uint32 data, int* wait)
63 write_port8(addr, data, true, wait);
66 uint32 IOBUS::read_dma_io8w(uint32 addr, int* wait)
68 return read_port8(addr, true, wait);
71 void IOBUS::write_port8(uint32 addr, uint32 data, bool is_dma, int* wait)
74 switch(addr & 0xc000) {
77 vram_b[addr & 0x3fff] = data;
78 vram_r[addr & 0x3fff] = data;
79 vram_g[addr & 0x3fff] = data;
80 *wait = get_vram_wait();
86 vram_r[addr & 0x3fff] = data;
87 vram_g[addr & 0x3fff] = data;
89 vram_b[addr & 0x3fff] = data;
91 *wait = get_vram_wait();
95 vram_b[addr & 0x3fff] = data;
96 vram_g[addr & 0x3fff] = data;
98 vram_r[addr & 0x3fff] = data;
100 *wait = get_vram_wait();
104 vram_b[addr & 0x3fff] = data;
105 vram_r[addr & 0x3fff] = data;
107 vram_g[addr & 0x3fff] = data;
109 *wait = get_vram_wait();
112 #ifdef _X1TURBO_FEATURE
114 int ofs = (data & 0x10) ? 0xc000 : 0;
115 vram_b = vram + 0x0000 + ofs;
116 vram_r = vram + 0x4000 + ofs;
117 vram_g = vram + 0x8000 + ofs;
118 } else if((addr & 0xff0f) == 0x1800) {
120 } else if((addr & 0xff0f) == 0x1801 && crtc_ch < 18) {
121 crtc_regs[crtc_ch] = data;
123 int ch_height = (crtc_regs[9] & 0x1f) + 1;
124 int vt_total = ((crtc_regs[4] & 0x7f) + 1) * ch_height + (crtc_regs[5] & 0x1f);
125 hireso = (vt_total > 400);
128 //printf("IO WRITE:%04x %02x CPU_PC=%04x\n", addr, data & 0xff, d_cpu->get_pc());
130 d_io->write_dma_io8(addr, data & 0xff);
132 d_io->write_io8(addr, data & 0xff);
134 switch(addr & 0xff00) {
135 case 0x1900: // sub cpu
146 uint32 IOBUS::read_port8(uint32 addr, bool is_dma, int* wait)
150 switch(addr & 0xc000) {
152 *wait = get_vram_wait();
153 return vram_b[addr & 0x3fff];
155 *wait = get_vram_wait();
156 return vram_r[addr & 0x3fff];
158 *wait = get_vram_wait();
159 return vram_g[addr & 0x3fff];
161 uint32 val = is_dma ? d_io->read_dma_io8(addr) : d_io->read_io8(addr);;
162 if((addr & 0xff0f) == 0x1a01) {
163 // hack: cpu detects vblank
164 if((vdisp & 0x80) && !(val & 0x80)) {
165 d_display->write_signal(SIG_DISPLAY_DETECT_VBLANK, 1, 1);
169 //printf("IO READ:%04x %02x CPU_PC=%04x\n", addr, val, d_cpu->get_pc());
170 switch(addr & 0xff00) {
171 case 0x1900: // sub cpu
183 int IOBUS::get_vram_wait()
185 vram_wait_index += passed_clock(prev_clock);
186 vram_wait_index %= 2112;
187 prev_clock = current_clock();
188 #ifdef _X1TURBO_FEATURE
189 int tmp_index = (vram_wait_index + d_cpu->get_extra_clock()) % 2112; // consider dma access
191 return column40 ? vram_wait_40_hireso[tmp_index] : vram_wait_80_hireso[tmp_index];
194 #define tmp_index vram_wait_index
196 return column40 ? vram_wait_40[tmp_index] : vram_wait_80[tmp_index];
199 #define STATE_VERSION 2
201 void IOBUS::save_state(FILEIO* state_fio)
203 state_fio->FputUint32(STATE_VERSION);
204 state_fio->FputInt32(this_device_id);
206 state_fio->Fwrite(vram, sizeof(vram), 1);
207 state_fio->FputBool(vram_mode);
208 state_fio->FputBool(signal);
209 state_fio->FputInt32((int)(vram_b - vram));
210 state_fio->FputInt32((int)(vram_r - vram));
211 state_fio->FputInt32((int)(vram_g - vram));
212 state_fio->FputUint8(vdisp);
213 state_fio->FputUint32(prev_clock);
214 state_fio->FputUint32(vram_wait_index);
215 state_fio->FputBool(column40);
216 #ifdef _X1TURBO_FEATURE
217 state_fio->Fwrite(crtc_regs, sizeof(crtc_regs), 1);
218 state_fio->FputInt32(crtc_ch);
219 state_fio->FputBool(hireso);
223 bool IOBUS::load_state(FILEIO* state_fio)
225 if(state_fio->FgetUint32() != STATE_VERSION) {
228 if(state_fio->FgetInt32() != this_device_id) {
231 state_fio->Fread(vram, sizeof(vram), 1);
232 vram_mode = state_fio->FgetBool();
233 signal = state_fio->FgetBool();
234 vram_b = vram + state_fio->FgetInt32();
235 vram_r = vram + state_fio->FgetInt32();
236 vram_g = vram + state_fio->FgetInt32();
237 vdisp = state_fio->FgetUint8();
238 prev_clock = state_fio->FgetUint32();
239 vram_wait_index = state_fio->FgetUint32();
240 column40 = state_fio->FgetBool();
241 #ifdef _X1TURBO_FEATURE
242 state_fio->Fread(crtc_regs, sizeof(crtc_regs), 1);
243 crtc_ch = state_fio->FgetInt32();
244 hireso = state_fio->FgetBool();