1 // Copyright 2018 The SwiftShader Authors. All Rights Reserved.
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
7 // http://www.apache.org/licenses/LICENSE-2.0
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
15 #ifndef sw_SpirvShader_hpp
16 #define sw_SpirvShader_hpp
18 #include "ShaderCore.hpp"
19 #include "SpirvID.hpp"
20 #include "System/Types.hpp"
21 #include "Vulkan/VkDebug.hpp"
22 #include "Vulkan/VkConfig.h"
23 #include "Device/Config.hpp"
25 #include <spirv/unified1/spirv.hpp>
32 #include <unordered_set>
33 #include <unordered_map>
35 #include <type_traits>
45 // Forward declarations.
49 // SIMD contains types that represent multiple scalars packed into a single
50 // vector data type. Types in the SIMD namespace provide a semantic hint
51 // that the data should be treated as a per-execution-lane scalar instead of
52 // a typical euclidean-style vector type.
55 // Width is the number of per-lane scalars packed into each SIMD vector.
56 static constexpr int Width = 4;
58 using Float = rr::Float4;
60 using UInt = rr::UInt4;
63 // Incrementally constructed complex bundle of rvalues
64 // Effectively a restricted vector, supporting only:
65 // - allocation to a (runtime-known) fixed size
66 // - in-place construction of elements
71 Intermediate(uint32_t size) : scalar(new rr::Value*[size]), size(size) {
72 memset(scalar, 0, sizeof(rr::Value*) * size);
80 void move(uint32_t i, RValue<SIMD::Float> &&scalar) { emplace(i, scalar.value); }
81 void move(uint32_t i, RValue<SIMD::Int> &&scalar) { emplace(i, scalar.value); }
82 void move(uint32_t i, RValue<SIMD::UInt> &&scalar) { emplace(i, scalar.value); }
84 void move(uint32_t i, const RValue<SIMD::Float> &scalar) { emplace(i, scalar.value); }
85 void move(uint32_t i, const RValue<SIMD::Int> &scalar) { emplace(i, scalar.value); }
86 void move(uint32_t i, const RValue<SIMD::UInt> &scalar) { emplace(i, scalar.value); }
88 // Value retrieval functions.
89 RValue<SIMD::Float> Float(uint32_t i) const
92 ASSERT(scalar[i] != nullptr);
93 return As<SIMD::Float>(scalar[i]); // TODO(b/128539387): RValue<SIMD::Float>(scalar)
96 RValue<SIMD::Int> Int(uint32_t i) const
99 ASSERT(scalar[i] != nullptr);
100 return As<SIMD::Int>(scalar[i]); // TODO(b/128539387): RValue<SIMD::Int>(scalar)
103 RValue<SIMD::UInt> UInt(uint32_t i) const
106 ASSERT(scalar[i] != nullptr);
107 return As<SIMD::UInt>(scalar[i]); // TODO(b/128539387): RValue<SIMD::UInt>(scalar)
110 // No copy/move construction or assignment
111 Intermediate(Intermediate const &) = delete;
112 Intermediate(Intermediate &&) = delete;
113 Intermediate & operator=(Intermediate const &) = delete;
114 Intermediate & operator=(Intermediate &&) = delete;
117 void emplace(uint32_t i, rr::Value *value)
120 ASSERT(scalar[i] == nullptr);
124 rr::Value **const scalar;
131 using InsnStore = std::vector<uint32_t>;
134 /* Pseudo-iterator over SPIRV instructions, designed to support range-based-for. */
137 InsnStore::const_iterator iter;
140 spv::Op opcode() const
142 return static_cast<spv::Op>(*iter & spv::OpCodeMask);
145 uint32_t wordCount() const
147 return *iter >> spv::WordCountShift;
150 uint32_t word(uint32_t n) const
152 ASSERT(n < wordCount());
156 uint32_t const * wordPointer(uint32_t n) const
158 ASSERT(n < wordCount());
162 bool operator!=(InsnIterator const &other) const
164 return iter != other.iter;
167 InsnIterator operator*() const
172 InsnIterator &operator++()
178 InsnIterator const operator++(int)
180 InsnIterator ret{*this};
185 InsnIterator(InsnIterator const &other) = default;
187 InsnIterator() = default;
189 explicit InsnIterator(InsnStore::const_iterator iter) : iter{iter}
194 /* range-based-for interface */
195 InsnIterator begin() const
197 return InsnIterator{insns.cbegin() + 5};
200 InsnIterator end() const
202 return InsnIterator{insns.cend()};
208 using ID = SpirvID<Type>;
210 spv::Op opcode() const { return definition.opcode(); }
212 InsnIterator definition;
213 spv::StorageClass storageClass = static_cast<spv::StorageClass>(-1);
214 uint32_t sizeInComponents = 0;
215 bool isBuiltInBlock = false;
217 // Inner element type for pointers, arrays, vectors and matrices.
224 using ID = SpirvID<Object>;
226 spv::Op opcode() const { return definition.opcode(); }
228 InsnIterator definition;
231 std::unique_ptr<uint32_t[]> constantValue = nullptr;
235 Unknown, /* for paranoia -- if we get left with an object in this state, the module was broken */
236 Variable, // TODO: Document
237 InterfaceVariable, // TODO: Document
238 Constant, // Values held by Object::constantValue
239 Value, // Values held by SpirvRoutine::intermediates
240 PhysicalPointer, // Pointer held by SpirvRoutine::physicalPointers
241 } kind = Kind::Unknown;
244 // Block is an interval of SPIR-V instructions, starting with the
245 // opening OpLabel, and ending with a termination instruction.
249 using ID = SpirvID<Block>;
250 using Set = std::unordered_set<ID>;
252 // Edge represents the graph edge between two blocks.
258 bool operator == (const Edge& other) const { return from == other.from && to == other.to; }
262 std::size_t operator()(const Edge& edge) const noexcept
264 return std::hash<uint32_t>()(edge.from.value() * 31 + edge.to.value());
270 Block(const Block& other) = default;
271 explicit Block(InsnIterator begin, InsnIterator end);
273 /* range-based-for interface */
274 inline InsnIterator begin() const { return begin_; }
275 inline InsnIterator end() const { return end_; }
279 Simple, // OpBranch or other simple terminator.
280 StructuredBranchConditional, // OpSelectionMerge + OpBranchConditional
281 UnstructuredBranchConditional, // OpBranchConditional
282 StructuredSwitch, // OpSelectionMerge + OpSwitch
283 UnstructuredSwitch, // OpSwitch
284 Loop, // OpLoopMerge + [OpBranchConditional | OpBranch]
288 InsnIterator mergeInstruction; // Merge instruction.
289 InsnIterator branchInstruction; //
290 ID mergeBlock; // Structured flow merge block.
291 ID continueTarget; // Loop continue block.
292 Set ins; // Blocks that branch into this block.
293 Set outs; // Blocks that this block branches to.
300 struct TypeOrObject {}; // Dummy struct to represent a Type or Object.
302 // TypeOrObjectID is an identifier that represents a Type or an Object,
303 // and supports implicit casting to and from Type::ID or Object::ID.
304 class TypeOrObjectID : public SpirvID<TypeOrObject>
307 using Hash = std::hash<SpirvID<TypeOrObject>>;
309 inline TypeOrObjectID(uint32_t id) : SpirvID(id) {}
310 inline TypeOrObjectID(Type::ID id) : SpirvID(id.value()) {}
311 inline TypeOrObjectID(Object::ID id) : SpirvID(id.value()) {}
312 inline operator Type::ID() const { return Type::ID(value()); }
313 inline operator Object::ID() const { return Object::ID(value()); }
316 int getSerialID() const
321 explicit SpirvShader(InsnStore const &insns);
325 bool EarlyFragmentTests : 1;
326 bool DepthReplacing : 1;
327 bool DepthGreater : 1;
329 bool DepthUnchanged : 1;
330 bool ContainsKill : 1;
331 bool NeedsCentroid : 1;
333 // Compute workgroup dimensions
334 int WorkgroupSizeX = 1, WorkgroupSizeY = 1, WorkgroupSizeZ = 1;
337 Modes const &getModes() const
342 enum AttribType : unsigned char
349 ATTRIBTYPE_LAST = ATTRIBTYPE_UINT
352 bool hasBuiltinInput(spv::BuiltIn b) const
354 return inputBuiltins.find(b) != inputBuiltins.end();
361 int32_t DescriptorSet;
363 spv::BuiltIn BuiltIn;
366 int32_t MatrixStride;
367 bool HasLocation : 1;
368 bool HasComponent : 1;
369 bool HasDescriptorSet : 1;
374 bool NoPerspective : 1;
376 bool BufferBlock : 1;
378 bool HasArrayStride : 1;
379 bool HasMatrixStride : 1;
382 : Location{-1}, Component{0}, DescriptorSet{-1}, Binding{-1},
383 BuiltIn{static_cast<spv::BuiltIn>(-1)},
384 Offset{-1}, ArrayStride{-1}, MatrixStride{-1},
385 HasLocation{false}, HasComponent{false},
386 HasDescriptorSet{false}, HasBinding{false},
387 HasBuiltIn{false}, Flat{false}, Centroid{false},
388 NoPerspective{false}, Block{false}, BufferBlock{false},
389 HasOffset{false}, HasArrayStride{false}, HasMatrixStride{false}
393 Decorations(Decorations const &) = default;
395 void Apply(Decorations const &src);
397 void Apply(spv::Decoration decoration, uint32_t arg);
400 std::unordered_map<TypeOrObjectID, Decorations, TypeOrObjectID::Hash> decorations;
401 std::unordered_map<Type::ID, std::vector<Decorations>> memberDecorations;
403 struct InterfaceComponent
408 bool NoPerspective : 1;
411 : Type{ATTRIBTYPE_UNUSED}, Flat{false}, Centroid{false}, NoPerspective{false}
416 struct BuiltinMapping
419 uint32_t FirstComponent;
420 uint32_t SizeInComponents;
423 std::vector<InterfaceComponent> inputs;
424 std::vector<InterfaceComponent> outputs;
426 void emitProlog(SpirvRoutine *routine) const;
427 void emit(SpirvRoutine *routine) const;
428 void emitEpilog(SpirvRoutine *routine) const;
430 using BuiltInHash = std::hash<std::underlying_type<spv::BuiltIn>::type>;
431 std::unordered_map<spv::BuiltIn, BuiltinMapping, BuiltInHash> inputBuiltins;
432 std::unordered_map<spv::BuiltIn, BuiltinMapping, BuiltInHash> outputBuiltins;
434 Type const &getType(Type::ID id) const
436 auto it = types.find(id);
437 ASSERT_MSG(it != types.end(), "Unknown type %d", id.value());
441 Object const &getObject(Object::ID id) const
443 auto it = defs.find(id);
444 ASSERT_MSG(it != defs.end(), "Unknown object %d", id.value());
448 Block const &getBlock(Block::ID id) const
450 auto it = blocks.find(id);
451 ASSERT_MSG(it != blocks.end(), "Unknown block %d", id.value());
457 static volatile int serialCounter;
459 HandleMap<Type> types;
460 HandleMap<Object> defs;
461 HandleMap<Block> blocks;
462 Block::ID mainBlockId; // Block of the entry point function.
464 void EmitBlock(SpirvRoutine *routine, Block const &block) const;
465 void EmitInstruction(SpirvRoutine *routine, InsnIterator insn) const;
467 // DeclareType creates a Type for the given OpTypeX instruction, storing
468 // it into the types map. It is called from the analysis pass (constructor).
469 void DeclareType(InsnIterator insn);
471 void ProcessExecutionMode(InsnIterator it);
473 uint32_t ComputeTypeSize(InsnIterator insn);
474 void ApplyDecorationsForId(Decorations *d, TypeOrObjectID id) const;
475 void ApplyDecorationsForIdMember(Decorations *d, Type::ID id, uint32_t member) const;
477 // Returns true if data in the given storage class is word-interleaved
478 // by each SIMD vector lane, otherwise data is linerally stored.
480 // A 'lane' is a component of a SIMD vector register.
481 // Given 4 consecutive loads/stores of 4 SIMD vector registers:
483 // "StorageInterleavedByLane":
485 // Ptr+0:Reg0.x | Ptr+1:Reg0.y | Ptr+2:Reg0.z | Ptr+3:Reg0.w
486 // --------------+--------------+--------------+--------------
487 // Ptr+4:Reg1.x | Ptr+5:Reg1.y | Ptr+6:Reg1.z | Ptr+7:Reg1.w
488 // --------------+--------------+--------------+--------------
489 // Ptr+8:Reg2.x | Ptr+9:Reg2.y | Ptr+a:Reg2.z | Ptr+b:Reg2.w
490 // --------------+--------------+--------------+--------------
491 // Ptr+c:Reg3.x | Ptr+d:Reg3.y | Ptr+e:Reg3.z | Ptr+f:Reg3.w
493 // Not "StorageInterleavedByLane":
495 // Ptr+0:Reg0.x | Ptr+0:Reg0.y | Ptr+0:Reg0.z | Ptr+0:Reg0.w
496 // --------------+--------------+--------------+--------------
497 // Ptr+1:Reg1.x | Ptr+1:Reg1.y | Ptr+1:Reg1.z | Ptr+1:Reg1.w
498 // --------------+--------------+--------------+--------------
499 // Ptr+2:Reg2.x | Ptr+2:Reg2.y | Ptr+2:Reg2.z | Ptr+2:Reg2.w
500 // --------------+--------------+--------------+--------------
501 // Ptr+3:Reg3.x | Ptr+3:Reg3.y | Ptr+3:Reg3.z | Ptr+3:Reg3.w
503 static bool IsStorageInterleavedByLane(spv::StorageClass storageClass);
506 int VisitInterfaceInner(Type::ID id, Decorations d, F f) const;
509 void VisitInterface(Object::ID id, F f) const;
511 uint32_t GetConstantInt(Object::ID id) const;
512 Object& CreateConstant(InsnIterator it);
514 void ProcessInterfaceVariable(Object &object);
516 SIMD::Int WalkExplicitLayoutAccessChain(Object::ID id, uint32_t numIndexes, uint32_t const *indexIds, SpirvRoutine *routine) const;
517 SIMD::Int WalkAccessChain(Object::ID id, uint32_t numIndexes, uint32_t const *indexIds, SpirvRoutine *routine) const;
518 uint32_t WalkLiteralAccessChain(Type::ID id, uint32_t numIndexes, uint32_t const *indexes) const;
520 // Emit pass instructions:
521 void EmitVariable(InsnIterator insn, SpirvRoutine *routine) const;
522 void EmitLoad(InsnIterator insn, SpirvRoutine *routine) const;
523 void EmitStore(InsnIterator insn, SpirvRoutine *routine) const;
524 void EmitAccessChain(InsnIterator insn, SpirvRoutine *routine) const;
525 void EmitCompositeConstruct(InsnIterator insn, SpirvRoutine *routine) const;
526 void EmitCompositeInsert(InsnIterator insn, SpirvRoutine *routine) const;
527 void EmitCompositeExtract(InsnIterator insn, SpirvRoutine *routine) const;
528 void EmitVectorShuffle(InsnIterator insn, SpirvRoutine *routine) const;
529 void EmitVectorTimesScalar(InsnIterator insn, SpirvRoutine *routine) const;
530 void EmitVectorExtractDynamic(InsnIterator insn, SpirvRoutine *routine) const;
531 void EmitVectorInsertDynamic(InsnIterator insn, SpirvRoutine *routine) const;
532 void EmitUnaryOp(InsnIterator insn, SpirvRoutine *routine) const;
533 void EmitBinaryOp(InsnIterator insn, SpirvRoutine *routine) const;
534 void EmitDot(InsnIterator insn, SpirvRoutine *routine) const;
535 void EmitSelect(InsnIterator insn, SpirvRoutine *routine) const;
536 void EmitExtendedInstruction(InsnIterator insn, SpirvRoutine *routine) const;
537 void EmitAny(InsnIterator insn, SpirvRoutine *routine) const;
538 void EmitAll(InsnIterator insn, SpirvRoutine *routine) const;
539 void EmitBranch(InsnIterator insn, SpirvRoutine *routine) const;
541 // OpcodeName() returns the name of the opcode op.
542 // If NDEBUG is defined, then OpcodeName() will only return the numerical code.
543 static std::string OpcodeName(spv::Op op);
544 static std::memory_order MemoryOrder(spv::MemorySemanticsMask memorySemantics);
546 // Helper as we often need to take dot products as part of doing other things.
547 SIMD::Float Dot(unsigned numComponents, GenericValue const & x, GenericValue const & y) const;
553 SpirvRoutine(vk::PipelineLayout const *pipelineLayout);
555 using Value = Array<SIMD::Float>;
557 vk::PipelineLayout const * const pipelineLayout;
559 std::unordered_map<SpirvShader::Object::ID, Value> lvalues;
561 std::unordered_map<SpirvShader::Object::ID, Intermediate> intermediates;
563 std::unordered_map<SpirvShader::Object::ID, Pointer<Byte> > physicalPointers;
565 Value inputs = Value{MAX_INTERFACE_COMPONENTS};
566 Value outputs = Value{MAX_INTERFACE_COMPONENTS};
568 SIMD::Int activeLaneMask = SIMD::Int(0xFFFFFFFF);
570 std::array<Pointer<Byte>, vk::MAX_BOUND_DESCRIPTOR_SETS> descriptorSets;
571 Pointer<Byte> pushConstants;
573 void createLvalue(SpirvShader::Object::ID id, uint32_t size)
575 lvalues.emplace(id, Value(size));
578 Intermediate& createIntermediate(SpirvShader::Object::ID id, uint32_t size)
580 auto it = intermediates.emplace(std::piecewise_construct,
581 std::forward_as_tuple(id),
582 std::forward_as_tuple(size));
583 return it.first->second;
586 Value& getValue(SpirvShader::Object::ID id)
588 auto it = lvalues.find(id);
589 ASSERT_MSG(it != lvalues.end(), "Unknown value %d", id.value());
593 Intermediate const& getIntermediate(SpirvShader::Object::ID id) const
595 auto it = intermediates.find(id);
596 ASSERT_MSG(it != intermediates.end(), "Unknown intermediate %d", id.value());
600 Pointer<Byte>& getPhysicalPointer(SpirvShader::Object::ID id)
602 auto it = physicalPointers.find(id);
603 ASSERT_MSG(it != physicalPointers.end(), "Unknown physical pointer %d", id.value());
610 // Generic wrapper over either per-lane intermediate value, or a constant.
611 // Constants are transparently widened to per-lane values in operator[].
612 // This is appropriate in most cases -- if we're not going to do something
613 // significantly different based on whether the value is uniform across lanes.
615 SpirvShader::Object const &obj;
616 Intermediate const *intermediate;
619 GenericValue(SpirvShader const *shader, SpirvRoutine const *routine, SpirvShader::Object::ID objId) :
620 obj(shader->getObject(objId)),
621 intermediate(obj.kind == SpirvShader::Object::Kind::Value ? &routine->getIntermediate(objId) : nullptr) {}
623 RValue<SIMD::Float> Float(uint32_t i) const
625 if (intermediate != nullptr)
627 return intermediate->Float(i);
629 auto constantValue = reinterpret_cast<float *>(obj.constantValue.get());
630 return RValue<SIMD::Float>(constantValue[i]);
633 RValue<SIMD::Int> Int(uint32_t i) const
635 return As<SIMD::Int>(Float(i));
638 RValue<SIMD::UInt> UInt(uint32_t i) const
640 return As<SIMD::UInt>(Float(i));
646 #endif // sw_SpirvShader_hpp