1 /**************************************************************************
3 * Copyright 2010 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
26 **************************************************************************/
29 #include "util/u_memory.h"
30 #include "util/u_math.h"
31 #include "tgsi/tgsi_parse.h"
32 #include "tgsi/tgsi_util.h"
33 #include "tgsi/tgsi_dump.h"
34 #include "tgsi/tgsi_strings.h"
35 #include "lp_bld_debug.h"
36 #include "lp_bld_tgsi.h"
42 * This is where we keep store the value of each channel of the IMM/TEMP/OUT
43 * register values, as we walk the shader.
45 struct analysis_context
47 struct lp_tgsi_info *info;
52 struct lp_tgsi_channel_info temp[32][4];
57 * Describe the specified channel of the src register.
60 analyse_src(struct analysis_context *ctx,
61 struct lp_tgsi_channel_info *chan_info,
62 const struct tgsi_src_register *src,
65 chan_info->file = TGSI_FILE_NULL;
66 if (!src->Indirect && !src->Absolute && !src->Negate) {
67 unsigned swizzle = tgsi_util_get_src_register_swizzle(src, chan);
68 if (src->File == TGSI_FILE_TEMPORARY) {
69 if (src->Index < Elements(ctx->temp)) {
70 *chan_info = ctx->temp[src->Index][swizzle];
73 chan_info->file = src->File;
74 if (src->File == TGSI_FILE_IMMEDIATE) {
75 assert(src->Index < Elements(ctx->imm));
76 if (src->Index < Elements(ctx->imm)) {
77 chan_info->u.value = ctx->imm[src->Index][swizzle];
80 chan_info->u.index = src->Index;
81 chan_info->swizzle = swizzle;
89 * Whether this register channel refers to a specific immediate value.
92 is_immediate(const struct lp_tgsi_channel_info *chan_info, float value)
94 return chan_info->file == TGSI_FILE_IMMEDIATE &&
95 chan_info->u.value == value;
100 * Analyse properties of tex instructions, in particular used
101 * to figure out if a texture is considered indirect.
102 * Not actually used by much except the tgsi dumping code.
105 analyse_tex(struct analysis_context *ctx,
106 const struct tgsi_full_instruction *inst,
107 enum lp_build_tex_modifier modifier)
109 struct lp_tgsi_info *info = ctx->info;
112 if (info->num_texs < Elements(info->tex)) {
113 struct lp_tgsi_texture_info *tex_info = &info->tex[info->num_texs];
114 boolean indirect = FALSE;
115 unsigned readmask = 0;
117 tex_info->target = inst->Texture.Texture;
118 switch (inst->Texture.Texture) {
119 case TGSI_TEXTURE_1D:
120 readmask = TGSI_WRITEMASK_X;
122 case TGSI_TEXTURE_1D_ARRAY:
123 case TGSI_TEXTURE_2D:
124 case TGSI_TEXTURE_RECT:
125 readmask = TGSI_WRITEMASK_XY;
127 case TGSI_TEXTURE_SHADOW1D:
128 case TGSI_TEXTURE_SHADOW1D_ARRAY:
129 case TGSI_TEXTURE_SHADOW2D:
130 case TGSI_TEXTURE_SHADOWRECT:
131 case TGSI_TEXTURE_2D_ARRAY:
132 case TGSI_TEXTURE_3D:
133 case TGSI_TEXTURE_CUBE:
134 readmask = TGSI_WRITEMASK_XYZ;
136 case TGSI_TEXTURE_SHADOW2D_ARRAY:
137 case TGSI_TEXTURE_SHADOWCUBE:
138 readmask = TGSI_WRITEMASK_XYZW;
145 if (modifier == LP_BLD_TEX_MODIFIER_EXPLICIT_DERIV) {
146 /* We don't track explicit derivatives, although we could */
148 tex_info->sampler_unit = inst->Src[3].Register.Index;
149 tex_info->texture_unit = inst->Src[3].Register.Index;
151 if (modifier == LP_BLD_TEX_MODIFIER_PROJECTED ||
152 modifier == LP_BLD_TEX_MODIFIER_LOD_BIAS ||
153 modifier == LP_BLD_TEX_MODIFIER_EXPLICIT_LOD) {
154 readmask |= TGSI_WRITEMASK_W;
156 tex_info->sampler_unit = inst->Src[1].Register.Index;
157 tex_info->texture_unit = inst->Src[1].Register.Index;
160 for (chan = 0; chan < 4; ++chan) {
161 struct lp_tgsi_channel_info *chan_info = &tex_info->coord[chan];
162 if (readmask & (1 << chan)) {
163 analyse_src(ctx, chan_info, &inst->Src[0].Register, chan);
164 if (chan_info->file != TGSI_FILE_INPUT) {
168 memset(chan_info, 0, sizeof *chan_info);
173 info->indirect_textures = TRUE;
178 info->indirect_textures = TRUE;
184 * Analyse properties of sample instructions, in particular used
185 * to figure out if a texture is considered indirect.
186 * Not actually used by much except the tgsi dumping code.
189 analyse_sample(struct analysis_context *ctx,
190 const struct tgsi_full_instruction *inst,
191 enum lp_build_tex_modifier modifier,
194 struct lp_tgsi_info *info = ctx->info;
197 if (info->num_texs < Elements(info->tex)) {
198 struct lp_tgsi_texture_info *tex_info = &info->tex[info->num_texs];
199 boolean indirect = FALSE;
200 boolean shadow = FALSE;
204 * We don't really get much information here, in particular not
205 * the target info, hence no useful writemask neither. Maybe should just
206 * forget the whole function.
208 readmask = TGSI_WRITEMASK_XYZW;
210 tex_info->texture_unit = inst->Src[1].Register.Index;
211 tex_info->sampler_unit = inst->Src[2].Register.Index;
213 if (modifier == LP_BLD_TEX_MODIFIER_EXPLICIT_DERIV ||
214 modifier == LP_BLD_TEX_MODIFIER_EXPLICIT_LOD ||
215 modifier == LP_BLD_TEX_MODIFIER_LOD_BIAS || shadow) {
216 /* We don't track insts with additional regs, although we could */
220 for (chan = 0; chan < 4; ++chan) {
221 struct lp_tgsi_channel_info *chan_info = &tex_info->coord[chan];
222 if (readmask & (1 << chan)) {
223 analyse_src(ctx, chan_info, &inst->Src[0].Register, chan);
224 if (chan_info->file != TGSI_FILE_INPUT) {
228 memset(chan_info, 0, sizeof *chan_info);
233 info->indirect_textures = TRUE;
238 info->indirect_textures = TRUE;
244 * Process an instruction, and update the register values accordingly.
247 analyse_instruction(struct analysis_context *ctx,
248 struct tgsi_full_instruction *inst)
250 struct lp_tgsi_info *info = ctx->info;
251 struct lp_tgsi_channel_info (*regs)[4];
257 for (i = 0; i < inst->Instruction.NumDstRegs; ++i) {
258 const struct tgsi_dst_register *dst = &inst->Dst[i].Register;
261 * Get the lp_tgsi_channel_info array corresponding to the destination
265 if (dst->File == TGSI_FILE_TEMPORARY) {
267 max_regs = Elements(ctx->temp);
268 } else if (dst->File == TGSI_FILE_OUTPUT) {
270 max_regs = Elements(info->output);
271 } else if (dst->File == TGSI_FILE_ADDRESS ||
272 dst->File == TGSI_FILE_PREDICATE) {
280 * Detect direct TEX instructions
283 switch (inst->Instruction.Opcode) {
284 case TGSI_OPCODE_TEX:
285 analyse_tex(ctx, inst, LP_BLD_TEX_MODIFIER_NONE);
287 case TGSI_OPCODE_TXD:
288 analyse_tex(ctx, inst, LP_BLD_TEX_MODIFIER_EXPLICIT_DERIV);
290 case TGSI_OPCODE_TXB:
291 analyse_tex(ctx, inst, LP_BLD_TEX_MODIFIER_LOD_BIAS);
293 case TGSI_OPCODE_TXL:
294 analyse_tex(ctx, inst, LP_BLD_TEX_MODIFIER_EXPLICIT_LOD);
296 case TGSI_OPCODE_TXP:
297 analyse_tex(ctx, inst, LP_BLD_TEX_MODIFIER_PROJECTED);
299 case TGSI_OPCODE_SAMPLE:
300 analyse_sample(ctx, inst, LP_BLD_TEX_MODIFIER_NONE, FALSE);
302 case TGSI_OPCODE_SAMPLE_C:
303 analyse_sample(ctx, inst, LP_BLD_TEX_MODIFIER_NONE, TRUE);
305 case TGSI_OPCODE_SAMPLE_C_LZ:
306 analyse_sample(ctx, inst, LP_BLD_TEX_MODIFIER_LOD_ZERO, TRUE);
308 case TGSI_OPCODE_SAMPLE_D:
309 analyse_sample(ctx, inst, LP_BLD_TEX_MODIFIER_EXPLICIT_DERIV, FALSE);
311 case TGSI_OPCODE_SAMPLE_B:
312 analyse_sample(ctx, inst, LP_BLD_TEX_MODIFIER_LOD_BIAS, FALSE);
314 case TGSI_OPCODE_SAMPLE_L:
315 analyse_sample(ctx, inst, LP_BLD_TEX_MODIFIER_EXPLICIT_LOD, FALSE);
322 * Keep track of assignments and writes
327 * It could be any register index so clear all register indices.
330 for (chan = 0; chan < 4; ++chan) {
331 if (dst->WriteMask & (1 << chan)) {
332 for (index = 0; index < max_regs; ++index) {
333 regs[index][chan].file = TGSI_FILE_NULL;
337 } else if (dst->Index < max_regs) {
339 * Update this destination register value.
342 struct lp_tgsi_channel_info res[4];
344 memset(res, 0, sizeof res);
346 if (!inst->Instruction.Predicate &&
347 !inst->Instruction.Saturate) {
348 for (chan = 0; chan < 4; ++chan) {
349 if (dst->WriteMask & (1 << chan)) {
350 if (inst->Instruction.Opcode == TGSI_OPCODE_MOV) {
351 analyse_src(ctx, &res[chan],
352 &inst->Src[0].Register, chan);
353 } else if (inst->Instruction.Opcode == TGSI_OPCODE_MUL) {
355 * Propagate values across 1.0 and 0.0 multiplications.
358 struct lp_tgsi_channel_info src0;
359 struct lp_tgsi_channel_info src1;
361 analyse_src(ctx, &src0, &inst->Src[0].Register, chan);
362 analyse_src(ctx, &src1, &inst->Src[1].Register, chan);
364 if (is_immediate(&src0, 0.0f)) {
366 } else if (is_immediate(&src1, 0.0f)) {
368 } else if (is_immediate(&src0, 1.0f)) {
370 } else if (is_immediate(&src1, 1.0f)) {
378 for (chan = 0; chan < 4; ++chan) {
379 if (dst->WriteMask & (1 << chan)) {
380 regs[dst->Index][chan] = res[chan];
387 * Clear all temporaries information in presence of a control flow opcode.
390 switch (inst->Instruction.Opcode) {
392 case TGSI_OPCODE_UIF:
393 case TGSI_OPCODE_ELSE:
394 case TGSI_OPCODE_ENDIF:
395 case TGSI_OPCODE_BGNLOOP:
396 case TGSI_OPCODE_BRK:
397 case TGSI_OPCODE_BREAKC:
398 case TGSI_OPCODE_CONT:
399 case TGSI_OPCODE_ENDLOOP:
400 case TGSI_OPCODE_CALLNZ:
401 case TGSI_OPCODE_CAL:
402 case TGSI_OPCODE_BGNSUB:
403 case TGSI_OPCODE_ENDSUB:
404 case TGSI_OPCODE_SWITCH:
405 case TGSI_OPCODE_CASE:
406 case TGSI_OPCODE_DEFAULT:
407 case TGSI_OPCODE_ENDSWITCH:
408 case TGSI_OPCODE_RET:
409 case TGSI_OPCODE_END:
410 /* XXX: Are there more cases? */
411 memset(&ctx->temp, 0, sizeof ctx->temp);
412 memset(&info->output, 0, sizeof info->output);
420 dump_info(const struct tgsi_token *tokens,
421 struct lp_tgsi_info *info)
426 tgsi_dump(tokens, 0);
428 for (index = 0; index < info->num_texs; ++index) {
429 const struct lp_tgsi_texture_info *tex_info = &info->tex[index];
430 debug_printf("TEX[%u] =", index);
431 for (chan = 0; chan < 4; ++chan) {
432 const struct lp_tgsi_channel_info *chan_info =
433 &tex_info->coord[chan];
434 if (chan_info->file != TGSI_FILE_NULL) {
435 debug_printf(" %s[%u].%c",
436 tgsi_file_names[chan_info->file],
438 "xyzw01"[chan_info->swizzle]);
443 debug_printf(", RES[%u], SAMP[%u], %s\n",
444 tex_info->texture_unit,
445 tex_info->sampler_unit,
446 tgsi_texture_names[tex_info->target]);
449 for (index = 0; index < PIPE_MAX_SHADER_OUTPUTS; ++index) {
450 for (chan = 0; chan < 4; ++chan) {
451 const struct lp_tgsi_channel_info *chan_info =
452 &info->output[index][chan];
453 if (chan_info->file != TGSI_FILE_NULL) {
454 debug_printf("OUT[%u].%c = ", index, "xyzw"[chan]);
455 if (chan_info->file == TGSI_FILE_IMMEDIATE) {
456 debug_printf("%f", chan_info->u.value);
458 const char *file_name;
459 switch (chan_info->file) {
460 case TGSI_FILE_CONSTANT:
463 case TGSI_FILE_INPUT:
470 debug_printf("%s[%u].%c",
473 "xyzw01"[chan_info->swizzle]);
483 * Detect any direct relationship between the output color
486 lp_build_tgsi_info(const struct tgsi_token *tokens,
487 struct lp_tgsi_info *info)
489 struct tgsi_parse_context parse;
490 struct analysis_context ctx;
494 memset(info, 0, sizeof *info);
496 tgsi_scan_shader(tokens, &info->base);
498 memset(&ctx, 0, sizeof ctx);
501 tgsi_parse_init(&parse, tokens);
503 while (!tgsi_parse_end_of_tokens(&parse)) {
504 tgsi_parse_token(&parse);
506 switch (parse.FullToken.Token.Type) {
507 case TGSI_TOKEN_TYPE_DECLARATION:
510 case TGSI_TOKEN_TYPE_INSTRUCTION:
512 struct tgsi_full_instruction *inst =
513 &parse.FullToken.FullInstruction;
515 if (inst->Instruction.Opcode == TGSI_OPCODE_END ||
516 inst->Instruction.Opcode == TGSI_OPCODE_BGNSUB) {
517 /* We reached the end of main function body. */
521 analyse_instruction(&ctx, inst);
525 case TGSI_TOKEN_TYPE_IMMEDIATE:
527 const unsigned size =
528 parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
530 if (ctx.num_imms < Elements(ctx.imm)) {
531 for (chan = 0; chan < size; ++chan) {
532 float value = parse.FullToken.FullImmediate.u[chan].Float;
533 ctx.imm[ctx.num_imms][chan] = value;
535 if (value < 0.0f || value > 1.0f) {
536 info->unclamped_immediates = TRUE;
544 case TGSI_TOKEN_TYPE_PROPERTY:
553 tgsi_parse_free(&parse);
557 * Link the output color values.
560 for (index = 0; index < PIPE_MAX_COLOR_BUFS; ++index) {
561 const struct lp_tgsi_channel_info null_output[4];
562 info->cbuf[index] = null_output;
565 for (index = 0; index < info->base.num_outputs; ++index) {
566 unsigned semantic_name = info->base.output_semantic_name[index];
567 unsigned semantic_index = info->base.output_semantic_index[index];
568 if (semantic_name == TGSI_SEMANTIC_COLOR &&
569 semantic_index < PIPE_MAX_COLOR_BUFS) {
570 info->cbuf[semantic_index] = info->output[index];
574 if (gallivm_debug & GALLIVM_DEBUG_TGSI) {
575 dump_info(tokens, info);