1 /**************************************************************************
3 * Copyright 2008 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "draw/draw_context.h"
30 #include "os/os_misc.h"
31 #include "util/u_format.h"
32 #include "util/u_format_s3tc.h"
33 #include "util/u_inlines.h"
34 #include "util/u_memory.h"
35 #include "util/u_string.h"
38 #include "i915_debug.h"
39 #include "i915_context.h"
40 #include "i915_screen.h"
41 #include "i915_resource.h"
42 #include "i915_winsys.h"
43 #include "i915_public.h"
52 i915_get_vendor(struct pipe_screen *screen)
54 return "Mesa Project";
58 i915_get_device_vendor(struct pipe_screen *screen)
64 i915_get_name(struct pipe_screen *screen)
66 static char buffer[128];
69 switch (i915_screen(screen)->iws->pci_id) {
73 case PCI_CHIP_I915_GM:
79 case PCI_CHIP_I945_GM:
82 case PCI_CHIP_I945_GME:
94 case PCI_CHIP_PINEVIEW_G:
95 chipset = "Pineview G";
97 case PCI_CHIP_PINEVIEW_M:
98 chipset = "Pineview M";
105 util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
110 i915_get_shader_param(struct pipe_screen *screen,
111 enum pipe_shader_type shader,
112 enum pipe_shader_cap cap)
115 case PIPE_SHADER_VERTEX:
117 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
118 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
119 if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
120 return PIPE_MAX_SAMPLERS;
124 return draw_get_shader_param(shader, cap);
126 case PIPE_SHADER_FRAGMENT:
127 /* XXX: some of these are just shader model 2.0 values, fix this! */
129 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
130 return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
131 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
132 return I915_MAX_ALU_INSN;
133 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
134 return I915_MAX_TEX_INSN;
135 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
137 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
139 case PIPE_SHADER_CAP_MAX_INPUTS:
141 case PIPE_SHADER_CAP_MAX_OUTPUTS:
143 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
144 return 32 * sizeof(float[4]);
145 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
147 case PIPE_SHADER_CAP_MAX_TEMPS:
148 return 12; /* XXX: 12 -> 32 ? */
149 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
150 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
152 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
153 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
154 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
155 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
157 case PIPE_SHADER_CAP_SUBROUTINES:
159 case PIPE_SHADER_CAP_INTEGERS:
160 case PIPE_SHADER_CAP_INT64_ATOMICS:
161 case PIPE_SHADER_CAP_FP16:
163 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
164 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
165 return I915_TEX_UNITS;
166 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
167 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
168 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
169 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
170 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
171 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
172 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
173 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
174 case PIPE_SHADER_CAP_PREFERRED_IR:
175 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
177 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
180 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
191 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
193 struct i915_screen *is = i915_screen(screen);
196 /* Supported features (boolean caps). */
197 case PIPE_CAP_ANISOTROPIC_FILTER:
198 case PIPE_CAP_NPOT_TEXTURES:
199 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
200 case PIPE_CAP_POINT_SPRITE:
201 case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
202 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
203 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
204 case PIPE_CAP_TGSI_INSTANCEID:
205 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
206 case PIPE_CAP_USER_VERTEX_BUFFERS:
207 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
210 /* Unsupported features (boolean caps). */
211 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
212 case PIPE_CAP_DEPTH_CLIP_DISABLE:
213 case PIPE_CAP_INDEP_BLEND_ENABLE:
214 case PIPE_CAP_INDEP_BLEND_FUNC:
215 case PIPE_CAP_SHADER_STENCIL_EXPORT:
216 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
217 case PIPE_CAP_TEXTURE_SWIZZLE:
218 case PIPE_CAP_QUERY_TIME_ELAPSED:
220 case PIPE_CAP_SEAMLESS_CUBE_MAP:
221 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
222 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
223 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
224 case PIPE_CAP_CONDITIONAL_RENDER:
225 case PIPE_CAP_TEXTURE_BARRIER:
226 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
227 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
228 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
229 case PIPE_CAP_START_INSTANCE:
230 case PIPE_CAP_QUERY_TIMESTAMP:
231 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
232 case PIPE_CAP_TEXTURE_MULTISAMPLE:
233 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
234 case PIPE_CAP_CUBE_MAP_ARRAY:
235 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
236 case PIPE_CAP_TGSI_TEXCOORD:
237 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
238 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
239 case PIPE_CAP_TEXTURE_GATHER_SM5:
240 case PIPE_CAP_FAKE_SW_MSAA:
241 case PIPE_CAP_TEXTURE_QUERY_LOD:
242 case PIPE_CAP_SAMPLE_SHADING:
243 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
244 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
245 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
246 case PIPE_CAP_CLIP_HALFZ:
247 case PIPE_CAP_VERTEXID_NOBASE:
248 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
249 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
250 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
251 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
252 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
253 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
254 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
255 case PIPE_CAP_DEPTH_BOUNDS_TEST:
256 case PIPE_CAP_TGSI_TXQS:
257 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
258 case PIPE_CAP_SHAREABLE_SHADERS:
259 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
260 case PIPE_CAP_CLEAR_TEXTURE:
261 case PIPE_CAP_DRAW_PARAMETERS:
262 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
263 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
264 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
265 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
266 case PIPE_CAP_INVALIDATE_BUFFER:
267 case PIPE_CAP_GENERATE_MIPMAP:
268 case PIPE_CAP_STRING_MARKER:
269 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
270 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
271 case PIPE_CAP_QUERY_MEMORY_INFO:
272 case PIPE_CAP_PCI_GROUP:
273 case PIPE_CAP_PCI_BUS:
274 case PIPE_CAP_PCI_DEVICE:
275 case PIPE_CAP_PCI_FUNCTION:
276 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
277 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
278 case PIPE_CAP_CULL_DISTANCE:
279 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
280 case PIPE_CAP_TGSI_VOTE:
281 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
282 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
283 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
284 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
285 case PIPE_CAP_POST_DEPTH_COVERAGE:
286 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
287 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
288 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
289 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
290 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
291 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
294 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
295 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
296 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
297 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
298 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
299 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
300 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
301 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
302 case PIPE_CAP_DRAW_INDIRECT:
303 case PIPE_CAP_MULTI_DRAW_INDIRECT:
304 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
305 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
306 case PIPE_CAP_SAMPLER_VIEW_TARGET:
307 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
308 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
309 case PIPE_CAP_NATIVE_FENCE_FD:
310 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
311 case PIPE_CAP_TGSI_FS_FBFETCH:
312 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
313 case PIPE_CAP_DOUBLES:
315 case PIPE_CAP_INT64_DIVMOD:
316 case PIPE_CAP_TGSI_TEX_TXF_LZ:
317 case PIPE_CAP_TGSI_CLOCK:
318 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
319 case PIPE_CAP_TGSI_BALLOT:
320 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
321 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
322 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
323 case PIPE_CAP_BINDLESS_TEXTURE:
324 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
325 case PIPE_CAP_QUERY_SO_OVERFLOW:
326 case PIPE_CAP_MEMOBJ:
327 case PIPE_CAP_LOAD_CONSTBUF:
328 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
329 case PIPE_CAP_TILE_RASTER_ORDER:
330 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
331 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
332 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
333 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
334 case PIPE_CAP_FENCE_SIGNAL:
335 case PIPE_CAP_CONSTBUF0_FLAGS:
336 case PIPE_CAP_PACKED_UNIFORMS:
337 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
340 case PIPE_CAP_MAX_GS_INVOCATIONS:
343 case PIPE_CAP_MAX_VIEWPORTS:
346 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
349 case PIPE_CAP_GLSL_FEATURE_LEVEL:
350 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
353 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
356 /* Features we can lie about (boolean caps). */
357 case PIPE_CAP_OCCLUSION_QUERY:
358 return is->debug.lie ? 1 : 0;
361 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
362 return I915_MAX_TEXTURE_2D_LEVELS;
363 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
364 return I915_MAX_TEXTURE_3D_LEVELS;
365 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
366 return I915_MAX_TEXTURE_2D_LEVELS;
367 case PIPE_CAP_MIN_TEXEL_OFFSET:
368 case PIPE_CAP_MAX_TEXEL_OFFSET:
369 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
370 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
371 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
372 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
373 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
376 /* Render targets. */
377 case PIPE_CAP_MAX_RENDER_TARGETS:
380 /* Geometry shader output, unsupported. */
381 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
382 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
383 case PIPE_CAP_MAX_VERTEX_STREAMS:
386 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
389 /* Fragment coordinate conventions. */
390 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
391 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
393 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
394 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
396 case PIPE_CAP_ENDIANNESS:
397 return PIPE_ENDIAN_LITTLE;
399 case PIPE_CAP_VENDOR_ID:
401 case PIPE_CAP_DEVICE_ID:
402 return is->iws->pci_id;
403 case PIPE_CAP_ACCELERATED:
405 case PIPE_CAP_VIDEO_MEMORY: {
406 /* Once a batch uses more than 75% of the maximum mappable size, we
407 * assume that there's some fragmentation, and we start doing extra
408 * flushing, etc. That's the big cliff apps will care about.
410 const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
411 uint64_t system_memory;
413 if (!os_get_total_physical_memory(&system_memory))
416 return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20));
421 case PIPE_CAP_COMPUTE:
422 case PIPE_CAP_QUERY_BUFFER_OBJECT:
425 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
431 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
434 case PIPE_CAPF_MAX_LINE_WIDTH:
436 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
439 case PIPE_CAPF_MAX_POINT_WIDTH:
441 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
444 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
447 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
450 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
452 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
454 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
458 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
464 i915_is_format_supported(struct pipe_screen *screen,
465 enum pipe_format format,
466 enum pipe_texture_target target,
467 unsigned sample_count,
468 unsigned storage_sample_count,
471 static const enum pipe_format tex_supported[] = {
472 PIPE_FORMAT_B8G8R8A8_UNORM,
473 PIPE_FORMAT_B8G8R8A8_SRGB,
474 PIPE_FORMAT_B8G8R8X8_UNORM,
475 PIPE_FORMAT_R8G8B8A8_UNORM,
476 PIPE_FORMAT_R8G8B8X8_UNORM,
477 PIPE_FORMAT_B4G4R4A4_UNORM,
478 PIPE_FORMAT_B5G6R5_UNORM,
479 PIPE_FORMAT_B5G5R5A1_UNORM,
480 PIPE_FORMAT_B10G10R10A2_UNORM,
481 PIPE_FORMAT_L8_UNORM,
482 PIPE_FORMAT_A8_UNORM,
483 PIPE_FORMAT_I8_UNORM,
484 PIPE_FORMAT_L8A8_UNORM,
488 PIPE_FORMAT_Z16_UNORM, */
489 PIPE_FORMAT_DXT1_RGB,
490 PIPE_FORMAT_DXT1_RGBA,
491 PIPE_FORMAT_DXT3_RGBA,
492 PIPE_FORMAT_DXT5_RGBA,
493 PIPE_FORMAT_Z24X8_UNORM,
494 PIPE_FORMAT_Z24_UNORM_S8_UINT,
495 PIPE_FORMAT_NONE /* list terminator */
497 static const enum pipe_format render_supported[] = {
498 PIPE_FORMAT_B8G8R8A8_UNORM,
499 PIPE_FORMAT_B8G8R8X8_UNORM,
500 PIPE_FORMAT_R8G8B8A8_UNORM,
501 PIPE_FORMAT_R8G8B8X8_UNORM,
502 PIPE_FORMAT_B5G6R5_UNORM,
503 PIPE_FORMAT_B5G5R5A1_UNORM,
504 PIPE_FORMAT_B4G4R4A4_UNORM,
505 PIPE_FORMAT_B10G10R10A2_UNORM,
506 PIPE_FORMAT_L8_UNORM,
507 PIPE_FORMAT_A8_UNORM,
508 PIPE_FORMAT_I8_UNORM,
509 PIPE_FORMAT_NONE /* list terminator */
511 static const enum pipe_format depth_supported[] = {
513 PIPE_FORMAT_Z16_UNORM, */
514 PIPE_FORMAT_Z24X8_UNORM,
515 PIPE_FORMAT_Z24_UNORM_S8_UINT,
516 PIPE_FORMAT_NONE /* list terminator */
518 const enum pipe_format *list;
521 if (sample_count > 1)
524 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
527 if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
528 list = depth_supported;
529 else if (tex_usage & PIPE_BIND_RENDER_TARGET)
530 list = render_supported;
531 else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
532 list = tex_supported;
534 return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
536 for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
537 if (list[i] == format)
551 i915_fence_reference(struct pipe_screen *screen,
552 struct pipe_fence_handle **ptr,
553 struct pipe_fence_handle *fence)
555 struct i915_screen *is = i915_screen(screen);
557 is->iws->fence_reference(is->iws, ptr, fence);
561 i915_fence_finish(struct pipe_screen *screen,
562 struct pipe_context *ctx,
563 struct pipe_fence_handle *fence,
566 struct i915_screen *is = i915_screen(screen);
569 return is->iws->fence_signalled(is->iws, fence) == 1;
571 return is->iws->fence_finish(is->iws, fence) == 1;
581 i915_flush_frontbuffer(struct pipe_screen *screen,
582 struct pipe_resource *resource,
583 unsigned level, unsigned layer,
584 void *winsys_drawable_handle,
585 struct pipe_box *sub_box)
587 /* XXX: Dummy right now. */
592 (void)winsys_drawable_handle;
597 i915_destroy_screen(struct pipe_screen *screen)
599 struct i915_screen *is = i915_screen(screen);
602 is->iws->destroy(is->iws);
608 * Create a new i915_screen object
611 i915_screen_create(struct i915_winsys *iws)
613 struct i915_screen *is = CALLOC_STRUCT(i915_screen);
618 switch (iws->pci_id) {
619 case PCI_CHIP_I915_G:
620 case PCI_CHIP_I915_GM:
624 case PCI_CHIP_I945_G:
625 case PCI_CHIP_I945_GM:
626 case PCI_CHIP_I945_GME:
630 case PCI_CHIP_PINEVIEW_G:
631 case PCI_CHIP_PINEVIEW_M:
636 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
637 __FUNCTION__, iws->pci_id);
644 is->base.destroy = i915_destroy_screen;
645 is->base.flush_frontbuffer = i915_flush_frontbuffer;
647 is->base.get_name = i915_get_name;
648 is->base.get_vendor = i915_get_vendor;
649 is->base.get_device_vendor = i915_get_device_vendor;
650 is->base.get_param = i915_get_param;
651 is->base.get_shader_param = i915_get_shader_param;
652 is->base.get_paramf = i915_get_paramf;
653 is->base.is_format_supported = i915_is_format_supported;
655 is->base.context_create = i915_create_context;
657 is->base.fence_reference = i915_fence_reference;
658 is->base.fence_finish = i915_fence_finish;
660 i915_init_screen_resource_functions(is);