2 * Copyright 2012 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "codegen/nv50_ir_target_nvc0.h"
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
29 class CodeEmitterGK110 : public CodeEmitter
32 CodeEmitterGK110(const TargetNVC0 *);
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
38 inline void setProgramType(Program::Type pType) { progType = pType; }
41 const TargetNVC0 *targNVC0;
43 Program::Type progType;
45 const bool writeIssueDelays;
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
52 void emitPredicate(const Instruction *);
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57 void setSUConst16(const Instruction *, const int s);
59 void modNegAbsF32_3b(const Instruction *, const int s);
61 void emitCondCode(CondCode cc, int pos, uint8_t mask);
62 void emitInterpMode(const Instruction *);
63 void emitLoadStoreType(DataType ty, const int pos);
64 void emitCachingMode(CacheMode c, const int pos);
65 void emitSUGType(DataType, const int pos);
66 void emitSUCachingMode(CacheMode c);
68 inline uint8_t getSRegEncoding(const ValueRef&);
70 void emitRoundMode(RoundMode, const int pos, const int rintPos);
71 void emitRoundModeF(RoundMode, const int pos);
72 void emitRoundModeI(RoundMode, const int pos);
74 void emitNegAbs12(const Instruction *);
76 void emitNOP(const Instruction *);
78 void emitLOAD(const Instruction *);
79 void emitSTORE(const Instruction *);
80 void emitMOV(const Instruction *);
81 void emitATOM(const Instruction *);
82 void emitCCTL(const Instruction *);
84 void emitINTERP(const Instruction *);
85 void emitAFETCH(const Instruction *);
86 void emitPFETCH(const Instruction *);
87 void emitVFETCH(const Instruction *);
88 void emitEXPORT(const Instruction *);
89 void emitOUT(const Instruction *);
91 void emitUADD(const Instruction *);
92 void emitFADD(const Instruction *);
93 void emitDADD(const Instruction *);
94 void emitIMUL(const Instruction *);
95 void emitFMUL(const Instruction *);
96 void emitDMUL(const Instruction *);
97 void emitIMAD(const Instruction *);
98 void emitISAD(const Instruction *);
99 void emitFMAD(const Instruction *);
100 void emitDMAD(const Instruction *);
101 void emitMADSP(const Instruction *i);
103 void emitNOT(const Instruction *);
104 void emitLogicOp(const Instruction *, uint8_t subOp);
105 void emitPOPC(const Instruction *);
106 void emitINSBF(const Instruction *);
107 void emitEXTBF(const Instruction *);
108 void emitBFIND(const Instruction *);
109 void emitPERMT(const Instruction *);
110 void emitShift(const Instruction *);
112 void emitSFnOp(const Instruction *, uint8_t subOp);
114 void emitCVT(const Instruction *);
115 void emitMINMAX(const Instruction *);
116 void emitPreOp(const Instruction *);
118 void emitSET(const CmpInstruction *);
119 void emitSLCT(const CmpInstruction *);
120 void emitSELP(const Instruction *);
122 void emitTEXBAR(const Instruction *);
123 void emitTEX(const TexInstruction *);
124 void emitTEXCSAA(const TexInstruction *);
125 void emitTXQ(const TexInstruction *);
127 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
129 void emitPIXLD(const Instruction *);
131 void emitBAR(const Instruction *);
132 void emitMEMBAR(const Instruction *);
134 void emitFlow(const Instruction *);
136 void emitVOTE(const Instruction *);
138 void emitSULDGB(const TexInstruction *);
139 void emitSUSTGx(const TexInstruction *);
140 void emitSUCLAMPMode(uint16_t);
141 void emitSUCalc(Instruction *);
143 void emitVSHL(const Instruction *);
144 void emitVectorSubOp(const Instruction *);
146 inline void defId(const ValueDef&, const int pos);
147 inline void srcId(const ValueRef&, const int pos);
148 inline void srcId(const ValueRef *, const int pos);
149 inline void srcId(const Instruction *, int s, const int pos);
151 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
153 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
156 #define GK110_GPR_ZERO 255
159 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
161 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
163 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
164 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
166 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
167 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
169 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
171 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
173 #define SDATA(a) ((a).rep()->reg.data)
174 #define DDATA(a) ((a).rep()->reg.data)
176 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
178 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
181 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
183 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
186 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
188 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
189 code[pos / 32] |= r << (pos % 32);
192 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
194 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
197 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
199 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
202 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
204 const ImmediateValue *imm = ref.get()->asImm();
206 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
210 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
216 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
217 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
218 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
220 rint = rnd == ROUND_NI;
222 assert(rnd == ROUND_N || rnd == ROUND_NI);
225 code[pos / 32] |= n << (pos % 32);
226 if (rint && rintPos >= 0)
227 code[rintPos / 32] |= 1 << (rintPos % 32);
231 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
236 case ROUND_M: n = 1; break;
237 case ROUND_P: n = 2; break;
238 case ROUND_Z: n = 3; break;
241 assert(rnd == ROUND_N);
244 code[pos / 32] |= n << (pos % 32);
248 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
253 case ROUND_MI: n = 1; break;
254 case ROUND_PI: n = 2; break;
255 case ROUND_ZI: n = 3; break;
258 assert(rnd == ROUND_NI);
261 code[pos / 32] |= n << (pos % 32);
264 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
269 case CC_FL: n = 0x00; break;
270 case CC_LT: n = 0x01; break;
271 case CC_EQ: n = 0x02; break;
272 case CC_LE: n = 0x03; break;
273 case CC_GT: n = 0x04; break;
274 case CC_NE: n = 0x05; break;
275 case CC_GE: n = 0x06; break;
276 case CC_LTU: n = 0x09; break;
277 case CC_EQU: n = 0x0a; break;
278 case CC_LEU: n = 0x0b; break;
279 case CC_GTU: n = 0x0c; break;
280 case CC_NEU: n = 0x0d; break;
281 case CC_GEU: n = 0x0e; break;
282 case CC_TR: n = 0x0f; break;
283 case CC_NO: n = 0x10; break;
284 case CC_NC: n = 0x11; break;
285 case CC_NS: n = 0x12; break;
286 case CC_NA: n = 0x13; break;
287 case CC_A: n = 0x14; break;
288 case CC_S: n = 0x15; break;
289 case CC_C: n = 0x16; break;
290 case CC_O: n = 0x17; break;
293 assert(!"invalid condition code");
296 code[pos / 32] |= (n & mask) << (pos % 32);
300 CodeEmitterGK110::emitPredicate(const Instruction *i)
302 if (i->predSrc >= 0) {
303 srcId(i->src(i->predSrc), 18);
304 if (i->cc == CC_NOT_P)
305 code[0] |= 8 << 18; // negate
306 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
313 CodeEmitterGK110::setCAddress14(const ValueRef& src)
315 const Storage& res = src.get()->asSym()->reg;
316 const int32_t addr = res.data.offset / 4;
318 code[0] |= (addr & 0x01ff) << 23;
319 code[1] |= (addr & 0x3e00) >> 9;
320 code[1] |= res.fileIndex << 5;
324 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
326 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
327 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
329 if (i->sType == TYPE_F32) {
330 assert(!(u32 & 0x00000fff));
331 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
332 code[1] |= ((u32 & 0x7fe00000) >> 21);
333 code[1] |= ((u32 & 0x80000000) >> 4);
335 if (i->sType == TYPE_F64) {
336 assert(!(u64 & 0x00000fffffffffffULL));
337 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
338 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
339 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
341 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
342 code[0] |= (u32 & 0x001ff) << 23;
343 code[1] |= (u32 & 0x7fe00) >> 9;
344 code[1] |= (u32 & 0x80000) << 8;
349 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
352 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
355 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
357 u32 = imm.reg.data.u32;
360 code[0] |= u32 << 23;
365 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
375 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
376 switch (i->src(s).getFile()) {
378 srcId(i->src(s), s ? 42 : 10);
381 setImmediate32(i, s, mod);
391 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
400 switch (i->src(0).getFile()) {
401 case FILE_MEMORY_CONST:
402 code[1] |= 0x4 << 28;
403 setCAddress14(i->src(0));
406 code[1] |= 0xc << 28;
407 srcId(i->src(0), 23);
415 // 0x2 for GPR, c[] and 0x1 for short immediate
417 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
420 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
423 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
428 code[1] = opc1 << 20;
431 code[1] = (0xc << 28) | (opc2 << 20);
438 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
439 switch (i->src(s).getFile()) {
440 case FILE_MEMORY_CONST:
441 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
442 setCAddress14(i->src(s));
445 setShortImmediate(i, s);
448 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
451 if (i->op == OP_SELP) {
452 assert(s == 2 && i->src(s).getFile() == FILE_PREDICATE);
453 srcId(i->src(s), 42);
455 // ignore here, can be predicate or flags, but must not be address
463 assert(imm || (code[1] & (0xc << 28)));
467 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
469 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
470 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
474 CodeEmitterGK110::emitNOP(const Instruction *i)
476 code[0] = 0x00003c02;
477 code[1] = 0x85800000;
482 code[0] = 0x001c3c02;
486 CodeEmitterGK110::emitFMAD(const Instruction *i)
488 assert(!isLIMM(i->src(1), TYPE_F32));
490 emitForm_21(i, 0x0c0, 0x940);
498 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
510 CodeEmitterGK110::emitDMAD(const Instruction *i)
512 assert(!i->saturate);
515 emitForm_21(i, 0x1b8, 0xb38);
520 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
532 CodeEmitterGK110::emitMADSP(const Instruction *i)
534 emitForm_21(i, 0x140, 0xa40);
536 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
537 code[1] |= 0x00c00000;
539 code[1] |= (i->subOp & 0x00f) << 19; // imadp1
540 code[1] |= (i->subOp & 0x0f0) << 20; // imadp2
541 code[1] |= (i->subOp & 0x100) << 11; // imadp3
542 code[1] |= (i->subOp & 0x200) << 15; // imadp3
543 code[1] |= (i->subOp & 0xc00) << 12; // imadp3
546 if (i->flagsDef >= 0)
551 CodeEmitterGK110::emitFMUL(const Instruction *i)
553 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
555 assert(i->postFactor >= -3 && i->postFactor <= 3);
557 if (isLIMM(i->src(1), TYPE_F32)) {
558 emitForm_L(i, 0x200, 0x2, Modifier(0));
566 assert(i->postFactor == 0);
568 emitForm_21(i, 0x234, 0xc34);
569 code[1] |= ((i->postFactor > 0) ?
570 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
588 CodeEmitterGK110::emitDMUL(const Instruction *i)
590 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
592 assert(!i->postFactor);
593 assert(!i->saturate);
597 emitForm_21(i, 0x240, 0xc40);
611 CodeEmitterGK110::emitIMUL(const Instruction *i)
613 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
614 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
616 if (i->src(1).getFile() == FILE_IMMEDIATE) {
617 emitForm_L(i, 0x280, 2, Modifier(0));
619 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
621 if (i->sType == TYPE_S32)
624 emitForm_21(i, 0x21c, 0xc1c);
626 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
628 if (i->sType == TYPE_S32)
634 CodeEmitterGK110::emitFADD(const Instruction *i)
636 if (isLIMM(i->src(1), TYPE_F32)) {
637 assert(i->rnd == ROUND_N);
638 assert(!i->saturate);
640 Modifier mod = i->src(1).mod ^
641 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
643 emitForm_L(i, 0x400, 0, mod);
649 emitForm_21(i, 0x22c, 0xc2c);
658 modNegAbsF32_3b(i, 1);
659 if (i->op == OP_SUB) code[1] ^= 1 << 27;
663 if (i->op == OP_SUB) code[1] ^= 1 << 16;
669 CodeEmitterGK110::emitDADD(const Instruction *i)
671 assert(!i->saturate);
674 emitForm_21(i, 0x238, 0xc38);
679 modNegAbsF32_3b(i, 1);
680 if (i->op == OP_SUB) code[1] ^= 1 << 27;
684 if (i->op == OP_SUB) code[1] ^= 1 << 16;
689 CodeEmitterGK110::emitUADD(const Instruction *i)
691 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
696 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
698 if (isLIMM(i->src(1), TYPE_S32)) {
699 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
704 assert(!i->defExists(1));
705 assert(i->flagsSrc < 0);
709 emitForm_21(i, 0x208, 0xc08);
711 assert(addOp != 3); // would be add-plus-one
713 code[1] |= addOp << 19;
716 code[1] |= 1 << 18; // write carry
717 if (i->flagsSrc >= 0)
718 code[1] |= 1 << 14; // add carry
726 CodeEmitterGK110::emitIMAD(const Instruction *i)
729 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
731 emitForm_21(i, 0x100, 0xa00);
734 code[1] |= addOp << 26;
736 if (i->sType == TYPE_S32)
737 code[1] |= (1 << 19) | (1 << 24);
739 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
742 if (i->flagsDef >= 0) code[1] |= 1 << 18;
743 if (i->flagsSrc >= 0) code[1] |= 1 << 20;
749 CodeEmitterGK110::emitISAD(const Instruction *i)
751 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
753 emitForm_21(i, 0x1f4, 0xb74);
755 if (i->dType == TYPE_S32)
760 CodeEmitterGK110::emitNOT(const Instruction *i)
762 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
763 code[1] = 0x22003800;
769 switch (i->src(0).getFile()) {
771 code[1] |= 0xc << 28;
772 srcId(i->src(0), 23);
774 case FILE_MEMORY_CONST:
775 code[1] |= 0x4 << 28;
776 setCAddress14(i->src(1));
785 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
787 if (i->def(0).getFile() == FILE_PREDICATE) {
788 code[0] = 0x00000002 | (subOp << 27);
789 code[1] = 0x84800000;
794 srcId(i->src(0), 14);
795 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT)) code[0] |= 1 << 17;
796 srcId(i->src(1), 32);
797 if (i->src(1).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 3;
799 if (i->defExists(1)) {
805 if (i->predSrc != 2 && i->srcExists(2)) {
806 code[1] |= subOp << 16;
807 srcId(i->src(2), 42);
808 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 13;
813 if (isLIMM(i->src(1), TYPE_S32)) {
814 emitForm_L(i, 0x200, 0, i->src(1).mod);
815 code[1] |= subOp << 24;
818 emitForm_21(i, 0x220, 0xc20);
819 code[1] |= subOp << 12;
826 CodeEmitterGK110::emitPOPC(const Instruction *i)
828 assert(!isLIMM(i->src(1), TYPE_S32, true));
830 emitForm_21(i, 0x204, 0xc04);
833 if (!(code[0] & 0x1))
838 CodeEmitterGK110::emitINSBF(const Instruction *i)
840 emitForm_21(i, 0x1f8, 0xb78);
844 CodeEmitterGK110::emitEXTBF(const Instruction *i)
846 emitForm_21(i, 0x600, 0xc00);
848 if (i->dType == TYPE_S32)
850 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
855 CodeEmitterGK110::emitBFIND(const Instruction *i)
857 emitForm_C(i, 0x218, 0x2);
859 if (i->dType == TYPE_S32)
861 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
863 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
868 CodeEmitterGK110::emitPERMT(const Instruction *i)
870 emitForm_21(i, 0x1e0, 0xb60);
872 code[1] |= i->subOp << 19;
876 CodeEmitterGK110::emitShift(const Instruction *i)
878 if (i->op == OP_SHR) {
879 emitForm_21(i, 0x214, 0xc14);
880 if (isSignedType(i->dType))
883 emitForm_21(i, 0x224, 0xc24);
886 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
891 CodeEmitterGK110::emitPreOp(const Instruction *i)
893 emitForm_C(i, 0x248, 0x2);
895 if (i->op == OP_PREEX2)
903 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
905 code[0] = 0x00000002 | (subOp << 23);
906 code[1] = 0x84000000;
911 srcId(i->src(0), 10);
919 CodeEmitterGK110::emitMINMAX(const Instruction *i)
943 emitForm_21(i, op2, op1);
945 if (i->dType == TYPE_S32)
947 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
953 modNegAbsF32_3b(i, 1);
961 CodeEmitterGK110::emitCVT(const Instruction *i)
963 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
964 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
965 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
967 bool sat = i->saturate;
968 bool abs = i->src(0).mod.abs();
969 bool neg = i->src(0).mod.neg();
971 RoundMode rnd = i->rnd;
974 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
975 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
976 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
977 case OP_SAT: sat = true; break;
978 case OP_NEG: neg = !neg; break;
979 case OP_ABS: abs = true; neg = false; break;
986 if (i->op == OP_NEG && i->dType == TYPE_U32)
995 else if (f2i) op = 0x258;
996 else if (i2f) op = 0x25c;
999 emitForm_C(i, op, 0x2);
1002 if (neg) code[1] |= 1 << 16;
1003 if (abs) code[1] |= 1 << 20;
1004 if (sat) code[1] |= 1 << 21;
1006 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
1008 code[0] |= typeSizeofLog2(dType) << 10;
1009 code[0] |= typeSizeofLog2(i->sType) << 12;
1010 code[1] |= i->subOp << 12;
1012 if (isSignedIntType(dType))
1014 if (isSignedIntType(i->sType))
1019 CodeEmitterGK110::emitSET(const CmpInstruction *i)
1023 if (i->def(0).getFile() == FILE_PREDICATE) {
1025 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1026 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1032 emitForm_21(i, op2, op1);
1036 if (!(code[0] & 0x1)) {
1040 modNegAbsF32_3b(i, 1);
1044 // normal DST field is negated predicate result
1045 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
1046 if (i->defExists(1))
1047 defId(i->def(1), 2);
1052 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
1053 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
1059 emitForm_21(i, op2, op1);
1063 if (!(code[0] & 0x1)) {
1067 modNegAbsF32_3b(i, 1);
1071 if (i->dType == TYPE_F32) {
1072 if (isFloatType(i->sType))
1078 if (i->sType == TYPE_S32)
1081 if (i->op != OP_SET) {
1083 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1084 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1085 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1090 srcId(i->src(2), 0x2a);
1092 code[1] |= 0x7 << 10;
1094 emitCondCode(i->setCond,
1095 isFloatType(i->sType) ? 0x33 : 0x34,
1096 isFloatType(i->sType) ? 0xf : 0x7);
1100 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1102 CondCode cc = i->setCond;
1103 if (i->src(2).mod.neg())
1104 cc = reverseCondCode(cc);
1106 if (i->dType == TYPE_F32) {
1107 emitForm_21(i, 0x1d0, 0xb50);
1109 emitCondCode(cc, 0x33, 0xf);
1111 emitForm_21(i, 0x1a0, 0xb20);
1112 emitCondCode(cc, 0x34, 0x7);
1117 selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1119 int loc = entry->loc;
1120 if (data.force_persample_interp)
1121 code[loc + 1] |= 1 << 13;
1123 code[loc + 1] &= ~(1 << 13);
1126 void CodeEmitterGK110::emitSELP(const Instruction *i)
1128 emitForm_21(i, 0x250, 0x050);
1130 if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
1133 if (i->subOp == 1) {
1134 addInterp(0, 0, selpFlip);
1138 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1140 code[0] = 0x0000003e | (i->subOp << 23);
1141 code[1] = 0x77000000;
1146 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1148 code[0] = 0x00000002;
1149 code[1] = 0x76c00000;
1151 code[1] |= i->tex.r << 9;
1152 // code[1] |= i->tex.s << (9 + 8);
1154 if (i->tex.liveOnly)
1155 code[0] |= 0x80000000;
1157 defId(i->def(0), 2);
1158 srcId(i->src(0), 10);
1162 isNextIndependentTex(const TexInstruction *i)
1164 if (!i->next || !isTextureOp(i->next->op))
1166 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1168 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1172 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1174 const bool ind = i->tex.rIndirectSrc >= 0;
1177 code[0] = 0x00000002;
1180 code[1] = 0x7e000000;
1183 code[1] = 0x7e800000;
1186 code[1] = 0x78000000;
1189 code[1] = 0x7dc00000;
1192 code[1] = 0x7d800000;
1198 code[0] = 0x00000002;
1199 code[1] = 0x76000000;
1200 code[1] |= i->tex.r << 9;
1203 code[0] = 0x00000002;
1204 code[1] = 0x76800000;
1205 code[1] |= i->tex.r << 9;
1208 code[0] = 0x00000002;
1209 code[1] = 0x70000000;
1210 code[1] |= i->tex.r << 13;
1213 code[0] = 0x00000001;
1214 code[1] = 0x70000000;
1215 code[1] |= i->tex.r << 15;
1218 code[0] = 0x00000001;
1219 code[1] = 0x60000000;
1220 code[1] |= i->tex.r << 15;
1225 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1227 if (i->tex.liveOnly)
1228 code[0] |= 0x80000000;
1232 case OP_TXB: code[1] |= 0x2000; break;
1233 case OP_TXL: code[1] |= 0x3000; break;
1237 case OP_TXLQ: break;
1239 assert(!"invalid texture op");
1243 if (i->op == OP_TXF) {
1244 if (!i->tex.levelZero)
1247 if (i->tex.levelZero) {
1251 if (i->op != OP_TXD && i->tex.derivAll)
1256 code[1] |= i->tex.mask << 2;
1258 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1260 defId(i->def(0), 2);
1261 srcId(i->src(0), 10);
1264 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1267 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1268 if (i->tex.target.isArray())
1270 if (i->tex.target.isShadow())
1272 if (i->tex.target == TEX_TARGET_2D_MS ||
1273 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1276 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1280 if (i->tex.useOffsets == 1) {
1282 case OP_TXF: code[1] |= 0x200; break;
1283 case OP_TXD: code[1] |= 0x00400000; break;
1284 default: code[1] |= 0x800; break;
1287 if (i->tex.useOffsets == 4)
1292 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1294 code[0] = 0x00000002;
1295 code[1] = 0x75400001;
1297 switch (i->tex.query) {
1298 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1299 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1300 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1301 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1302 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1303 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1305 assert(!"invalid texture query");
1309 code[1] |= i->tex.mask << 2;
1310 code[1] |= i->tex.r << 9;
1311 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1312 code[1] |= 0x08000000;
1314 defId(i->def(0), 2);
1315 srcId(i->src(0), 10);
1321 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1323 code[0] = 0x00000002 | ((qOp & 1) << 31);
1324 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1326 defId(i->def(0), 2);
1327 srcId(i->src(0), 10);
1328 srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 23);
1330 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1331 code[1] |= 1 << 9; // dall
1337 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1339 emitForm_L(i, 0x7f4, 2, Modifier(0));
1340 code[1] |= i->subOp << 2;
1341 code[1] |= 0x00070000;
1345 CodeEmitterGK110::emitBAR(const Instruction *i)
1347 code[0] = 0x00000002;
1348 code[1] = 0x85400000;
1351 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1352 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1353 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1354 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1356 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1363 if (i->src(0).getFile() == FILE_GPR) {
1364 srcId(i->src(0), 10);
1366 ImmediateValue *imm = i->getSrc(0)->asImm();
1368 code[0] |= imm->reg.data.u32 << 10;
1373 if (i->src(1).getFile() == FILE_GPR) {
1374 srcId(i->src(1), 23);
1376 ImmediateValue *imm = i->getSrc(0)->asImm();
1378 assert(imm->reg.data.u32 <= 0xfff);
1379 code[0] |= imm->reg.data.u32 << 23;
1380 code[1] |= imm->reg.data.u32 >> 9;
1384 if (i->srcExists(2) && (i->predSrc != 2)) {
1385 srcId(i->src(2), 32 + 10);
1386 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1393 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1395 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1396 code[1] = 0x7cc00000;
1402 CodeEmitterGK110::emitFlow(const Instruction *i)
1404 const FlowInstruction *f = i->asFlow();
1406 unsigned mask; // bit 0: predicate, bit 1: target
1408 code[0] = 0x00000000;
1412 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1413 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1418 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1419 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1424 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1425 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1426 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1427 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1428 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1430 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1431 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1432 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1433 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1435 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1436 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1437 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1439 assert(!"invalid flow operation");
1445 if (i->flagsSrc < 0)
1457 if (f->op == OP_CALL) {
1459 assert(f->absolute);
1460 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1461 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1462 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1464 assert(!f->absolute);
1465 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1466 code[0] |= (pcRel & 0x1ff) << 23;
1467 code[1] |= (pcRel >> 9) & 0x7fff;
1471 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1472 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1474 // currently we don't want absolute branches
1475 assert(!f->absolute);
1476 code[0] |= (pcRel & 0x1ff) << 23;
1477 code[1] |= (pcRel >> 9) & 0x7fff;
1482 CodeEmitterGK110::emitVOTE(const Instruction *i)
1484 assert(i->src(0).getFile() == FILE_PREDICATE &&
1485 i->def(1).getFile() == FILE_PREDICATE);
1487 code[0] = 0x00000002;
1488 code[1] = 0x86c00000 | (i->subOp << 19);
1492 defId(i->def(0), 2);
1493 defId(i->def(1), 48);
1494 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
1496 srcId(i->src(0), 42);
1500 CodeEmitterGK110::emitSUGType(DataType ty, const int pos)
1505 case TYPE_S32: n = 1; break;
1506 case TYPE_U8: n = 2; break;
1507 case TYPE_S8: n = 3; break;
1509 assert(ty == TYPE_U32);
1512 code[pos / 32] |= n << (pos % 32);
1516 CodeEmitterGK110::emitSUCachingMode(CacheMode c)
1536 assert(!"invalid caching mode");
1539 code[0] |= (n & 1) << 31;
1540 code[1] |= (n & 2) >> 1;
1544 CodeEmitterGK110::setSUConst16(const Instruction *i, const int s)
1546 const uint32_t offset = i->getSrc(s)->reg.data.offset;
1548 assert(offset == (offset & 0xfffc));
1550 code[0] |= offset << 21;
1551 code[1] |= offset >> 11;
1552 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
1556 CodeEmitterGK110::emitSULDGB(const TexInstruction *i)
1558 code[0] = 0x00000002;
1559 code[1] = 0x30000000 | (i->subOp << 14);
1561 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1562 emitLoadStoreType(i->dType, 0x38);
1563 emitCachingMode(i->cache, 0x36);
1568 assert(i->src(1).getFile() == FILE_GPR);
1569 code[1] |= 0x49800000;
1571 emitLoadStoreType(i->dType, 0x21);
1572 emitSUCachingMode(i->cache);
1574 srcId(i->src(1), 23);
1577 emitSUGType(i->sType, 0x34);
1580 defId(i->def(0), 2); // destination
1581 srcId(i->src(0), 10); // address
1583 // surface predicate
1584 if (!i->srcExists(2) || (i->predSrc == 2)) {
1585 code[1] |= 0x7 << 10;
1587 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1589 srcId(i->src(2), 32 + 10);
1594 CodeEmitterGK110::emitSUSTGx(const TexInstruction *i)
1596 assert(i->op == OP_SUSTP);
1598 code[0] = 0x00000002;
1599 code[1] = 0x38000000;
1601 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1602 code[0] |= i->subOp << 2;
1604 if (i->op == OP_SUSTP)
1605 code[0] |= i->tex.mask << 4;
1607 emitSUGType(i->sType, 0x8);
1608 emitCachingMode(i->cache, 0x36);
1613 assert(i->src(1).getFile() == FILE_GPR);
1615 code[0] |= i->subOp << 23;
1616 code[1] |= 0x41c00000;
1618 if (i->op == OP_SUSTP)
1619 code[0] |= i->tex.mask << 25;
1621 emitSUGType(i->sType, 0x1d);
1622 emitSUCachingMode(i->cache);
1624 srcId(i->src(1), 2);
1628 srcId(i->src(0), 10); // address
1629 srcId(i->src(3), 42); // values
1631 // surface predicate
1632 if (!i->srcExists(2) || (i->predSrc == 2)) {
1633 code[1] |= 0x7 << 18;
1635 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1637 srcId(i->src(2), 32 + 18);
1642 CodeEmitterGK110::emitSUCLAMPMode(uint16_t subOp)
1645 switch (subOp & ~NV50_IR_SUBOP_SUCLAMP_2D) {
1646 case NV50_IR_SUBOP_SUCLAMP_SD(0, 1): m = 0; break;
1647 case NV50_IR_SUBOP_SUCLAMP_SD(1, 1): m = 1; break;
1648 case NV50_IR_SUBOP_SUCLAMP_SD(2, 1): m = 2; break;
1649 case NV50_IR_SUBOP_SUCLAMP_SD(3, 1): m = 3; break;
1650 case NV50_IR_SUBOP_SUCLAMP_SD(4, 1): m = 4; break;
1651 case NV50_IR_SUBOP_SUCLAMP_PL(0, 1): m = 5; break;
1652 case NV50_IR_SUBOP_SUCLAMP_PL(1, 1): m = 6; break;
1653 case NV50_IR_SUBOP_SUCLAMP_PL(2, 1): m = 7; break;
1654 case NV50_IR_SUBOP_SUCLAMP_PL(3, 1): m = 8; break;
1655 case NV50_IR_SUBOP_SUCLAMP_PL(4, 1): m = 9; break;
1656 case NV50_IR_SUBOP_SUCLAMP_BL(0, 1): m = 10; break;
1657 case NV50_IR_SUBOP_SUCLAMP_BL(1, 1): m = 11; break;
1658 case NV50_IR_SUBOP_SUCLAMP_BL(2, 1): m = 12; break;
1659 case NV50_IR_SUBOP_SUCLAMP_BL(3, 1): m = 13; break;
1660 case NV50_IR_SUBOP_SUCLAMP_BL(4, 1): m = 14; break;
1665 if (subOp & NV50_IR_SUBOP_SUCLAMP_2D)
1670 CodeEmitterGK110::emitSUCalc(Instruction *i)
1672 ImmediateValue *imm = NULL;
1673 uint64_t opc1, opc2;
1675 if (i->srcExists(2)) {
1676 imm = i->getSrc(2)->asImm();
1678 i->setSrc(2, NULL); // special case, make emitForm_21 not assert
1682 case OP_SUCLAMP: opc1 = 0xb00; opc2 = 0x580; break;
1683 case OP_SUBFM: opc1 = 0xb68; opc2 = 0x1e8; break;
1684 case OP_SUEAU: opc1 = 0xb6c; opc2 = 0x1ec; break;
1689 emitForm_21(i, opc2, opc1);
1691 if (i->op == OP_SUCLAMP) {
1692 if (i->dType == TYPE_S32)
1694 emitSUCLAMPMode(i->subOp);
1697 if (i->op == OP_SUBFM && i->subOp == NV50_IR_SUBOP_SUBFM_3D)
1700 if (i->op != OP_SUEAU) {
1701 const uint8_t pos = i->op == OP_SUBFM ? 19 : 16;
1702 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
1703 code[0] |= 255 << 2;
1704 code[1] |= i->getDef(1)->reg.data.id << pos;
1706 if (i->defExists(1)) { // r, p
1707 assert(i->def(1).getFile() == FILE_PREDICATE);
1708 code[1] |= i->getDef(1)->reg.data.id << pos;
1710 code[1] |= 7 << pos;
1715 assert(i->op == OP_SUCLAMP);
1717 code[1] |= (imm->reg.data.u32 & 0x3f) << 10; // sint6
1723 CodeEmitterGK110::emitVectorSubOp(const Instruction *i)
1725 switch (NV50_IR_SUBOP_Vn(i->subOp)) {
1727 code[1] |= (i->subOp & 0x000f) << 7; // vsrc1
1728 code[1] |= (i->subOp & 0x00e0) >> 6; // vsrc2
1729 code[1] |= (i->subOp & 0x0100) << 13; // vsrc2
1730 code[1] |= (i->subOp & 0x3c00) << 12; // vdst
1739 CodeEmitterGK110::emitVSHL(const Instruction *i)
1741 code[0] = 0x00000002;
1742 code[1] = 0xb8000000;
1744 assert(NV50_IR_SUBOP_Vn(i->subOp) == 0);
1746 if (isSignedType(i->dType)) code[1] |= 1 << 25;
1747 if (isSignedType(i->sType)) code[1] |= 1 << 19;
1752 defId(i->def(0), 2);
1753 srcId(i->src(0), 10);
1755 if (i->getSrc(1)->reg.file == FILE_IMMEDIATE) {
1756 ImmediateValue *imm = i->getSrc(1)->asImm();
1758 code[0] |= (imm->reg.data.u32 & 0x01ff) << 23;
1759 code[1] |= (imm->reg.data.u32 & 0xfe00) >> 9;
1761 assert(i->getSrc(1)->reg.file == FILE_GPR);
1763 srcId(i->src(1), 23);
1765 srcId(i->src(2), 42);
1769 if (i->flagsDef >= 0)
1774 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1776 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1778 code[0] = 0x00000002 | (offset << 23);
1779 code[1] = 0x7d000000 | (offset >> 9);
1781 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1786 defId(i->def(0), 2);
1787 srcId(i->src(0).getIndirect(0), 10);
1791 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1793 uint32_t prim = i->src(0).get()->reg.data.u32;
1795 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1796 code[1] = 0x7f800000;
1800 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1802 defId(i->def(0), 2);
1807 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1809 unsigned int size = typeSizeof(i->dType);
1810 uint32_t offset = i->src(0).get()->reg.data.offset;
1812 code[0] = 0x00000002 | (offset << 23);
1813 code[1] = 0x7ec00000 | (offset >> 9);
1814 code[1] |= (size / 4 - 1) << 18;
1818 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1819 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1823 defId(i->def(0), 2);
1824 srcId(i->src(0).getIndirect(0), 10);
1825 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1829 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1831 unsigned int size = typeSizeof(i->dType);
1832 uint32_t offset = i->src(0).get()->reg.data.offset;
1834 code[0] = 0x00000002 | (offset << 23);
1835 code[1] = 0x7f000000 | (offset >> 9);
1836 code[1] |= (size / 4 - 1) << 18;
1843 assert(i->src(1).getFile() == FILE_GPR);
1845 srcId(i->src(0).getIndirect(0), 10);
1846 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1847 srcId(i->src(1), 2);
1851 CodeEmitterGK110::emitOUT(const Instruction *i)
1853 assert(i->src(0).getFile() == FILE_GPR);
1855 emitForm_21(i, 0x1f0, 0xb70);
1857 if (i->op == OP_EMIT)
1859 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1864 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1866 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1867 code[1] |= (i->ipa & 0xc) << (19 - 2);
1871 interpApply(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1873 int ipa = entry->ipa;
1874 int reg = entry->reg;
1875 int loc = entry->loc;
1877 if (data.flatshade &&
1878 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1879 ipa = NV50_IR_INTERP_FLAT;
1881 } else if (data.force_persample_interp &&
1882 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1883 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1884 ipa |= NV50_IR_INTERP_CENTROID;
1886 code[loc + 1] &= ~(0xf << 19);
1887 code[loc + 1] |= (ipa & 0x3) << 21;
1888 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1889 code[loc + 0] &= ~(0xff << 23);
1890 code[loc + 0] |= reg << 23;
1894 CodeEmitterGK110::emitINTERP(const Instruction *i)
1896 const uint32_t base = i->getSrc(0)->reg.data.offset;
1898 code[0] = 0x00000002 | (base << 31);
1899 code[1] = 0x74800000 | (base >> 1);
1904 if (i->op == OP_PINTERP) {
1905 srcId(i->src(1), 23);
1906 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1908 code[0] |= 0xff << 23;
1909 addInterp(i->ipa, 0xff, interpApply);
1912 srcId(i->src(0).getIndirect(0), 10);
1916 defId(i->def(0), 2);
1918 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1919 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1921 code[1] |= 0xff << 10;
1925 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1957 assert(!"invalid ld/st type");
1960 code[pos / 32] |= n << (pos % 32);
1964 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1985 assert(!"invalid caching mode");
1988 code[pos / 32] |= n << (pos % 32);
1992 CodeEmitterGK110::emitSTORE(const Instruction *i)
1994 int32_t offset = SDATA(i->src(0)).offset;
1996 switch (i->src(0).getFile()) {
1997 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1998 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1999 case FILE_MEMORY_SHARED:
2000 code[0] = 0x00000002;
2001 if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
2002 code[1] = 0x78400000;
2004 code[1] = 0x7ac00000;
2007 assert(!"invalid memory file");
2011 if (code[0] & 0x2) {
2013 emitLoadStoreType(i->dType, 0x33);
2014 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2015 emitCachingMode(i->cache, 0x2f);
2017 emitLoadStoreType(i->dType, 0x38);
2018 emitCachingMode(i->cache, 0x3b);
2020 code[0] |= offset << 23;
2021 code[1] |= offset >> 9;
2023 // Unlocked store on shared memory can fail.
2024 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2025 i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
2026 assert(i->defExists(0));
2027 defId(i->def(0), 32 + 16);
2032 srcId(i->src(1), 2);
2033 srcId(i->src(0).getIndirect(0), 10);
2034 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2035 i->src(0).isIndirect(0) &&
2036 i->getIndirect(0, 0)->reg.size == 8)
2041 CodeEmitterGK110::emitLOAD(const Instruction *i)
2043 int32_t offset = SDATA(i->src(0)).offset;
2045 switch (i->src(0).getFile()) {
2046 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
2047 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
2048 case FILE_MEMORY_SHARED:
2049 code[0] = 0x00000002;
2050 if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
2051 code[1] = 0x77400000;
2053 code[1] = 0x7a400000;
2055 case FILE_MEMORY_CONST:
2056 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
2061 code[0] = 0x00000002;
2062 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
2063 code[1] |= i->subOp << 15;
2066 assert(!"invalid memory file");
2070 if (code[0] & 0x2) {
2072 emitLoadStoreType(i->dType, 0x33);
2073 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2074 emitCachingMode(i->cache, 0x2f);
2076 emitLoadStoreType(i->dType, 0x38);
2077 emitCachingMode(i->cache, 0x3b);
2079 code[0] |= offset << 23;
2080 code[1] |= offset >> 9;
2082 // Locked store on shared memory can fail.
2084 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2085 i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
2086 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
2089 } else if (i->defExists(1)) { // r, p
2092 assert(!"Expected predicate dest for load locked");
2099 defId(i->def(r), 2);
2101 code[0] |= 255 << 2;
2104 defId(i->def(p), 32 + 16);
2106 if (i->getIndirect(0, 0)) {
2107 srcId(i->src(0).getIndirect(0), 10);
2108 if (i->getIndirect(0, 0)->reg.size == 8)
2111 code[0] |= 255 << 10;
2116 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
2118 switch (SDATA(ref).sv.sv) {
2119 case SV_LANEID: return 0x00;
2120 case SV_PHYSID: return 0x03;
2121 case SV_VERTEX_COUNT: return 0x10;
2122 case SV_INVOCATION_ID: return 0x11;
2123 case SV_YDIR: return 0x12;
2124 case SV_THREAD_KILL: return 0x13;
2125 case SV_TID: return 0x21 + SDATA(ref).sv.index;
2126 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
2127 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
2128 case SV_GRIDID: return 0x2c;
2129 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
2130 case SV_LBASE: return 0x34;
2131 case SV_SBASE: return 0x30;
2132 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
2134 assert(!"no sreg for system value");
2140 CodeEmitterGK110::emitMOV(const Instruction *i)
2142 if (i->def(0).getFile() == FILE_PREDICATE) {
2143 if (i->src(0).getFile() == FILE_GPR) {
2144 // Use ISETP.NE.AND dst, PT, src, RZ, PT
2145 code[0] = 0x00000002;
2146 code[1] = 0xdb500000;
2148 code[0] |= 0x7 << 2;
2149 code[0] |= 0xff << 23;
2150 code[1] |= 0x7 << 10;
2151 srcId(i->src(0), 10);
2153 if (i->src(0).getFile() == FILE_PREDICATE) {
2154 // Use PSETP.AND.AND dst, PT, src, PT, PT
2155 code[0] = 0x00000002;
2156 code[1] = 0x84800000;
2158 code[0] |= 0x7 << 2;
2159 code[1] |= 0x7 << 0;
2160 code[1] |= 0x7 << 10;
2162 srcId(i->src(0), 14);
2164 assert(!"Unexpected source for predicate destination");
2168 defId(i->def(0), 5);
2170 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
2171 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
2172 code[1] = 0x86400000;
2174 defId(i->def(0), 2);
2176 if (i->src(0).getFile() == FILE_IMMEDIATE) {
2177 code[0] = 0x00000002 | (i->lanes << 14);
2178 code[1] = 0x74000000;
2180 defId(i->def(0), 2);
2181 setImmediate32(i, 0, Modifier(0));
2183 if (i->src(0).getFile() == FILE_PREDICATE) {
2184 code[0] = 0x00000002;
2185 code[1] = 0x84401c07;
2187 defId(i->def(0), 2);
2188 srcId(i->src(0), 14);
2190 emitForm_C(i, 0x24c, 2);
2191 code[1] |= i->lanes << 10;
2196 uses64bitAddress(const Instruction *ldst)
2198 return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2199 ldst->src(0).isIndirect(0) &&
2200 ldst->getIndirect(0, 0)->reg.size == 8;
2204 CodeEmitterGK110::emitATOM(const Instruction *i)
2206 const bool hasDst = i->defExists(0);
2207 const bool exch = i->subOp == NV50_IR_SUBOP_ATOM_EXCH;
2209 code[0] = 0x00000002;
2210 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
2211 code[1] = 0x77800000;
2213 code[1] = 0x68000000;
2216 case NV50_IR_SUBOP_ATOM_CAS: break;
2217 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
2218 default: code[1] |= i->subOp << 23; break;
2222 case TYPE_U32: break;
2223 case TYPE_S32: code[1] |= 0x00100000; break;
2224 case TYPE_U64: code[1] |= 0x00200000; break;
2225 case TYPE_F32: code[1] |= 0x00300000; break;
2226 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
2227 case TYPE_S64: code[1] |= 0x00500000; break;
2228 default: assert(!"unsupported type"); break;
2233 /* TODO: cas: check that src regs line up */
2234 /* TODO: cas: flip bits if $r255 is used */
2235 srcId(i->src(1), 23);
2238 defId(i->def(0), 2);
2241 code[0] |= 255 << 2;
2244 if (hasDst || !exch) {
2245 const int32_t offset = SDATA(i->src(0)).offset;
2246 assert(offset < 0x80000 && offset >= -0x80000);
2247 code[0] |= (offset & 1) << 31;
2248 code[1] |= (offset & 0xffffe) >> 1;
2250 srcAddr32(i->src(0), 31);
2253 if (i->getIndirect(0, 0)) {
2254 srcId(i->getIndirect(0, 0), 10);
2255 if (i->getIndirect(0, 0)->reg.size == 8)
2258 code[0] |= 255 << 10;
2263 CodeEmitterGK110::emitCCTL(const Instruction *i)
2265 int32_t offset = SDATA(i->src(0)).offset;
2267 code[0] = 0x00000002 | (i->subOp << 2);
2269 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
2270 code[1] = 0x7b000000;
2272 code[1] = 0x7c000000;
2275 code[0] |= offset << 23;
2276 code[1] |= offset >> 9;
2278 if (uses64bitAddress(i))
2280 srcId(i->src(0).getIndirect(0), 10);
2286 CodeEmitterGK110::emitInstruction(Instruction *insn)
2288 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
2290 if (insn->encSize != 8) {
2291 ERROR("skipping unencodable instruction: ");
2295 if (codeSize + size > codeSizeLimit) {
2296 ERROR("code emitter output buffer too small\n");
2300 if (writeIssueDelays) {
2301 int id = (codeSize & 0x3f) / 8 - 1;
2304 code[0] = 0x00000000; // cf issue delay "instruction"
2305 code[1] = 0x08000000;
2309 uint32_t *data = code - (id * 2 + 2);
2312 case 0: data[0] |= insn->sched << 2; break;
2313 case 1: data[0] |= insn->sched << 10; break;
2314 case 2: data[0] |= insn->sched << 18; break;
2315 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
2316 case 4: data[1] |= insn->sched << 2; break;
2317 case 5: data[1] |= insn->sched << 10; break;
2318 case 6: data[1] |= insn->sched << 18; break;
2325 // assert that instructions with multiple defs don't corrupt registers
2326 for (int d = 0; insn->defExists(d); ++d)
2327 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
2364 if (insn->dType == TYPE_F64)
2366 else if (isFloatType(insn->dType))
2372 if (insn->dType == TYPE_F64)
2374 else if (isFloatType(insn->dType))
2381 if (insn->dType == TYPE_F64)
2383 else if (isFloatType(insn->dType))
2398 emitLogicOp(insn, 0);
2401 emitLogicOp(insn, 1);
2404 emitLogicOp(insn, 2);
2414 emitSET(insn->asCmp());
2420 emitSLCT(insn->asCmp());
2435 if (insn->def(0).getFile() == FILE_PREDICATE ||
2436 insn->src(0).getFile() == FILE_PREDICATE)
2442 emitSFnOp(insn, 5 + 2 * insn->subOp);
2445 emitSFnOp(insn, 4 + 2 * insn->subOp);
2470 emitTEX(insn->asTex());
2473 emitTXQ(insn->asTex());
2498 emitQUADOP(insn, insn->subOp, insn->lanes);
2501 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
2504 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
2541 emitSULDGB(insn->asTex());
2545 emitSUSTGx(insn->asTex());
2558 ERROR("operation should have been eliminated");
2564 ERROR("operation should have been lowered\n");
2567 ERROR("unknown op: %u\n", insn->op);
2580 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2582 // No more short instruction encodings.
2587 CodeEmitterGK110::prepareEmission(Function *func)
2589 const Target *targ = func->getProgram()->getTarget();
2591 CodeEmitter::prepareEmission(func);
2593 if (targ->hasSWSched)
2594 calculateSchedDataNVC0(targ, func);
2597 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2598 : CodeEmitter(target),
2600 writeIssueDelays(target->hasSWSched)
2603 codeSize = codeSizeLimit = 0;
2608 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2610 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2611 emit->setProgramType(type);
2615 } // namespace nv50_ir