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gallium: add PIPE_CAP_MAX_GS_INVOCATIONS
[android-x86/external-mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * on the rights to use, copy, modify, merge, publish, distribute, sub
9  * license, and/or sell copies of the Software, and to permit persons to whom
10  * the Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "util/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41  *
42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
43  *
44  * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47     return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52     return "ATI";
53 }
54
55 static const char* chip_families[] = {
56     "unknown",
57     "ATI R300",
58     "ATI R350",
59     "ATI RV350",
60     "ATI RV370",
61     "ATI RV380",
62     "ATI RS400",
63     "ATI RC410",
64     "ATI RS480",
65     "ATI R420",
66     "ATI R423",
67     "ATI R430",
68     "ATI R480",
69     "ATI R481",
70     "ATI RV410",
71     "ATI RS600",
72     "ATI RS690",
73     "ATI RS740",
74     "ATI RV515",
75     "ATI R520",
76     "ATI RV530",
77     "ATI R580",
78     "ATI RV560",
79     "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84     struct r300_screen* r300screen = r300_screen(pscreen);
85
86     return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91     struct r300_screen* r300screen = r300_screen(pscreen);
92     boolean is_r500 = r300screen->caps.is_r500;
93
94     switch (param) {
95         /* Supported features (boolean caps). */
96         case PIPE_CAP_NPOT_TEXTURES:
97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99         case PIPE_CAP_ANISOTROPIC_FILTER:
100         case PIPE_CAP_POINT_SPRITE:
101         case PIPE_CAP_OCCLUSION_QUERY:
102         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
103         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
104         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
105         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
106         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
107         case PIPE_CAP_CONDITIONAL_RENDER:
108         case PIPE_CAP_TEXTURE_BARRIER:
109         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
110         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
111         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
112         case PIPE_CAP_CLIP_HALFZ:
113         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
114             return 1;
115
116         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
117             return R300_BUFFER_ALIGNMENT;
118
119         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
120             return 16;
121
122         case PIPE_CAP_GLSL_FEATURE_LEVEL:
123         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
124             return 120;
125
126         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
127         case PIPE_CAP_TEXTURE_SWIZZLE:
128             return r300screen->caps.dxtc_swizzle;
129
130         /* We don't support color clamping on r500, so that we can use color
131          * intepolators for generic varyings. */
132         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
133             return !is_r500;
134
135         /* Supported on r500 only. */
136         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
137         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
138         case PIPE_CAP_SM3:
139             return is_r500 ? 1 : 0;
140
141         /* Unsupported features. */
142         case PIPE_CAP_QUERY_TIME_ELAPSED:
143         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
144         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
145         case PIPE_CAP_INDEP_BLEND_ENABLE:
146         case PIPE_CAP_INDEP_BLEND_FUNC:
147         case PIPE_CAP_DEPTH_CLIP_DISABLE:
148         case PIPE_CAP_SHADER_STENCIL_EXPORT:
149         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
150         case PIPE_CAP_TGSI_INSTANCEID:
151         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
152         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
153         case PIPE_CAP_SEAMLESS_CUBE_MAP:
154         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
155         case PIPE_CAP_MIN_TEXEL_OFFSET:
156         case PIPE_CAP_MAX_TEXEL_OFFSET:
157         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
158         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
159         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
160         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
161         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
162         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
163         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
164         case PIPE_CAP_MAX_VERTEX_STREAMS:
165         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
166         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
167         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
168         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
169         case PIPE_CAP_COMPUTE:
170         case PIPE_CAP_START_INSTANCE:
171         case PIPE_CAP_QUERY_TIMESTAMP:
172         case PIPE_CAP_TEXTURE_MULTISAMPLE:
173         case PIPE_CAP_CUBE_MAP_ARRAY:
174         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
175         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
176         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
177         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
178         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
179         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
180         case PIPE_CAP_TEXTURE_GATHER_SM5:
181         case PIPE_CAP_TEXTURE_QUERY_LOD:
182         case PIPE_CAP_FAKE_SW_MSAA:
183         case PIPE_CAP_SAMPLE_SHADING:
184         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
185         case PIPE_CAP_DRAW_INDIRECT:
186         case PIPE_CAP_MULTI_DRAW_INDIRECT:
187         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
188         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
189         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
190         case PIPE_CAP_SAMPLER_VIEW_TARGET:
191         case PIPE_CAP_VERTEXID_NOBASE:
192         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
193         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
194         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
195         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
196         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
197         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
198         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
199         case PIPE_CAP_DEPTH_BOUNDS_TEST:
200         case PIPE_CAP_TGSI_TXQS:
201         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
202         case PIPE_CAP_SHAREABLE_SHADERS:
203         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
204         case PIPE_CAP_CLEAR_TEXTURE:
205         case PIPE_CAP_DRAW_PARAMETERS:
206         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
207         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
208         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
209         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
210         case PIPE_CAP_INVALIDATE_BUFFER:
211         case PIPE_CAP_GENERATE_MIPMAP:
212         case PIPE_CAP_STRING_MARKER:
213         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
214         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
215         case PIPE_CAP_QUERY_BUFFER_OBJECT:
216         case PIPE_CAP_QUERY_MEMORY_INFO:
217         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
218         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
219         case PIPE_CAP_CULL_DISTANCE:
220         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
221         case PIPE_CAP_TGSI_VOTE:
222         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
223         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
224         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
225         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
226         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
227         case PIPE_CAP_NATIVE_FENCE_FD:
228         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
229         case PIPE_CAP_TGSI_FS_FBFETCH:
230         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
231         case PIPE_CAP_DOUBLES:
232         case PIPE_CAP_INT64:
233         case PIPE_CAP_INT64_DIVMOD:
234         case PIPE_CAP_TGSI_TEX_TXF_LZ:
235         case PIPE_CAP_TGSI_CLOCK:
236         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
237         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
238         case PIPE_CAP_TGSI_BALLOT:
239         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
240         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
241         case PIPE_CAP_POST_DEPTH_COVERAGE:
242         case PIPE_CAP_BINDLESS_TEXTURE:
243         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
244         case PIPE_CAP_QUERY_SO_OVERFLOW:
245         case PIPE_CAP_MEMOBJ:
246         case PIPE_CAP_LOAD_CONSTBUF:
247         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
248         case PIPE_CAP_TILE_RASTER_ORDER:
249         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
250         case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
251         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
252         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
253         case PIPE_CAP_FENCE_SIGNAL:
254         case PIPE_CAP_CONSTBUF0_FLAGS:
255         case PIPE_CAP_PACKED_UNIFORMS:
256         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
257         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
258         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
259         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
260         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
261         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
262         case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
263             return 0;
264
265         case PIPE_CAP_MAX_GS_INVOCATIONS:
266             return 32;
267
268         /* SWTCL-only features. */
269         case PIPE_CAP_PRIMITIVE_RESTART:
270         case PIPE_CAP_USER_VERTEX_BUFFERS:
271         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
272             return !r300screen->caps.has_tcl;
273
274         /* HWTCL-only features / limitations. */
275         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
276         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
277         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
278             return r300screen->caps.has_tcl;
279         case PIPE_CAP_TGSI_TEXCOORD:
280             return 0;
281
282         /* Texturing. */
283         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
284         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
285         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
286             /* 13 == 4096, 12 == 2048 */
287             return is_r500 ? 13 : 12;
288
289         /* Render targets. */
290         case PIPE_CAP_MAX_RENDER_TARGETS:
291             return 4;
292         case PIPE_CAP_ENDIANNESS:
293             return PIPE_ENDIAN_LITTLE;
294
295         case PIPE_CAP_MAX_VIEWPORTS:
296             return 1;
297
298         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
299             return 2048;
300
301         case PIPE_CAP_VENDOR_ID:
302                 return 0x1002;
303         case PIPE_CAP_DEVICE_ID:
304                 return r300screen->info.pci_id;
305         case PIPE_CAP_ACCELERATED:
306                 return 1;
307         case PIPE_CAP_VIDEO_MEMORY:
308                 return r300screen->info.vram_size >> 20;
309         case PIPE_CAP_UMA:
310                 return 0;
311         case PIPE_CAP_PCI_GROUP:
312             return r300screen->info.pci_domain;
313         case PIPE_CAP_PCI_BUS:
314             return r300screen->info.pci_bus;
315         case PIPE_CAP_PCI_DEVICE:
316             return r300screen->info.pci_dev;
317         case PIPE_CAP_PCI_FUNCTION:
318             return r300screen->info.pci_func;
319     }
320     return 0;
321 }
322
323 static int r300_get_shader_param(struct pipe_screen *pscreen,
324                                  enum pipe_shader_type shader,
325                                  enum pipe_shader_cap param)
326 {
327    struct r300_screen* r300screen = r300_screen(pscreen);
328    boolean is_r400 = r300screen->caps.is_r400;
329    boolean is_r500 = r300screen->caps.is_r500;
330
331    switch (shader) {
332     case PIPE_SHADER_FRAGMENT:
333         switch (param)
334         {
335         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
336             return is_r500 || is_r400 ? 512 : 96;
337         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
338             return is_r500 || is_r400 ? 512 : 64;
339         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
340             return is_r500 || is_r400 ? 512 : 32;
341         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
342             return is_r500 ? 511 : 4;
343         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
344             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
345             /* Fragment shader limits. */
346         case PIPE_SHADER_CAP_MAX_INPUTS:
347             /* 2 colors + 8 texcoords are always supported
348              * (minus fog and wpos).
349              *
350              * R500 has the ability to turn 3rd and 4th color into
351              * additional texcoords but there is no two-sided color
352              * selection then. However the facing bit can be used instead. */
353             return 10;
354         case PIPE_SHADER_CAP_MAX_OUTPUTS:
355             return 4;
356         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
357             return (is_r500 ? 256 : 32) * sizeof(float[4]);
358         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
359         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
360             return 1;
361         case PIPE_SHADER_CAP_MAX_TEMPS:
362             return is_r500 ? 128 : is_r400 ? 64 : 32;
363         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
364         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
365            return r300screen->caps.num_tex_units;
366         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
367         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
368         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
369         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
370         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
371         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
372         case PIPE_SHADER_CAP_SUBROUTINES:
373         case PIPE_SHADER_CAP_INTEGERS:
374         case PIPE_SHADER_CAP_INT64_ATOMICS:
375         case PIPE_SHADER_CAP_FP16:
376         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
377         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
378         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
379         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
380         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
381         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
382         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
383         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
384         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
385         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
386             return 0;
387         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
388             return 32;
389         case PIPE_SHADER_CAP_PREFERRED_IR:
390             return PIPE_SHADER_IR_TGSI;
391         case PIPE_SHADER_CAP_SUPPORTED_IRS:
392             return 0;
393         }
394         break;
395     case PIPE_SHADER_VERTEX:
396         switch (param)
397         {
398         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
399         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
400         case PIPE_SHADER_CAP_SUBROUTINES:
401             return 0;
402         default:;
403         }
404
405         if (!r300screen->caps.has_tcl) {
406             return draw_get_shader_param(shader, param);
407         }
408
409         switch (param)
410         {
411         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
412         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
413             return is_r500 ? 1024 : 256;
414         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
415             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
416         case PIPE_SHADER_CAP_MAX_INPUTS:
417             return 16;
418         case PIPE_SHADER_CAP_MAX_OUTPUTS:
419             return 10;
420         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
421             return 256 * sizeof(float[4]);
422         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
423             return 1;
424         case PIPE_SHADER_CAP_MAX_TEMPS:
425             return 32;
426         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
427         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
428             return 1;
429         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
430         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
431         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
432         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
433         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
434         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
435         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
436         case PIPE_SHADER_CAP_SUBROUTINES:
437         case PIPE_SHADER_CAP_INTEGERS:
438         case PIPE_SHADER_CAP_FP16:
439         case PIPE_SHADER_CAP_INT64_ATOMICS:
440         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
441         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
442         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
443         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
444         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
445         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
446         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
447         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
448         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
449         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
450         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
451         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
452             return 0;
453         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
454             return 32;
455         case PIPE_SHADER_CAP_PREFERRED_IR:
456             return PIPE_SHADER_IR_TGSI;
457         case PIPE_SHADER_CAP_SUPPORTED_IRS:
458             return 0;
459         }
460         break;
461     default:
462         ; /* nothing */
463     }
464     return 0;
465 }
466
467 static float r300_get_paramf(struct pipe_screen* pscreen,
468                              enum pipe_capf param)
469 {
470     struct r300_screen* r300screen = r300_screen(pscreen);
471
472     switch (param) {
473         case PIPE_CAPF_MAX_LINE_WIDTH:
474         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
475         case PIPE_CAPF_MAX_POINT_WIDTH:
476         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
477             /* The maximum dimensions of the colorbuffer are our practical
478              * rendering limits. 2048 pixels should be enough for anybody. */
479             if (r300screen->caps.is_r500) {
480                 return 4096.0f;
481             } else if (r300screen->caps.is_r400) {
482                 return 4021.0f;
483             } else {
484                 return 2560.0f;
485             }
486         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
487             return 16.0f;
488         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
489             return 16.0f;
490         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
491         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
492         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
493             return 0.0f;
494         default:
495             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
496                          param);
497             return 0.0f;
498     }
499 }
500
501 static int r300_get_video_param(struct pipe_screen *screen,
502                                 enum pipe_video_profile profile,
503                                 enum pipe_video_entrypoint entrypoint,
504                                 enum pipe_video_cap param)
505 {
506    switch (param) {
507       case PIPE_VIDEO_CAP_SUPPORTED:
508          return vl_profile_supported(screen, profile, entrypoint);
509       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
510          return 0;
511       case PIPE_VIDEO_CAP_MAX_WIDTH:
512       case PIPE_VIDEO_CAP_MAX_HEIGHT:
513          return vl_video_buffer_max_size(screen);
514       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
515          return PIPE_FORMAT_NV12;
516       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
517          return false;
518       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
519          return false;
520       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
521          return true;
522       case PIPE_VIDEO_CAP_MAX_LEVEL:
523          return vl_level_supported(screen, profile);
524       default:
525          return 0;
526    }
527 }
528
529 /**
530  * Whether the format matches:
531  *   PIPE_FORMAT_?10?10?10?2_UNORM
532  */
533 static inline boolean
534 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
535 {
536    static const unsigned size[4] = {10, 10, 10, 2};
537    unsigned chan;
538
539    if (desc->block.width != 1 ||
540        desc->block.height != 1 ||
541        desc->block.bits != 32)
542       return FALSE;
543
544    for (chan = 0; chan < 4; ++chan) {
545       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
546          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
547          return FALSE;
548       if (desc->channel[chan].size != size[chan])
549          return FALSE;
550    }
551
552    return TRUE;
553 }
554
555 static bool r300_is_blending_supported(struct r300_screen *rscreen,
556                                        enum pipe_format format)
557 {
558     int c;
559     const struct util_format_description *desc =
560         util_format_description(format);
561
562     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
563         return false;
564
565     c = util_format_get_first_non_void_channel(format);
566
567     /* RGBA16F */
568     if (rscreen->caps.is_r500 &&
569         desc->nr_channels == 4 &&
570         desc->channel[c].size == 16 &&
571         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
572         return true;
573
574     if (desc->channel[c].normalized &&
575         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
576         desc->channel[c].size >= 4 &&
577         desc->channel[c].size <= 10) {
578         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
579         if (desc->nr_channels >= 3)
580             return true;
581
582         if (format == PIPE_FORMAT_R8G8_UNORM)
583             return true;
584
585         /* R8, I8, L8, A8 */
586         if (desc->nr_channels == 1)
587             return true;
588     }
589
590     return false;
591 }
592
593 static boolean r300_is_format_supported(struct pipe_screen* screen,
594                                         enum pipe_format format,
595                                         enum pipe_texture_target target,
596                                         unsigned sample_count,
597                                         unsigned storage_sample_count,
598                                         unsigned usage)
599 {
600     uint32_t retval = 0;
601     boolean is_r500 = r300_screen(screen)->caps.is_r500;
602     boolean is_r400 = r300_screen(screen)->caps.is_r400;
603     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
604                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
605                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
606                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
607                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
608     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
609                        format == PIPE_FORMAT_RGTC1_SNORM ||
610                        format == PIPE_FORMAT_LATC1_UNORM ||
611                        format == PIPE_FORMAT_LATC1_SNORM;
612     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
613                        format == PIPE_FORMAT_RGTC2_SNORM ||
614                        format == PIPE_FORMAT_LATC2_UNORM ||
615                        format == PIPE_FORMAT_LATC2_SNORM;
616     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
617                             format == PIPE_FORMAT_R16G16_FLOAT ||
618                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
619                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
620                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
621     const struct util_format_description *desc;
622
623     if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
624         return false;
625
626     /* Check multisampling support. */
627     switch (sample_count) {
628         case 0:
629         case 1:
630             break;
631         case 2:
632         case 4:
633         case 6:
634             /* No texturing and scanout. */
635             if (usage & (PIPE_BIND_SAMPLER_VIEW |
636                          PIPE_BIND_DISPLAY_TARGET |
637                          PIPE_BIND_SCANOUT)) {
638                 return FALSE;
639             }
640
641             desc = util_format_description(format);
642
643             if (is_r500) {
644                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
645                 if (!util_format_is_depth_or_stencil(format) &&
646                     !util_format_is_rgba8_variant(desc) &&
647                     !util_format_is_rgba1010102_variant(desc) &&
648                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
649                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
650                     return FALSE;
651                 }
652             } else {
653                 /* Only allow depth/stencil, RGBA8. */
654                 if (!util_format_is_depth_or_stencil(format) &&
655                     !util_format_is_rgba8_variant(desc)) {
656                     return FALSE;
657                 }
658             }
659             break;
660         default:
661             return FALSE;
662     }
663
664     /* Check sampler format support. */
665     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
666         /* these two are broken for an unknown reason */
667         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
668         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
669         /* ATI1N is r5xx-only. */
670         (is_r500 || !is_ati1n) &&
671         /* ATI2N is supported on r4xx-r5xx. */
672         (is_r400 || is_r500 || !is_ati2n) &&
673         r300_is_sampler_format_supported(format)) {
674         retval |= PIPE_BIND_SAMPLER_VIEW;
675     }
676
677     /* Check colorbuffer format support. */
678     if ((usage & (PIPE_BIND_RENDER_TARGET |
679                   PIPE_BIND_DISPLAY_TARGET |
680                   PIPE_BIND_SCANOUT |
681                   PIPE_BIND_SHARED |
682                   PIPE_BIND_BLENDABLE)) &&
683         /* 2101010 cannot be rendered to on non-r5xx. */
684         (!is_color2101010 || is_r500) &&
685         r300_is_colorbuffer_format_supported(format)) {
686         retval |= usage &
687             (PIPE_BIND_RENDER_TARGET |
688              PIPE_BIND_DISPLAY_TARGET |
689              PIPE_BIND_SCANOUT |
690              PIPE_BIND_SHARED);
691
692         if (r300_is_blending_supported(r300_screen(screen), format)) {
693             retval |= usage & PIPE_BIND_BLENDABLE;
694         }
695     }
696
697     /* Check depth-stencil format support. */
698     if (usage & PIPE_BIND_DEPTH_STENCIL &&
699         r300_is_zs_format_supported(format)) {
700         retval |= PIPE_BIND_DEPTH_STENCIL;
701     }
702
703     /* Check vertex buffer format support. */
704     if (usage & PIPE_BIND_VERTEX_BUFFER) {
705         if (r300_screen(screen)->caps.has_tcl) {
706             /* Half float is supported on >= R400. */
707             if ((is_r400 || is_r500 || !is_half_float) &&
708                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
709                 retval |= PIPE_BIND_VERTEX_BUFFER;
710             }
711         } else {
712             /* SW TCL */
713             if (!util_format_is_pure_integer(format)) {
714                 retval |= PIPE_BIND_VERTEX_BUFFER;
715             }
716         }
717     }
718
719     return retval == usage;
720 }
721
722 static void r300_destroy_screen(struct pipe_screen* pscreen)
723 {
724     struct r300_screen* r300screen = r300_screen(pscreen);
725     struct radeon_winsys *rws = radeon_winsys(pscreen);
726
727     if (rws && !rws->unref(rws))
728       return;
729
730     mtx_destroy(&r300screen->cmask_mutex);
731     slab_destroy_parent(&r300screen->pool_transfers);
732
733     if (rws)
734       rws->destroy(rws);
735
736     FREE(r300screen);
737 }
738
739 static void r300_fence_reference(struct pipe_screen *screen,
740                                  struct pipe_fence_handle **ptr,
741                                  struct pipe_fence_handle *fence)
742 {
743     struct radeon_winsys *rws = r300_screen(screen)->rws;
744
745     rws->fence_reference(ptr, fence);
746 }
747
748 static boolean r300_fence_finish(struct pipe_screen *screen,
749                                  struct pipe_context *ctx,
750                                  struct pipe_fence_handle *fence,
751                                  uint64_t timeout)
752 {
753     struct radeon_winsys *rws = r300_screen(screen)->rws;
754
755     return rws->fence_wait(rws, fence, timeout);
756 }
757
758 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
759                                        const struct pipe_screen_config *config)
760 {
761     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
762
763     if (!r300screen) {
764         FREE(r300screen);
765         return NULL;
766     }
767
768     rws->query_info(rws, &r300screen->info);
769
770     r300_init_debug(r300screen);
771     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
772
773     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
774         r300screen->caps.zmask_ram = 0;
775     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
776         r300screen->caps.hiz_ram = 0;
777
778     r300screen->rws = rws;
779     r300screen->screen.destroy = r300_destroy_screen;
780     r300screen->screen.get_name = r300_get_name;
781     r300screen->screen.get_vendor = r300_get_vendor;
782     r300screen->screen.get_device_vendor = r300_get_device_vendor;
783     r300screen->screen.get_param = r300_get_param;
784     r300screen->screen.get_shader_param = r300_get_shader_param;
785     r300screen->screen.get_paramf = r300_get_paramf;
786     r300screen->screen.get_video_param = r300_get_video_param;
787     r300screen->screen.is_format_supported = r300_is_format_supported;
788     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
789     r300screen->screen.context_create = r300_create_context;
790     r300screen->screen.fence_reference = r300_fence_reference;
791     r300screen->screen.fence_finish = r300_fence_finish;
792
793     r300_init_screen_resource_functions(r300screen);
794
795     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
796
797     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
798
799     return &r300screen->screen;
800 }