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r300g: max_anisotropy of 1 is not anisotropic filtering
[android-x86/external-mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * on the rights to use, copy, modify, merge, publish, distribute, sub
9  * license, and/or sell copies of the Software, and to permit persons to whom
10  * the Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_math.h"
29 #include "util/u_mm.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
33
34 #include "tgsi/tgsi_parse.h"
35
36 #include "pipe/p_config.h"
37
38 #include "r300_cb.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
45 #include "r300_fs.h"
46 #include "r300_texture.h"
47 #include "r300_vs.h"
48
49 /* r300_state: Functions used to intialize state context by translating
50  * Gallium state objects into semi-native r300 state objects. */
51
52 #define UPDATE_STATE(cso, atom) \
53     if (cso != atom.state) { \
54         atom.state = cso;    \
55         r300_mark_atom_dirty(r300, &(atom));   \
56     }
57
58 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
59                                             unsigned dstRGB, unsigned dstA)
60 {
61     /* If the blend equation is ADD or REVERSE_SUBTRACT,
62      * SRC_ALPHA == 0, and the following state is set, the colorbuffer
63      * will not be changed.
64      * Notice that the dst factors are the src factors inverted. */
65     return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
66             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
67             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
68            (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
69             srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
70             srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
71             srcA == PIPE_BLENDFACTOR_ZERO) &&
72            (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73             dstRGB == PIPE_BLENDFACTOR_ONE) &&
74            (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
75             dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
76             dstA == PIPE_BLENDFACTOR_ONE);
77 }
78
79 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
80                                             unsigned dstRGB, unsigned dstA)
81 {
82     /* If the blend equation is ADD or REVERSE_SUBTRACT,
83      * SRC_ALPHA == 1, and the following state is set, the colorbuffer
84      * will not be changed.
85      * Notice that the dst factors are the src factors inverted. */
86     return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
88            (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
89             srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
90             srcA == PIPE_BLENDFACTOR_ZERO) &&
91            (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
92             dstRGB == PIPE_BLENDFACTOR_ONE) &&
93            (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
94             dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
95             dstA == PIPE_BLENDFACTOR_ONE);
96 }
97
98 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
99                                             unsigned dstRGB, unsigned dstA)
100 {
101     /* If the blend equation is ADD or REVERSE_SUBTRACT,
102      * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
103      * will not be changed.
104      * Notice that the dst factors are the src factors inverted. */
105     return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
106             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
107            (srcA == PIPE_BLENDFACTOR_ZERO) &&
108            (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
109             dstRGB == PIPE_BLENDFACTOR_ONE) &&
110            (dstA == PIPE_BLENDFACTOR_ONE);
111 }
112
113 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
114                                             unsigned dstRGB, unsigned dstA)
115 {
116     /* If the blend equation is ADD or REVERSE_SUBTRACT,
117      * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
118      * will not be changed.
119      * Notice that the dst factors are the src factors inverted. */
120     return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
121             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
122            (srcA == PIPE_BLENDFACTOR_ZERO) &&
123            (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
124             dstRGB == PIPE_BLENDFACTOR_ONE) &&
125            (dstA == PIPE_BLENDFACTOR_ONE);
126 }
127
128 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
129                                                   unsigned dstRGB, unsigned dstA)
130 {
131     /* If the blend equation is ADD or REVERSE_SUBTRACT,
132      * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
133      * the colorbuffer will not be changed.
134      * Notice that the dst factors are the src factors inverted. */
135     return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
136             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
137             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
138             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
139            (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
140             srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
141             srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
142             srcA == PIPE_BLENDFACTOR_ZERO) &&
143            (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144             dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145             dstRGB == PIPE_BLENDFACTOR_ONE) &&
146            (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
147             dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
148             dstA == PIPE_BLENDFACTOR_ONE);
149 }
150
151 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
152                                                   unsigned dstRGB, unsigned dstA)
153 {
154     /* If the blend equation is ADD or REVERSE_SUBTRACT,
155      * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
156      * the colorbuffer will not be changed.
157      * Notice that the dst factors are the src factors inverted. */
158     return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159             srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
161            (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
162             srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
163             srcA == PIPE_BLENDFACTOR_ZERO) &&
164            (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
165             dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
166             dstRGB == PIPE_BLENDFACTOR_ONE) &&
167            (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
168             dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
169             dstA == PIPE_BLENDFACTOR_ONE);
170 }
171
172 static unsigned bgra_cmask(unsigned mask)
173 {
174     /* Gallium uses RGBA color ordering while R300 expects BGRA. */
175
176     return ((mask & PIPE_MASK_R) << 2) |
177            ((mask & PIPE_MASK_B) >> 2) |
178            (mask & (PIPE_MASK_G | PIPE_MASK_A));
179 }
180
181 /* Create a new blend state based on the CSO blend state.
182  *
183  * This encompasses alpha blending, logic/raster ops, and blend dithering. */
184 static void* r300_create_blend_state(struct pipe_context* pipe,
185                                      const struct pipe_blend_state* state)
186 {
187     struct r300_screen* r300screen = r300_screen(pipe->screen);
188     struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
189     uint32_t blend_control = 0;       /* R300_RB3D_CBLEND: 0x4e04 */
190     uint32_t blend_control_noclamp = 0;    /* R300_RB3D_CBLEND: 0x4e04 */
191     uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
192     uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
193     uint32_t color_channel_mask = 0;  /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
194     uint32_t rop = 0;                 /* R300_RB3D_ROPCNTL: 0x4e18 */
195     uint32_t dither = 0;              /* R300_RB3D_DITHER_CTL: 0x4e50 */
196     CB_LOCALS;
197
198     blend->state = *state;
199
200     if (state->rt[0].blend_enable)
201     {
202         unsigned eqRGB = state->rt[0].rgb_func;
203         unsigned srcRGB = state->rt[0].rgb_src_factor;
204         unsigned dstRGB = state->rt[0].rgb_dst_factor;
205
206         unsigned eqA = state->rt[0].alpha_func;
207         unsigned srcA = state->rt[0].alpha_src_factor;
208         unsigned dstA = state->rt[0].alpha_dst_factor;
209
210         /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
211          * this is just the crappy D3D naming */
212         blend_control = blend_control_noclamp =
213             R300_ALPHA_BLEND_ENABLE |
214             ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
215             ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
216         blend_control |=
217             r300_translate_blend_function(eqRGB, TRUE);
218         blend_control_noclamp |=
219             r300_translate_blend_function(eqRGB, FALSE);
220
221         /* Optimization: some operations do not require the destination color.
222          *
223          * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
224          * otherwise blending gives incorrect results. It seems to be
225          * a hardware bug. */
226         if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
227             eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
228             dstRGB != PIPE_BLENDFACTOR_ZERO ||
229             dstA != PIPE_BLENDFACTOR_ZERO ||
230             srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
231             srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
232             srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
233             srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
234             srcA == PIPE_BLENDFACTOR_DST_COLOR ||
235             srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
236             srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
237             srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
238             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
239             /* Enable reading from the colorbuffer. */
240             blend_control |= R300_READ_ENABLE;
241             blend_control_noclamp |= R300_READ_ENABLE;
242
243             if (r300screen->caps.is_r500) {
244                 /* Optimization: Depending on incoming pixels, we can
245                  * conditionally disable the reading in hardware... */
246                 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
247                     eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
248                     /* Disable reading if SRC_ALPHA == 0. */
249                     if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
250                          dstRGB == PIPE_BLENDFACTOR_ZERO) &&
251                         (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
252                          dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
253                          dstA == PIPE_BLENDFACTOR_ZERO)) {
254                          blend_control |= R500_SRC_ALPHA_0_NO_READ;
255                     }
256
257                     /* Disable reading if SRC_ALPHA == 1. */
258                     if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
259                          dstRGB == PIPE_BLENDFACTOR_ZERO) &&
260                         (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
261                          dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
262                          dstA == PIPE_BLENDFACTOR_ZERO)) {
263                          blend_control |= R500_SRC_ALPHA_1_NO_READ;
264                     }
265                 }
266             }
267         }
268
269         /* Optimization: discard pixels which don't change the colorbuffer.
270          *
271          * The code below is non-trivial and some math is involved.
272          *
273          * Discarding pixels must be disabled when FP16 AA is enabled.
274          * This is a hardware bug. Also, this implementation wouldn't work
275          * with FP blending enabled and equation clamping disabled.
276          *
277          * Equations other than ADD are rarely used and therefore won't be
278          * optimized. */
279         if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
280             (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
281             /* ADD: X+Y
282              * REVERSE_SUBTRACT: Y-X
283              *
284              * The idea is:
285              * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
286              * then CB will not be changed.
287              *
288              * Given the srcFactor and dstFactor variables, we can derive
289              * what src and dst should be equal to and discard appropriate
290              * pixels.
291              */
292             if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
293                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
294             } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
295                                                     dstRGB, dstA)) {
296                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
297             } else if (blend_discard_if_src_color_0(srcRGB, srcA,
298                                                     dstRGB, dstA)) {
299                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
300             } else if (blend_discard_if_src_color_1(srcRGB, srcA,
301                                                     dstRGB, dstA)) {
302                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
303             } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
304                                                           dstRGB, dstA)) {
305                 blend_control |=
306                     R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
307             } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
308                                                           dstRGB, dstA)) {
309                 blend_control |=
310                     R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
311             }
312         }
313
314         /* separate alpha */
315         if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
316             blend_control |= R300_SEPARATE_ALPHA_ENABLE;
317             blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
318             alpha_blend_control = alpha_blend_control_noclamp =
319                 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
320                 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
321             alpha_blend_control |=
322                 r300_translate_blend_function(eqA, TRUE);
323             alpha_blend_control_noclamp |=
324                 r300_translate_blend_function(eqA, FALSE);
325         }
326     }
327
328     /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
329     if (state->logicop_enable) {
330         rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
331                 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
332     }
333
334     /* Color channel masks for all MRTs. */
335     color_channel_mask = bgra_cmask(state->rt[0].colormask);
336     if (r300screen->caps.is_r500 && state->independent_blend_enable) {
337         if (state->rt[1].blend_enable) {
338             color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
339         }
340         if (state->rt[2].blend_enable) {
341             color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
342         }
343         if (state->rt[3].blend_enable) {
344             color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
345         }
346     }
347
348     /* Neither fglrx nor classic r300 ever set this, regardless of dithering
349      * state. Since it's an optional implementation detail, we can leave it
350      * out and never dither.
351      *
352      * This could be revisited if we ever get quality or conformance hints.
353      *
354     if (state->dither) {
355         dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
356                         R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
357     }
358     */
359
360     /* Build a command buffer. */
361     BEGIN_CB(blend->cb_clamp, 8);
362     OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
363     OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
364     OUT_CB(blend_control);
365     OUT_CB(alpha_blend_control);
366     OUT_CB(color_channel_mask);
367     OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
368     END_CB;
369
370     /* Build a command buffer. */
371     BEGIN_CB(blend->cb_noclamp, 8);
372     OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
373     OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
374     OUT_CB(blend_control_noclamp);
375     OUT_CB(alpha_blend_control_noclamp);
376     OUT_CB(color_channel_mask);
377     OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
378     END_CB;
379
380     /* The same as above, but with no colorbuffer reads and writes. */
381     BEGIN_CB(blend->cb_no_readwrite, 8);
382     OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
383     OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
384     OUT_CB(0);
385     OUT_CB(0);
386     OUT_CB(0);
387     OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
388     END_CB;
389
390     return (void*)blend;
391 }
392
393 /* Bind blend state. */
394 static void r300_bind_blend_state(struct pipe_context* pipe,
395                                   void* state)
396 {
397     struct r300_context* r300 = r300_context(pipe);
398
399     UPDATE_STATE(state, r300->blend_state);
400 }
401
402 /* Free blend state. */
403 static void r300_delete_blend_state(struct pipe_context* pipe,
404                                     void* state)
405 {
406     FREE(state);
407 }
408
409 /* Convert float to 10bit integer */
410 static unsigned float_to_fixed10(float f)
411 {
412     return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
413 }
414
415 /* Set blend color.
416  * Setup both R300 and R500 registers, figure out later which one to write. */
417 static void r300_set_blend_color(struct pipe_context* pipe,
418                                  const struct pipe_blend_color* color)
419 {
420     struct r300_context* r300 = r300_context(pipe);
421     struct pipe_framebuffer_state *fb = r300->fb_state.state;
422     struct r300_blend_color_state *state =
423         (struct r300_blend_color_state*)r300->blend_color_state.state;
424     struct pipe_blend_color c;
425     enum pipe_format format = fb->nr_cbufs ? fb->cbufs[0]->format : 0;
426     CB_LOCALS;
427
428     state->state = *color; /* Save it, so that we can reuse it in set_fb_state */
429     c = *color;
430
431     /* The blend color is dependent on the colorbuffer format. */
432     if (fb->nr_cbufs) {
433         switch (format) {
434         case PIPE_FORMAT_R8_UNORM:
435         case PIPE_FORMAT_L8_UNORM:
436         case PIPE_FORMAT_I8_UNORM:
437             c.color[1] = c.color[0];
438             break;
439
440         case PIPE_FORMAT_A8_UNORM:
441             c.color[1] = c.color[3];
442             break;
443
444         case PIPE_FORMAT_R8G8_UNORM:
445             c.color[2] = c.color[1];
446             break;
447
448         case PIPE_FORMAT_L8A8_UNORM:
449             c.color[2] = c.color[3];
450             break;
451
452         default:;
453         }
454     }
455
456     if (r300->screen->caps.is_r500) {
457         BEGIN_CB(state->cb, 3);
458         OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
459
460         switch (format) {
461         case PIPE_FORMAT_R16G16B16A16_FLOAT:
462             OUT_CB(util_float_to_half(c.color[2]) |
463                    (util_float_to_half(c.color[3]) << 16));
464             OUT_CB(util_float_to_half(c.color[0]) |
465                    (util_float_to_half(c.color[1]) << 16));
466             break;
467
468         default:
469             OUT_CB(float_to_fixed10(c.color[0]) |
470                    (float_to_fixed10(c.color[3]) << 16));
471             OUT_CB(float_to_fixed10(c.color[2]) |
472                    (float_to_fixed10(c.color[1]) << 16));
473         }
474
475         END_CB;
476     } else {
477         union util_color uc;
478         util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
479
480         BEGIN_CB(state->cb, 2);
481         OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
482         END_CB;
483     }
484
485     r300_mark_atom_dirty(r300, &r300->blend_color_state);
486 }
487
488 static void r300_set_clip_state(struct pipe_context* pipe,
489                                 const struct pipe_clip_state* state)
490 {
491     struct r300_context* r300 = r300_context(pipe);
492     struct r300_clip_state *clip =
493             (struct r300_clip_state*)r300->clip_state.state;
494     CB_LOCALS;
495
496     clip->clip = *state;
497
498     if (r300->screen->caps.has_tcl) {
499         r300->clip_state.size = 2 + !!state->nr * 3 + state->nr * 4;
500
501         BEGIN_CB(clip->cb, r300->clip_state.size);
502         if (state->nr) {
503            OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
504                    (r300->screen->caps.is_r500 ?
505                     R500_PVS_UCP_START : R300_PVS_UCP_START));
506            OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, state->nr * 4);
507            OUT_CB_TABLE(state->ucp, state->nr * 4);
508         }
509         OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 << state->nr) - 1) |
510                    R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
511         END_CB;
512
513         r300_mark_atom_dirty(r300, &r300->clip_state);
514     } else {
515         draw_set_clip_state(r300->draw, state);
516     }
517 }
518
519 static void
520 r300_set_sample_mask(struct pipe_context *pipe,
521                      unsigned sample_mask)
522 {
523 }
524
525
526 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
527  *
528  * This contains the depth buffer, stencil buffer, alpha test, and such.
529  * On the Radeon, depth and stencil buffer setup are intertwined, which is
530  * the reason for some of the strange-looking assignments across registers. */
531 static void*
532         r300_create_dsa_state(struct pipe_context* pipe,
533                               const struct pipe_depth_stencil_alpha_state* state)
534 {
535     struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
536     struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
537     CB_LOCALS;
538
539     dsa->dsa = *state;
540
541     /* Depth test setup. - separate write mask depth for decomp flush */
542     if (state->depth.writemask) {
543         dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
544     }
545
546     if (state->depth.enabled) {
547         dsa->z_buffer_control |= R300_Z_ENABLE;
548
549         dsa->z_stencil_control |=
550             (r300_translate_depth_stencil_function(state->depth.func) <<
551                 R300_Z_FUNC_SHIFT);
552     } else {
553         /* We must enable depth test, otherwise occlusion queries won't work. */
554         dsa->z_buffer_control |= R300_Z_ENABLE;
555         dsa->z_stencil_control |= R300_ZS_ALWAYS;
556     }
557
558     /* Stencil buffer setup. */
559     if (state->stencil[0].enabled) {
560         dsa->z_buffer_control |= R300_STENCIL_ENABLE;
561         dsa->z_stencil_control |=
562             (r300_translate_depth_stencil_function(state->stencil[0].func) <<
563                 R300_S_FRONT_FUNC_SHIFT) |
564             (r300_translate_stencil_op(state->stencil[0].fail_op) <<
565                 R300_S_FRONT_SFAIL_OP_SHIFT) |
566             (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
567                 R300_S_FRONT_ZPASS_OP_SHIFT) |
568             (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
569                 R300_S_FRONT_ZFAIL_OP_SHIFT);
570
571         dsa->stencil_ref_mask =
572                 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
573                 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
574
575         if (state->stencil[1].enabled) {
576             dsa->two_sided = TRUE;
577
578             dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
579             dsa->z_stencil_control |=
580             (r300_translate_depth_stencil_function(state->stencil[1].func) <<
581                 R300_S_BACK_FUNC_SHIFT) |
582             (r300_translate_stencil_op(state->stencil[1].fail_op) <<
583                 R300_S_BACK_SFAIL_OP_SHIFT) |
584             (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
585                 R300_S_BACK_ZPASS_OP_SHIFT) |
586             (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
587                 R300_S_BACK_ZFAIL_OP_SHIFT);
588
589             dsa->stencil_ref_bf =
590                 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
591                 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
592
593             if (caps->is_r500) {
594                 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
595             } else {
596                 dsa->two_sided_stencil_ref =
597                   (state->stencil[0].valuemask != state->stencil[1].valuemask ||
598                    state->stencil[0].writemask != state->stencil[1].writemask);
599             }
600         }
601     }
602
603     /* Alpha test setup. */
604     if (state->alpha.enabled) {
605         dsa->alpha_function =
606             r300_translate_alpha_function(state->alpha.func) |
607             R300_FG_ALPHA_FUNC_ENABLE;
608
609         dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
610         dsa->alpha_value = util_float_to_half(state->alpha.ref_value);
611
612         if (caps->is_r500) {
613             dsa->alpha_function_fp16 = dsa->alpha_function |
614                                        R500_FG_ALPHA_FUNC_FP16_ENABLE;
615             dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
616         }
617     }
618
619     BEGIN_CB(&dsa->cb_begin, 10);
620     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
621     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
622     OUT_CB(dsa->z_buffer_control);
623     OUT_CB(dsa->z_stencil_control);
624     OUT_CB(dsa->stencil_ref_mask);
625     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
626     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
627     END_CB;
628
629     BEGIN_CB(&dsa->cb_begin_fp16, 10);
630     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
631     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
632     OUT_CB(dsa->z_buffer_control);
633     OUT_CB(dsa->z_stencil_control);
634     OUT_CB(dsa->stencil_ref_mask);
635     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
636     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
637     END_CB;
638
639     /* We must enable depth test, otherwise occlusion queries won't work.
640      * We setup a dummy zbuffer to silent the CS checker, see emit_fb_state. */
641     BEGIN_CB(dsa->cb_zb_no_readwrite, 10);
642     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
643     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
644     OUT_CB(R300_Z_ENABLE);
645     OUT_CB(R300_ZS_ALWAYS);
646     OUT_CB(0);
647     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
648     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
649     END_CB;
650
651     BEGIN_CB(dsa->cb_fp16_zb_no_readwrite, 10);
652     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
653     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
654     OUT_CB(R300_Z_ENABLE);
655     OUT_CB(R300_ZS_ALWAYS);
656     OUT_CB(0);
657     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
658     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
659     END_CB;
660
661     return (void*)dsa;
662 }
663
664 static void r300_dsa_inject_stencilref(struct r300_context *r300)
665 {
666     struct r300_dsa_state *dsa =
667             (struct r300_dsa_state*)r300->dsa_state.state;
668
669     if (!dsa)
670         return;
671
672     dsa->stencil_ref_mask =
673         (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
674         r300->stencil_ref.ref_value[0];
675     dsa->stencil_ref_bf =
676         (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
677         r300->stencil_ref.ref_value[1];
678 }
679
680 /* Bind DSA state. */
681 static void r300_bind_dsa_state(struct pipe_context* pipe,
682                                 void* state)
683 {
684     struct r300_context* r300 = r300_context(pipe);
685
686     if (!state) {
687         return;
688     }
689
690     UPDATE_STATE(state, r300->dsa_state);
691
692     r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */
693     r300_dsa_inject_stencilref(r300);
694 }
695
696 /* Free DSA state. */
697 static void r300_delete_dsa_state(struct pipe_context* pipe,
698                                   void* state)
699 {
700     FREE(state);
701 }
702
703 static void r300_set_stencil_ref(struct pipe_context* pipe,
704                                  const struct pipe_stencil_ref* sr)
705 {
706     struct r300_context* r300 = r300_context(pipe);
707
708     r300->stencil_ref = *sr;
709
710     r300_dsa_inject_stencilref(r300);
711     r300_mark_atom_dirty(r300, &r300->dsa_state);
712 }
713
714 static void r300_tex_set_tiling_flags(struct r300_context *r300,
715                                       struct r300_resource *tex,
716                                       unsigned level)
717 {
718     /* Check if the macrotile flag needs to be changed.
719      * Skip changing the flags otherwise. */
720     if (tex->tex.macrotile[tex->surface_level] !=
721         tex->tex.macrotile[level]) {
722         r300->rws->buffer_set_tiling(tex->buf, r300->cs,
723                 tex->tex.microtile, tex->tex.macrotile[level],
724                 tex->tex.stride_in_bytes[0]);
725
726         tex->surface_level = level;
727     }
728 }
729
730 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
731 static void r300_fb_set_tiling_flags(struct r300_context *r300,
732                                const struct pipe_framebuffer_state *state)
733 {
734     unsigned i;
735
736     /* Set tiling flags for new surfaces. */
737     for (i = 0; i < state->nr_cbufs; i++) {
738         r300_tex_set_tiling_flags(r300,
739                                   r300_resource(state->cbufs[i]->texture),
740                                   state->cbufs[i]->u.tex.level);
741     }
742     if (state->zsbuf) {
743         r300_tex_set_tiling_flags(r300,
744                                   r300_resource(state->zsbuf->texture),
745                                   state->zsbuf->u.tex.level);
746     }
747 }
748
749 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
750                                     const char *binding)
751 {
752     struct pipe_resource *tex = surf->texture;
753     struct r300_resource *rtex = r300_resource(tex);
754
755     fprintf(stderr,
756             "r300:   %s[%i] Dim: %ix%i, Firstlayer: %i, "
757             "Lastlayer: %i, Level: %i, Format: %s\n"
758
759             "r300:     TEX: Macro: %s, Micro: %s, Pitch: %i, "
760             "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
761
762             binding, index, surf->width, surf->height,
763             surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level,
764             util_format_short_name(surf->format),
765
766             rtex->tex.macrotile[0] ? "YES" : " NO",
767             rtex->tex.microtile ? "YES" : " NO",
768             rtex->tex.stride_in_pixels[0],
769             tex->width0, tex->height0, tex->depth0,
770             tex->last_level, util_format_short_name(tex->format));
771 }
772
773 void r300_mark_fb_state_dirty(struct r300_context *r300,
774                               enum r300_fb_state_change change)
775 {
776     struct pipe_framebuffer_state *state = r300->fb_state.state;
777
778     r300_mark_atom_dirty(r300, &r300->gpu_flush);
779     r300_mark_atom_dirty(r300, &r300->fb_state);
780
781     /* What is marked as dirty depends on the enum r300_fb_state_change. */
782     if (change == R300_CHANGED_FB_STATE) {
783         r300_mark_atom_dirty(r300, &r300->aa_state);
784         r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */
785         r300_set_blend_color(&r300->context, r300->blend_color_state.state);
786     }
787
788     if (change == R300_CHANGED_FB_STATE ||
789         change == R300_CHANGED_HYPERZ_FLAG) {
790         r300_mark_atom_dirty(r300, &r300->hyperz_state);
791     }
792
793     if (change == R300_CHANGED_FB_STATE ||
794         change == R300_CHANGED_MULTIWRITE) {
795         r300_mark_atom_dirty(r300, &r300->fb_state_pipelined);
796     }
797
798     /* Now compute the fb_state atom size. */
799     r300->fb_state.size = 2 + (8 * state->nr_cbufs);
800
801     if (r300->cbzb_clear) {
802         r300->fb_state.size += 10;
803     } else if (state->zsbuf) {
804         r300->fb_state.size += 10;
805         if (r300->hyperz_enabled)
806             r300->fb_state.size += 8;
807     } else if (state->nr_cbufs) {
808         r300->fb_state.size += 10;
809     }
810
811     /* The size of the rest of atoms stays the same. */
812 }
813
814 static void
815 r300_set_framebuffer_state(struct pipe_context* pipe,
816                            const struct pipe_framebuffer_state* state)
817 {
818     struct r300_context* r300 = r300_context(pipe);
819     struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
820     struct pipe_framebuffer_state *old_state = r300->fb_state.state;
821     unsigned max_width, max_height, i;
822     uint32_t zbuffer_bpp = 0;
823     boolean unlock_zbuffer = FALSE;
824
825     if (r300->screen->caps.is_r500) {
826         max_width = max_height = 4096;
827     } else if (r300->screen->caps.is_r400) {
828         max_width = max_height = 4021;
829     } else {
830         max_width = max_height = 2560;
831     }
832
833     if (state->width > max_width || state->height > max_height) {
834         fprintf(stderr, "r300: Implementation error: Render targets are too "
835         "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
836         return;
837     }
838
839     if (old_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) {
840         /* There is a zmask in use, what are we gonna do? */
841         if (state->zsbuf) {
842             if (!pipe_surface_equal(old_state->zsbuf, state->zsbuf)) {
843                 /* Decompress the currently bound zbuffer before we bind another one. */
844                 r300_decompress_zmask(r300);
845                 r300->hiz_in_use = FALSE;
846             }
847         } else {
848             /* We don't bind another zbuffer, so lock the current one. */
849             pipe_surface_reference(&r300->locked_zbuffer, old_state->zsbuf);
850         }
851     } else if (r300->locked_zbuffer) {
852         /* We have a locked zbuffer now, what are we gonna do? */
853         if (state->zsbuf) {
854             if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) {
855                 /* We are binding some other zbuffer, so decompress the locked one,
856                  * it gets unlocked automatically. */
857                 r300_decompress_zmask_locked_unsafe(r300);
858                 r300->hiz_in_use = FALSE;
859             } else {
860                 /* We are binding the locked zbuffer again, so unlock it. */
861                 unlock_zbuffer = TRUE;
862             }
863         }
864     }
865     assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use);
866
867     /* Need to reset clamping or colormask. */
868     r300_mark_atom_dirty(r300, &r300->blend_state);
869
870     /* If zsbuf is set from NULL to non-NULL or vice versa.. */
871     if (!!old_state->zsbuf != !!state->zsbuf) {
872         r300_mark_atom_dirty(r300, &r300->dsa_state);
873     }
874
875     /* The tiling flags are dependent on the surface miplevel, unfortunately. */
876     r300_fb_set_tiling_flags(r300, state);
877
878     util_copy_framebuffer_state(r300->fb_state.state, state);
879
880     if (unlock_zbuffer) {
881         pipe_surface_reference(&r300->locked_zbuffer, NULL);
882     }
883
884     r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE);
885
886     if (state->zsbuf) {
887         switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
888         case 2:
889             zbuffer_bpp = 16;
890             break;
891         case 4:
892             zbuffer_bpp = 24;
893             break;
894         }
895
896         /* Polygon offset depends on the zbuffer bit depth. */
897         if (r300->zbuffer_bpp != zbuffer_bpp) {
898             r300->zbuffer_bpp = zbuffer_bpp;
899
900             if (r300->polygon_offset_enabled)
901                 r300_mark_atom_dirty(r300, &r300->rs_state);
902         }
903     }
904
905     /* Set up AA config. */
906     if (state->nr_cbufs && state->cbufs[0]->texture->nr_samples > 1) {
907         aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE;
908
909         switch (state->cbufs[0]->texture->nr_samples) {
910         case 2:
911             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
912             break;
913         case 3:
914             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3;
915             break;
916         case 4:
917             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
918             break;
919         case 6:
920             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
921             break;
922         }
923     } else {
924         aa->aa_config = 0;
925     }
926
927     if (DBG_ON(r300, DBG_FB)) {
928         fprintf(stderr, "r300: set_framebuffer_state:\n");
929         for (i = 0; i < state->nr_cbufs; i++) {
930             r300_print_fb_surf_info(state->cbufs[i], i, "CB");
931         }
932         if (state->zsbuf) {
933             r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
934         }
935     }
936 }
937
938 /* Create fragment shader state. */
939 static void* r300_create_fs_state(struct pipe_context* pipe,
940                                   const struct pipe_shader_state* shader)
941 {
942     struct r300_fragment_shader* fs = NULL;
943
944     fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
945
946     /* Copy state directly into shader. */
947     fs->state = *shader;
948     fs->state.tokens = tgsi_dup_tokens(shader->tokens);
949
950     return (void*)fs;
951 }
952
953 void r300_mark_fs_code_dirty(struct r300_context *r300)
954 {
955     struct r300_fragment_shader* fs = r300_fs(r300);
956
957     r300_mark_atom_dirty(r300, &r300->fs);
958     r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
959     r300_mark_atom_dirty(r300, &r300->fs_constants);
960     r300->fs.size = fs->shader->cb_code_size;
961
962     if (r300->screen->caps.is_r500) {
963         r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
964         r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
965     } else {
966         r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
967         r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
968     }
969
970     ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table =
971             fs->shader->code.constants_remap_table;
972 }
973
974 /* Bind fragment shader state. */
975 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
976 {
977     struct r300_context* r300 = r300_context(pipe);
978     struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
979
980     if (fs == NULL) {
981         r300->fs.state = NULL;
982         return;
983     }
984
985     r300->fs.state = fs;
986     r300->fs_status = FRAGMENT_SHADER_DIRTY;
987
988     r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
989 }
990
991 /* Delete fragment shader state. */
992 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
993 {
994     struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
995     struct r300_fragment_shader_code *tmp, *ptr = fs->first;
996
997     while (ptr) {
998         tmp = ptr;
999         ptr = ptr->next;
1000         rc_constants_destroy(&tmp->code.constants);
1001         FREE(tmp->cb_code);
1002         FREE(tmp);
1003     }
1004     FREE((void*)fs->state.tokens);
1005     FREE(shader);
1006 }
1007
1008 static void r300_set_polygon_stipple(struct pipe_context* pipe,
1009                                      const struct pipe_poly_stipple* state)
1010 {
1011     /* XXX no idea how to set this up, but not terribly important */
1012 }
1013
1014 /* Create a new rasterizer state based on the CSO rasterizer state.
1015  *
1016  * This is a very large chunk of state, and covers most of the graphics
1017  * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1018  *
1019  * In a not entirely unironic sidenote, this state has nearly nothing to do
1020  * with the actual block on the Radeon called the rasterizer (RS). */
1021 static void* r300_create_rs_state(struct pipe_context* pipe,
1022                                   const struct pipe_rasterizer_state* state)
1023 {
1024     struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
1025     float psiz;
1026     uint32_t vap_control_status;    /* R300_VAP_CNTL_STATUS: 0x2140 */
1027     uint32_t point_size;            /* R300_GA_POINT_SIZE: 0x421c */
1028     uint32_t point_minmax;          /* R300_GA_POINT_MINMAX: 0x4230 */
1029     uint32_t line_control;          /* R300_GA_LINE_CNTL: 0x4234 */
1030     uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1031     uint32_t cull_mode;             /* R300_SU_CULL_MODE: 0x42b8 */
1032     uint32_t line_stipple_config;   /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1033     uint32_t line_stipple_value;    /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1034     uint32_t polygon_mode;          /* R300_GA_POLY_MODE: 0x4288 */
1035     uint32_t clip_rule;             /* R300_SC_CLIP_RULE: 0x43D0 */
1036     uint32_t round_mode;            /* R300_GA_ROUND_MODE: 0x428c */
1037
1038     /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1039     float point_texcoord_left = 0;  /* R300_GA_POINT_S0: 0x4200 */
1040     float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
1041     float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */
1042     float point_texcoord_top = 0;   /* R300_GA_POINT_T1: 0x420c */
1043     boolean vclamp = state->clamp_vertex_color;
1044     CB_LOCALS;
1045
1046     /* Copy rasterizer state. */
1047     rs->rs = *state;
1048     rs->rs_draw = *state;
1049
1050     rs->rs.sprite_coord_enable = state->point_quad_rasterization *
1051                                  state->sprite_coord_enable;
1052
1053     /* Override some states for Draw. */
1054     rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
1055
1056 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1057     vap_control_status = R300_VC_NO_SWAP;
1058 #else
1059     vap_control_status = R300_VC_32BIT_SWAP;
1060 #endif
1061
1062     /* If no TCL engine is present, turn off the HW TCL. */
1063     if (!r300_screen(pipe->screen)->caps.has_tcl) {
1064         vap_control_status |= R300_VAP_TCL_BYPASS;
1065     }
1066
1067     /* Point size width and height. */
1068     point_size =
1069         pack_float_16_6x(state->point_size) |
1070         (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
1071
1072     /* Point size clamping. */
1073     if (state->point_size_per_vertex) {
1074         /* Per-vertex point size.
1075          * Clamp to [0, max FB size] */
1076         psiz = pipe->screen->get_paramf(pipe->screen,
1077                                         PIPE_CAP_MAX_POINT_WIDTH);
1078         point_minmax =
1079             pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT;
1080     } else {
1081         /* We cannot disable the point-size vertex output,
1082          * so clamp it. */
1083         psiz = state->point_size;
1084         point_minmax =
1085             (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1086             (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1087     }
1088
1089     /* Line control. */
1090     line_control = pack_float_16_6x(state->line_width) |
1091         R300_GA_LINE_CNTL_END_TYPE_COMP;
1092
1093     /* Enable polygon mode */
1094     polygon_mode = 0;
1095     if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
1096         state->fill_back != PIPE_POLYGON_MODE_FILL) {
1097         polygon_mode = R300_GA_POLY_MODE_DUAL;
1098     }
1099
1100     /* Front face */
1101     if (state->front_ccw) 
1102         cull_mode = R300_FRONT_FACE_CCW;
1103     else
1104         cull_mode = R300_FRONT_FACE_CW;
1105
1106     /* Polygon offset */
1107     polygon_offset_enable = 0;
1108     if (util_get_offset(state, state->fill_front)) {
1109        polygon_offset_enable |= R300_FRONT_ENABLE;
1110     }
1111     if (util_get_offset(state, state->fill_back)) {
1112        polygon_offset_enable |= R300_BACK_ENABLE;
1113     }
1114
1115     rs->polygon_offset_enable = polygon_offset_enable != 0;
1116
1117     /* Polygon mode */
1118     if (polygon_mode) {
1119        polygon_mode |=
1120           r300_translate_polygon_mode_front(state->fill_front);
1121        polygon_mode |=
1122           r300_translate_polygon_mode_back(state->fill_back);
1123     }
1124
1125     if (state->cull_face & PIPE_FACE_FRONT) {
1126         cull_mode |= R300_CULL_FRONT;
1127     }
1128     if (state->cull_face & PIPE_FACE_BACK) {
1129         cull_mode |= R300_CULL_BACK;
1130     }
1131
1132     if (state->line_stipple_enable) {
1133         line_stipple_config =
1134             R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
1135             (fui((float)state->line_stipple_factor) &
1136                 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
1137         /* XXX this might need to be scaled up */
1138         line_stipple_value = state->line_stipple_pattern;
1139     } else {
1140         line_stipple_config = 0;
1141         line_stipple_value = 0;
1142     }
1143
1144     if (state->flatshade) {
1145         rs->color_control = R300_SHADE_MODEL_FLAT;
1146     } else {
1147         rs->color_control = R300_SHADE_MODEL_SMOOTH;
1148     }
1149
1150     clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
1151
1152     /* Point sprites coord mode */
1153     if (rs->rs.sprite_coord_enable) {
1154         switch (state->sprite_coord_mode) {
1155             case PIPE_SPRITE_COORD_UPPER_LEFT:
1156                 point_texcoord_top = 0.0f;
1157                 point_texcoord_bottom = 1.0f;
1158                 break;
1159             case PIPE_SPRITE_COORD_LOWER_LEFT:
1160                 point_texcoord_top = 1.0f;
1161                 point_texcoord_bottom = 0.0f;
1162                 break;
1163         }
1164     }
1165
1166     /* Vertex color clamping. FP20 means no clamping. */
1167     round_mode =
1168       R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST |
1169       (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 |
1170                   R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0);
1171
1172     /* Build the main command buffer. */
1173     BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE);
1174     OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
1175     OUT_CB_REG(R300_GA_POINT_SIZE, point_size);
1176     OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2);
1177     OUT_CB(point_minmax);
1178     OUT_CB(line_control);
1179     OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
1180     OUT_CB(polygon_offset_enable);
1181     rs->cull_mode_index = 9;
1182     OUT_CB(cull_mode);
1183     OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
1184     OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
1185     OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
1186     OUT_CB_REG(R300_GA_ROUND_MODE, round_mode);
1187     OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
1188     OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
1189     OUT_CB_32F(point_texcoord_left);
1190     OUT_CB_32F(point_texcoord_bottom);
1191     OUT_CB_32F(point_texcoord_right);
1192     OUT_CB_32F(point_texcoord_top);
1193     END_CB;
1194
1195     /* Build the two command buffers for polygon offset setup. */
1196     if (polygon_offset_enable) {
1197         float scale = state->offset_scale * 12;
1198         float offset = state->offset_units * 4;
1199
1200         BEGIN_CB(rs->cb_poly_offset_zb16, 5);
1201         OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1202         OUT_CB_32F(scale);
1203         OUT_CB_32F(offset);
1204         OUT_CB_32F(scale);
1205         OUT_CB_32F(offset);
1206         END_CB;
1207
1208         offset = state->offset_units * 2;
1209
1210         BEGIN_CB(rs->cb_poly_offset_zb24, 5);
1211         OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1212         OUT_CB_32F(scale);
1213         OUT_CB_32F(offset);
1214         OUT_CB_32F(scale);
1215         OUT_CB_32F(offset);
1216         END_CB;
1217     }
1218
1219     return (void*)rs;
1220 }
1221
1222 /* Bind rasterizer state. */
1223 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
1224 {
1225     struct r300_context* r300 = r300_context(pipe);
1226     struct r300_rs_state* rs = (struct r300_rs_state*)state;
1227     int last_sprite_coord_enable = r300->sprite_coord_enable;
1228     boolean last_two_sided_color = r300->two_sided_color;
1229     boolean last_frag_clamp = r300->frag_clamp;
1230
1231     if (r300->draw && rs) {
1232         draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
1233     }
1234
1235     if (rs) {
1236         r300->polygon_offset_enabled = rs->polygon_offset_enable;
1237         r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
1238         r300->two_sided_color = rs->rs.light_twoside;
1239         r300->frag_clamp = rs->rs.clamp_fragment_color;
1240     } else {
1241         r300->polygon_offset_enabled = FALSE;
1242         r300->sprite_coord_enable = 0;
1243         r300->two_sided_color = FALSE;
1244         r300->frag_clamp = FALSE;
1245     }
1246
1247     UPDATE_STATE(state, r300->rs_state);
1248     r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0);
1249
1250     if (last_sprite_coord_enable != r300->sprite_coord_enable ||
1251         last_two_sided_color != r300->two_sided_color) {
1252         r300_mark_atom_dirty(r300, &r300->rs_block_state);
1253     }
1254
1255     if (last_frag_clamp != r300->frag_clamp &&
1256         r300->fs_status == FRAGMENT_SHADER_VALID) {
1257         r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY;
1258     }
1259 }
1260
1261 /* Free rasterizer state. */
1262 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1263 {
1264     FREE(state);
1265 }
1266
1267 static void*
1268         r300_create_sampler_state(struct pipe_context* pipe,
1269                                   const struct pipe_sampler_state* state)
1270 {
1271     struct r300_context* r300 = r300_context(pipe);
1272     struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1273     boolean is_r500 = r300->screen->caps.is_r500;
1274     int lod_bias;
1275
1276     sampler->state = *state;
1277
1278     /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1279      * or MIN filter is NEAREST. Since texwrap produces same results
1280      * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1281     if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1282         sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1283         /* Wrap S. */
1284         if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1285             sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1286         else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1287             sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1288
1289         /* Wrap T. */
1290         if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1291             sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1292         else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1293             sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1294
1295         /* Wrap R. */
1296         if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1297             sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1298         else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1299             sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1300     }
1301
1302     sampler->filter0 |=
1303         (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1304         (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1305         (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1306
1307     sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1308                                                    state->mag_img_filter,
1309                                                    state->min_mip_filter,
1310                                                    state->max_anisotropy > 1);
1311
1312     sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1313
1314     /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1315     /* We must pass these to the merge function to clamp them properly. */
1316     sampler->min_lod = (unsigned)MAX2(state->min_lod, 0);
1317     sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0);
1318
1319     lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1320
1321     sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1322
1323     /* This is very high quality anisotropic filtering for R5xx.
1324      * It's good for benchmarking the performance of texturing but
1325      * in practice we don't want to slow down the driver because it's
1326      * a pretty good performance killer. Feel free to play with it. */
1327     if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1328         sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1329     }
1330
1331     /* R500-specific fixups and optimizations */
1332     if (r300->screen->caps.is_r500) {
1333         sampler->filter1 |= R500_BORDER_FIX;
1334     }
1335
1336     return (void*)sampler;
1337 }
1338
1339 static void r300_bind_sampler_states(struct pipe_context* pipe,
1340                                      unsigned count,
1341                                      void** states)
1342 {
1343     struct r300_context* r300 = r300_context(pipe);
1344     struct r300_textures_state* state =
1345         (struct r300_textures_state*)r300->textures_state.state;
1346     unsigned tex_units = r300->screen->caps.num_tex_units;
1347
1348     if (count > tex_units) {
1349         return;
1350     }
1351
1352     memcpy(state->sampler_states, states, sizeof(void*) * count);
1353     state->sampler_state_count = count;
1354
1355     r300_mark_atom_dirty(r300, &r300->textures_state);
1356 }
1357
1358 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
1359                                        unsigned count,
1360                                        void** states)
1361 {
1362 }
1363
1364 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1365 {
1366     FREE(state);
1367 }
1368
1369 static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
1370 {
1371     /* This looks like a hack, but I believe it's suppose to work like
1372      * that. To illustrate how this works, let's assume you have 5 textures.
1373      * From docs, 5 and the successive numbers are:
1374      *
1375      * FOURTH_1     = 5
1376      * FOURTH_2     = 6
1377      * FOURTH_3     = 7
1378      * EIGHTH_0     = 8
1379      * EIGHTH_1     = 9
1380      *
1381      * First 3 textures will get 3/4 of size of the cache, divived evenly
1382      * between them. The last 1/4 of the cache must be divided between
1383      * the last 2 textures, each will therefore get 1/8 of the cache.
1384      * Why not just to use "5 + texture_index" ?
1385      *
1386      * This simple trick works for all "num" <= 16.
1387      */
1388     if (num <= 1)
1389         return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
1390     else
1391         return R300_TX_CACHE(num + index);
1392 }
1393
1394 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1395                                             unsigned count,
1396                                             struct pipe_sampler_view** views)
1397 {
1398     struct r300_context* r300 = r300_context(pipe);
1399     struct r300_textures_state* state =
1400         (struct r300_textures_state*)r300->textures_state.state;
1401     struct r300_resource *texture;
1402     unsigned i, real_num_views = 0, view_index = 0;
1403     unsigned tex_units = r300->screen->caps.num_tex_units;
1404     boolean dirty_tex = FALSE;
1405
1406     if (count > tex_units) {
1407         return;
1408     }
1409
1410     /* Calculate the real number of views. */
1411     for (i = 0; i < count; i++) {
1412         if (views[i])
1413             real_num_views++;
1414     }
1415
1416     for (i = 0; i < count; i++) {
1417         pipe_sampler_view_reference(
1418                 (struct pipe_sampler_view**)&state->sampler_views[i],
1419                 views[i]);
1420
1421         if (!views[i]) {
1422             continue;
1423         }
1424
1425         /* A new sampler view (= texture)... */
1426         dirty_tex = TRUE;
1427
1428         /* Set the texrect factor in the fragment shader.
1429              * Needed for RECT and NPOT fallback. */
1430         texture = r300_resource(views[i]->texture);
1431         if (texture->tex.is_npot) {
1432             r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1433         }
1434
1435         state->sampler_views[i]->texcache_region =
1436                 r300_assign_texture_cache_region(view_index, real_num_views);
1437         view_index++;
1438     }
1439
1440     for (i = count; i < tex_units; i++) {
1441         if (state->sampler_views[i]) {
1442             pipe_sampler_view_reference(
1443                     (struct pipe_sampler_view**)&state->sampler_views[i],
1444                     NULL);
1445         }
1446     }
1447
1448     state->sampler_view_count = count;
1449
1450     r300_mark_atom_dirty(r300, &r300->textures_state);
1451
1452     if (dirty_tex) {
1453         r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1454     }
1455 }
1456
1457 static struct pipe_sampler_view *
1458 r300_create_sampler_view(struct pipe_context *pipe,
1459                          struct pipe_resource *texture,
1460                          const struct pipe_sampler_view *templ)
1461 {
1462     struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1463     struct r300_resource *tex = r300_resource(texture);
1464     boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
1465     boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle;
1466
1467     if (view) {
1468         unsigned hwformat;
1469
1470         view->base = *templ;
1471         view->base.reference.count = 1;
1472         view->base.context = pipe;
1473         view->base.texture = NULL;
1474         pipe_resource_reference(&view->base.texture, texture);
1475
1476         view->swizzle[0] = templ->swizzle_r;
1477         view->swizzle[1] = templ->swizzle_g;
1478         view->swizzle[2] = templ->swizzle_b;
1479         view->swizzle[3] = templ->swizzle_a;
1480
1481         hwformat = r300_translate_texformat(templ->format,
1482                                             view->swizzle,
1483                                             is_r500,
1484                                             dxtc_swizzle);
1485
1486         if (hwformat == ~0) {
1487             fprintf(stderr, "r300: Ooops. Got unsupported format %s in %s.\n",
1488                     util_format_short_name(templ->format), __func__);
1489         }
1490         assert(hwformat != ~0);
1491
1492         view->format = tex->tx_format;
1493         view->format.format1 |= hwformat;
1494         if (is_r500) {
1495             view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1496         }
1497     }
1498
1499     return (struct pipe_sampler_view*)view;
1500 }
1501
1502 static void
1503 r300_sampler_view_destroy(struct pipe_context *pipe,
1504                           struct pipe_sampler_view *view)
1505 {
1506    pipe_resource_reference(&view->texture, NULL);
1507    FREE(view);
1508 }
1509
1510 static void r300_set_scissor_state(struct pipe_context* pipe,
1511                                    const struct pipe_scissor_state* state)
1512 {
1513     struct r300_context* r300 = r300_context(pipe);
1514
1515     memcpy(r300->scissor_state.state, state,
1516         sizeof(struct pipe_scissor_state));
1517
1518     r300_mark_atom_dirty(r300, &r300->scissor_state);
1519 }
1520
1521 static void r300_set_viewport_state(struct pipe_context* pipe,
1522                                     const struct pipe_viewport_state* state)
1523 {
1524     struct r300_context* r300 = r300_context(pipe);
1525     struct r300_viewport_state* viewport =
1526         (struct r300_viewport_state*)r300->viewport_state.state;
1527
1528     r300->viewport = *state;
1529
1530     if (r300->draw) {
1531         draw_set_viewport_state(r300->draw, state);
1532         viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1533         return;
1534     }
1535
1536     /* Do the transform in HW. */
1537     viewport->vte_control = R300_VTX_W0_FMT;
1538
1539     if (state->scale[0] != 1.0f) {
1540         viewport->xscale = state->scale[0];
1541         viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1542     }
1543     if (state->scale[1] != 1.0f) {
1544         viewport->yscale = state->scale[1];
1545         viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1546     }
1547     if (state->scale[2] != 1.0f) {
1548         viewport->zscale = state->scale[2];
1549         viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1550     }
1551     if (state->translate[0] != 0.0f) {
1552         viewport->xoffset = state->translate[0];
1553         viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1554     }
1555     if (state->translate[1] != 0.0f) {
1556         viewport->yoffset = state->translate[1];
1557         viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1558     }
1559     if (state->translate[2] != 0.0f) {
1560         viewport->zoffset = state->translate[2];
1561         viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1562     }
1563
1564     r300_mark_atom_dirty(r300, &r300->viewport_state);
1565     if (r300->fs.state && r300_fs(r300)->shader &&
1566         r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1567         r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1568     }
1569 }
1570
1571 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1572                                     unsigned count,
1573                                     const struct pipe_vertex_buffer* buffers)
1574 {
1575     struct r300_context* r300 = r300_context(pipe);
1576     unsigned i;
1577     struct pipe_vertex_buffer dummy_vb = {0};
1578
1579     /* There must be at least one vertex buffer set, otherwise it locks up. */
1580     if (!count) {
1581         dummy_vb.buffer = r300->dummy_vb;
1582         buffers = &dummy_vb;
1583         count = 1;
1584     }
1585
1586     u_vbuf_mgr_set_vertex_buffers(r300->vbuf_mgr, count, buffers);
1587
1588     if (r300->screen->caps.has_tcl) {
1589         /* HW TCL. */
1590         for (i = 0; i < count; i++) {
1591             if (buffers[i].buffer &&
1592                 !r300_resource(buffers[i].buffer)->b.user_ptr) {
1593             }
1594         }
1595         r300->vertex_arrays_dirty = TRUE;
1596     } else {
1597         /* SW TCL. */
1598         draw_set_vertex_buffers(r300->draw, count, buffers);
1599     }
1600 }
1601
1602 static void r300_set_index_buffer(struct pipe_context* pipe,
1603                                   const struct pipe_index_buffer *ib)
1604 {
1605     struct r300_context* r300 = r300_context(pipe);
1606
1607     if (ib && ib->buffer) {
1608         assert(ib->offset % ib->index_size == 0);
1609
1610         pipe_resource_reference(&r300->index_buffer.buffer, ib->buffer);
1611         memcpy(&r300->index_buffer, ib, sizeof(r300->index_buffer));
1612         r300->index_buffer.offset /= r300->index_buffer.index_size;
1613     }
1614     else {
1615         pipe_resource_reference(&r300->index_buffer.buffer, NULL);
1616         memset(&r300->index_buffer, 0, sizeof(r300->index_buffer));
1617     }
1618
1619     if (!r300->screen->caps.has_tcl) {
1620         draw_set_index_buffer(r300->draw, ib);
1621     }
1622 }
1623
1624 /* Initialize the PSC tables. */
1625 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1626 {
1627     struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1628     uint16_t type, swizzle;
1629     enum pipe_format format;
1630     unsigned i;
1631
1632     /* Vertex shaders have no semantics on their inputs,
1633      * so PSC should just route stuff based on the vertex elements,
1634      * and not on attrib information. */
1635     for (i = 0; i < velems->count; i++) {
1636         format = velems->velem[i].src_format;
1637
1638         type = r300_translate_vertex_data_type(format);
1639         if (type == R300_INVALID_FORMAT) {
1640             fprintf(stderr, "r300: Bad vertex format %s.\n",
1641                     util_format_short_name(format));
1642             assert(0);
1643             abort();
1644         }
1645
1646         type |= i << R300_DST_VEC_LOC_SHIFT;
1647         swizzle = r300_translate_vertex_data_swizzle(format);
1648
1649         if (i & 1) {
1650             vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1651             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1652         } else {
1653             vstream->vap_prog_stream_cntl[i >> 1] |= type;
1654             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1655         }
1656     }
1657
1658     /* Set the last vector in the PSC. */
1659     if (i) {
1660         i -= 1;
1661     }
1662     vstream->vap_prog_stream_cntl[i >> 1] |=
1663         (R300_LAST_VEC << (i & 1 ? 16 : 0));
1664
1665     vstream->count = (i >> 1) + 1;
1666 }
1667
1668 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1669                                                unsigned count,
1670                                                const struct pipe_vertex_element* attribs)
1671 {
1672     struct r300_context *r300 = r300_context(pipe);
1673     struct r300_vertex_element_state *velems;
1674     unsigned i;
1675     struct pipe_vertex_element dummy_attrib = {0};
1676
1677     /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1678     if (!count) {
1679         dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM;
1680         attribs = &dummy_attrib;
1681         count = 1;
1682     } else if (count > 16) {
1683         fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1684                 " requested %i, using 16.\n", count);
1685         count = 16;
1686     }
1687
1688     velems = CALLOC_STRUCT(r300_vertex_element_state);
1689     if (!velems)
1690         return NULL;
1691
1692     velems->count = count;
1693     velems->vmgr_elements =
1694         u_vbuf_mgr_create_vertex_elements(r300->vbuf_mgr, count, attribs,
1695                                           velems->velem);
1696
1697     if (r300_screen(pipe->screen)->caps.has_tcl) {
1698         /* Setup PSC.
1699          * The unused components will be replaced by (..., 0, 1). */
1700         r300_vertex_psc(velems);
1701
1702         for (i = 0; i < count; i++) {
1703             velems->format_size[i] =
1704                 align(util_format_get_blocksize(velems->velem[i].src_format), 4);
1705             velems->vertex_size_dwords += velems->format_size[i] / 4;
1706         }
1707     }
1708
1709     return velems;
1710 }
1711
1712 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1713                                             void *state)
1714 {
1715     struct r300_context *r300 = r300_context(pipe);
1716     struct r300_vertex_element_state *velems = state;
1717
1718     if (velems == NULL) {
1719         return;
1720     }
1721
1722     r300->velems = velems;
1723
1724     u_vbuf_mgr_bind_vertex_elements(r300->vbuf_mgr, state, velems->vmgr_elements);
1725
1726     if (r300->draw) {
1727         draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1728         return;
1729     }
1730
1731     UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1732     r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1733     r300->vertex_arrays_dirty = TRUE;
1734 }
1735
1736 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1737 {
1738     struct r300_context *r300 = r300_context(pipe);
1739     struct r300_vertex_element_state *velems = state;
1740
1741     u_vbuf_mgr_destroy_vertex_elements(r300->vbuf_mgr, velems->vmgr_elements);
1742     FREE(state);
1743 }
1744
1745 static void* r300_create_vs_state(struct pipe_context* pipe,
1746                                   const struct pipe_shader_state* shader)
1747 {
1748     struct r300_context* r300 = r300_context(pipe);
1749     struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1750
1751     /* Copy state directly into shader. */
1752     vs->state = *shader;
1753     vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1754
1755     if (r300->screen->caps.has_tcl) {
1756         r300_init_vs_outputs(vs);
1757         r300_translate_vertex_shader(r300, vs);
1758     } else {
1759         r300_draw_init_vertex_shader(r300->draw, vs);
1760     }
1761
1762     return vs;
1763 }
1764
1765 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1766 {
1767     struct r300_context* r300 = r300_context(pipe);
1768     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1769
1770     if (vs == NULL) {
1771         r300->vs_state.state = NULL;
1772         return;
1773     }
1774     if (vs == r300->vs_state.state) {
1775         return;
1776     }
1777     r300->vs_state.state = vs;
1778
1779     /* The majority of the RS block bits is dependent on the vertex shader. */
1780     r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1781
1782     if (r300->screen->caps.has_tcl) {
1783         unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2;
1784         r300_mark_atom_dirty(r300, &r300->vs_state);
1785         r300->vs_state.size =
1786                 vs->code.length + 9 +
1787         (vs->code.num_fc_ops ? vs->code.num_fc_ops * fc_op_dwords + 4 : 0);
1788
1789         r300_mark_atom_dirty(r300, &r300->vs_constants);
1790         r300->vs_constants.size =
1791                 2 +
1792                 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) +
1793                 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1794
1795         ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table =
1796                 vs->code.constants_remap_table;
1797
1798         r300_mark_atom_dirty(r300, &r300->pvs_flush);
1799     } else {
1800         draw_bind_vertex_shader(r300->draw,
1801                 (struct draw_vertex_shader*)vs->draw_vs);
1802     }
1803 }
1804
1805 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1806 {
1807     struct r300_context* r300 = r300_context(pipe);
1808     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1809
1810     if (r300->screen->caps.has_tcl) {
1811         rc_constants_destroy(&vs->code.constants);
1812         if (vs->code.constants_remap_table)
1813             FREE(vs->code.constants_remap_table);
1814     } else {
1815         draw_delete_vertex_shader(r300->draw,
1816                 (struct draw_vertex_shader*)vs->draw_vs);
1817     }
1818
1819     FREE((void*)vs->state.tokens);
1820     FREE(shader);
1821 }
1822
1823 static void r300_set_constant_buffer(struct pipe_context *pipe,
1824                                      uint shader, uint index,
1825                                      struct pipe_resource *buf)
1826 {
1827     struct r300_context* r300 = r300_context(pipe);
1828     struct r300_constant_buffer *cbuf;
1829     struct r300_resource *rbuf = r300_resource(buf);
1830     uint32_t *mapped;
1831
1832     switch (shader) {
1833         case PIPE_SHADER_VERTEX:
1834             cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1835             break;
1836         case PIPE_SHADER_FRAGMENT:
1837             cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1838             break;
1839         default:
1840             return;
1841     }
1842
1843     if (buf == NULL || buf->width0 == 0)
1844         return;
1845
1846     if (rbuf->b.user_ptr)
1847         mapped = (uint32_t*)rbuf->b.user_ptr;
1848     else if (rbuf->constant_buffer)
1849         mapped = (uint32_t*)rbuf->constant_buffer;
1850     else
1851         return;
1852
1853     if (shader == PIPE_SHADER_FRAGMENT ||
1854         (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
1855         cbuf->ptr = mapped;
1856     }
1857
1858     if (shader == PIPE_SHADER_VERTEX) {
1859         if (r300->screen->caps.has_tcl) {
1860             struct r300_vertex_shader *vs =
1861                     (struct r300_vertex_shader*)r300->vs_state.state;
1862
1863             if (!vs) {
1864                 cbuf->buffer_base = 0;
1865                 return;
1866             }
1867
1868             cbuf->buffer_base = r300->vs_const_base;
1869             r300->vs_const_base += vs->code.constants.Count;
1870             if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) {
1871                 r300->vs_const_base = vs->code.constants.Count;
1872                 cbuf->buffer_base = 0;
1873                 r300_mark_atom_dirty(r300, &r300->pvs_flush);
1874             }
1875             r300_mark_atom_dirty(r300, &r300->vs_constants);
1876         } else if (r300->draw) {
1877             draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1878                 0, mapped, buf->width0);
1879         }
1880     } else if (shader == PIPE_SHADER_FRAGMENT) {
1881         r300_mark_atom_dirty(r300, &r300->fs_constants);
1882     }
1883 }
1884
1885 static void r300_texture_barrier(struct pipe_context *pipe)
1886 {
1887     struct r300_context *r300 = r300_context(pipe);
1888
1889     r300_mark_atom_dirty(r300, &r300->gpu_flush);
1890     r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1891 }
1892
1893 void r300_init_state_functions(struct r300_context* r300)
1894 {
1895     r300->context.create_blend_state = r300_create_blend_state;
1896     r300->context.bind_blend_state = r300_bind_blend_state;
1897     r300->context.delete_blend_state = r300_delete_blend_state;
1898
1899     r300->context.set_blend_color = r300_set_blend_color;
1900
1901     r300->context.set_clip_state = r300_set_clip_state;
1902     r300->context.set_sample_mask = r300_set_sample_mask;
1903
1904     r300->context.set_constant_buffer = r300_set_constant_buffer;
1905
1906     r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1907     r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1908     r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1909
1910     r300->context.set_stencil_ref = r300_set_stencil_ref;
1911
1912     r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1913
1914     r300->context.create_fs_state = r300_create_fs_state;
1915     r300->context.bind_fs_state = r300_bind_fs_state;
1916     r300->context.delete_fs_state = r300_delete_fs_state;
1917
1918     r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1919
1920     r300->context.create_rasterizer_state = r300_create_rs_state;
1921     r300->context.bind_rasterizer_state = r300_bind_rs_state;
1922     r300->context.delete_rasterizer_state = r300_delete_rs_state;
1923
1924     r300->context.create_sampler_state = r300_create_sampler_state;
1925     r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1926     r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1927     r300->context.delete_sampler_state = r300_delete_sampler_state;
1928
1929     r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1930     r300->context.create_sampler_view = r300_create_sampler_view;
1931     r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1932
1933     r300->context.set_scissor_state = r300_set_scissor_state;
1934
1935     r300->context.set_viewport_state = r300_set_viewport_state;
1936
1937     r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1938     r300->context.set_index_buffer = r300_set_index_buffer;
1939     r300->context.redefine_user_buffer = u_default_redefine_user_buffer;
1940
1941     r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1942     r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1943     r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1944
1945     r300->context.create_vs_state = r300_create_vs_state;
1946     r300->context.bind_vs_state = r300_bind_vs_state;
1947     r300->context.delete_vs_state = r300_delete_vs_state;
1948
1949     r300->context.texture_barrier = r300_texture_barrier;
1950 }