src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include "util/u_format.h"
  34 #include <util/u_format_s3tc.h>
  35 #include <util/u_transfer.h>
  36 #include <util/u_surface.h>
  37 #include <util/u_pack_color.h>
  38 #include <util/u_memory.h>
  39 #include <util/u_inlines.h>
  40 #include "util/u_upload_mgr.h"
  41 #include <vl/vl_video_buffer.h>
  42 #include "os/os_time.h"
  43 #include <pipebuffer/pb_buffer.h>
  44 #include "r600.h"
  45 #include "r600d.h"
  46 #include "r600_resource.h"
  47 #include "r600_shader.h"
  48 #include "r600_pipe.h"
  49 #include "r600_state_inlines.h"
  50 #include "r600_video_context.h"
  51
  52 /*
  53  * pipe_context
  54  */
  55 static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
  56 {
  57         struct r600_fence *fence = NULL;
  58
  59         if (!ctx->fences.bo) {
  60                 /* Create the shared buffer object */
  61                 ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
  62                 if (!ctx->fences.bo) {
  63                         R600_ERR("r600: failed to create bo for fence objects\n");
  64                         return NULL;
  65                 }
  66                 ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, PB_USAGE_UNSYNCHRONIZED, NULL);
  67         }
  68
  69         if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
  70                 struct r600_fence *entry;
  71
  72                 /* Try to find a freed fence that has been signalled */
  73                 LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
  74                         if (ctx->fences.data[entry->index] != 0) {
  75                                 LIST_DELINIT(&entry->head);
  76                                 fence = entry;
  77                                 break;
  78                         }
  79                 }
  80         }
  81
  82         if (!fence) {
  83                 /* Allocate a new fence */
  84                 struct r600_fence_block *block;
  85                 unsigned index;
  86
  87                 if ((ctx->fences.next_index + 1) >= 1024) {
  88                         R600_ERR("r600: too many concurrent fences\n");
  89                         return NULL;
  90                 }
  91
  92                 index = ctx->fences.next_index++;
  93
  94                 if (!(index % FENCE_BLOCK_SIZE)) {
  95                         /* Allocate a new block */
  96                         block = CALLOC_STRUCT(r600_fence_block);
  97                         if (block == NULL)
  98                                 return NULL;
  99
 100                         LIST_ADD(&block->head, &ctx->fences.blocks);
 101                 } else {
 102                         block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
 103                 }
 104
 105                 fence = &block->fences[index % FENCE_BLOCK_SIZE];
 106                 fence->ctx = ctx;
 107                 fence->index = index;
 108         }
 109
 110         pipe_reference_init(&fence->reference, 1);
 111
 112         ctx->fences.data[fence->index] = 0;
 113         r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
 114         return fence;
 115 }
 116
 117 static void r600_flush(struct pipe_context *ctx,
 118                         struct pipe_fence_handle **fence)
 119 {
 120         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 121         struct r600_fence **rfence = (struct r600_fence**)fence;
 122
 123 #if 0
 124         static int dc = 0;
 125         char dname[256];
 126 #endif
 127
 128         if (rfence)
 129                 *rfence = r600_create_fence(rctx);
 130
 131 #if 0
 132         sprintf(dname, "gallium-%08d.bof", dc);
 133         if (dc < 20) {
 134                 r600_context_dump_bof(&rctx->ctx, dname);
 135                 R600_ERR("dumped %s\n", dname);
 136         }
 137         dc++;
 138 #endif
 139         r600_context_flush(&rctx->ctx);
 140 }
 141
 142 static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
 143 {
 144         pipe_mutex_lock(rscreen->mutex_num_contexts);
 145         if (diff > 0) {
 146                 rscreen->num_contexts++;
 147
 148                 if (rscreen->num_contexts > 1)
 149                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 150                                                     UTIL_SLAB_MULTITHREADED);
 151         } else {
 152                 rscreen->num_contexts--;
 153
 154                 if (rscreen->num_contexts <= 1)
 155                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 156                                                     UTIL_SLAB_SINGLETHREADED);
 157         }
 158         pipe_mutex_unlock(rscreen->mutex_num_contexts);
 159 }
 160
 161 static void r600_destroy_context(struct pipe_context *context)
 162 {
 163         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 164
 165         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 166         util_unreference_framebuffer_state(&rctx->framebuffer);
 167
 168         r600_context_fini(&rctx->ctx);
 169
 170         util_blitter_destroy(rctx->blitter);
 171
 172         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 173                 free(rctx->states[i]);
 174         }
 175
 176         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 177         util_slab_destroy(&rctx->pool_transfers);
 178
 179         if (rctx->fences.bo) {
 180                 struct r600_fence_block *entry, *tmp;
 181
 182                 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
 183                         LIST_DEL(&entry->head);
 184                         FREE(entry);
 185                 }
 186
 187                 r600_bo_unmap(rctx->radeon, rctx->fences.bo);
 188                 r600_bo_reference(rctx->radeon, &rctx->fences.bo, NULL);
 189         }
 190
 191         r600_update_num_contexts(rctx->screen, -1);
 192
 193         FREE(rctx);
 194 }
 195
 196 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 197 {
 198         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 199         struct r600_screen* rscreen = (struct r600_screen *)screen;
 200         enum chip_class class;
 201
 202         if (rctx == NULL)
 203                 return NULL;
 204
 205         r600_update_num_contexts(rscreen, 1);
 206
 207         rctx->context.winsys = rscreen->screen.winsys;
 208         rctx->context.screen = screen;
 209         rctx->context.priv = priv;
 210         rctx->context.destroy = r600_destroy_context;
 211         rctx->context.flush = r600_flush;
 212
 213         /* Easy accessing of screen/winsys. */
 214         rctx->screen = rscreen;
 215         rctx->radeon = rscreen->radeon;
 216         rctx->family = r600_get_family(rctx->radeon);
 217
 218         rctx->fences.bo = NULL;
 219         rctx->fences.data = NULL;
 220         rctx->fences.next_index = 0;
 221         LIST_INITHEAD(&rctx->fences.pool);
 222         LIST_INITHEAD(&rctx->fences.blocks);
 223
 224         r600_init_blit_functions(rctx);
 225         r600_init_query_functions(rctx);
 226         r600_init_context_resource_functions(rctx);
 227         r600_init_surface_functions(rctx);
 228         rctx->context.draw_vbo = r600_draw_vbo;
 229
 230         switch (r600_get_family(rctx->radeon)) {
 231         case CHIP_R600:
 232         case CHIP_RV610:
 233         case CHIP_RV630:
 234         case CHIP_RV670:
 235         case CHIP_RV620:
 236         case CHIP_RV635:
 237         case CHIP_RS780:
 238         case CHIP_RS880:
 239         case CHIP_RV770:
 240         case CHIP_RV730:
 241         case CHIP_RV710:
 242         case CHIP_RV740:
 243                 r600_init_state_functions(rctx);
 244                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 245                         r600_destroy_context(&rctx->context);
 246                         return NULL;
 247                 }
 248                 r600_init_config(rctx);
 249                 break;
 250         case CHIP_CEDAR:
 251         case CHIP_REDWOOD:
 252         case CHIP_JUNIPER:
 253         case CHIP_CYPRESS:
 254         case CHIP_HEMLOCK:
 255         case CHIP_PALM:
 256         case CHIP_SUMO:
 257         case CHIP_SUMO2:
 258         case CHIP_BARTS:
 259         case CHIP_TURKS:
 260         case CHIP_CAICOS:
 261         case CHIP_CAYMAN:
 262                 evergreen_init_state_functions(rctx);
 263                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 264                         r600_destroy_context(&rctx->context);
 265                         return NULL;
 266                 }
 267                 evergreen_init_config(rctx);
 268                 break;
 269         default:
 270                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 271                 r600_destroy_context(&rctx->context);
 272                 return NULL;
 273         }
 274
 275         util_slab_create(&rctx->pool_transfers,
 276                          sizeof(struct pipe_transfer), 64,
 277                          UTIL_SLAB_SINGLETHREADED);
 278
 279         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 280                                            PIPE_BIND_VERTEX_BUFFER |
 281                                            PIPE_BIND_INDEX_BUFFER |
 282                                            PIPE_BIND_CONSTANT_BUFFER,
 283                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 284         if (!rctx->vbuf_mgr) {
 285                 r600_destroy_context(&rctx->context);
 286                 return NULL;
 287         }
 288
 289         rctx->blitter = util_blitter_create(&rctx->context);
 290         if (rctx->blitter == NULL) {
 291                 r600_destroy_context(&rctx->context);
 292                 return NULL;
 293         }
 294
 295         class = r600_get_family_class(rctx->radeon);
 296         if (class == R600 || class == R700)
 297                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 298         else
 299                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 300
 301         return &rctx->context;
 302 }
 303
 304 /*
 305  * pipe_screen
 306  */
 307 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 308 {
 309         return "X.Org";
 310 }
 311
 312 static const char *r600_get_family_name(enum radeon_family family)
 313 {
 314         switch(family) {
 315         case CHIP_R600: return "AMD R600";
 316         case CHIP_RV610: return "AMD RV610";
 317         case CHIP_RV630: return "AMD RV630";
 318         case CHIP_RV670: return "AMD RV670";
 319         case CHIP_RV620: return "AMD RV620";
 320         case CHIP_RV635: return "AMD RV635";
 321         case CHIP_RS780: return "AMD RS780";
 322         case CHIP_RS880: return "AMD RS880";
 323         case CHIP_RV770: return "AMD RV770";
 324         case CHIP_RV730: return "AMD RV730";
 325         case CHIP_RV710: return "AMD RV710";
 326         case CHIP_RV740: return "AMD RV740";
 327         case CHIP_CEDAR: return "AMD CEDAR";
 328         case CHIP_REDWOOD: return "AMD REDWOOD";
 329         case CHIP_JUNIPER: return "AMD JUNIPER";
 330         case CHIP_CYPRESS: return "AMD CYPRESS";
 331         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 332         case CHIP_PALM: return "AMD PALM";
 333         case CHIP_SUMO: return "AMD SUMO";
 334         case CHIP_SUMO2: return "AMD SUMO2";
 335         case CHIP_BARTS: return "AMD BARTS";
 336         case CHIP_TURKS: return "AMD TURKS";
 337         case CHIP_CAICOS: return "AMD CAICOS";
 338         case CHIP_CAYMAN: return "AMD CAYMAN";
 339         default: return "AMD unknown";
 340         }
 341 }
 342
 343 static const char* r600_get_name(struct pipe_screen* pscreen)
 344 {
 345         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 346         enum radeon_family family = r600_get_family(rscreen->radeon);
 347
 348         return r600_get_family_name(family);
 349 }
 350
 351 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 352 {
 353         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 354         enum radeon_family family = r600_get_family(rscreen->radeon);
 355
 356         switch (param) {
 357         /* Supported features (boolean caps). */
 358         case PIPE_CAP_NPOT_TEXTURES:
 359         case PIPE_CAP_TWO_SIDED_STENCIL:
 360         case PIPE_CAP_GLSL:
 361         case PIPE_CAP_DUAL_SOURCE_BLEND:
 362         case PIPE_CAP_ANISOTROPIC_FILTER:
 363         case PIPE_CAP_POINT_SPRITE:
 364         case PIPE_CAP_OCCLUSION_QUERY:
 365         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 366         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 367         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 368         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 369         case PIPE_CAP_TEXTURE_SWIZZLE:
 370         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 371         case PIPE_CAP_DEPTH_CLAMP:
 372         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 373         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 374         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 375         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 376         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 377         case PIPE_CAP_SM3:
 378         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 379         case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
 380                 return 1;
 381
 382         /* Supported except the original R600. */
 383         case PIPE_CAP_INDEP_BLEND_ENABLE:
 384         case PIPE_CAP_INDEP_BLEND_FUNC:
 385                 /* R600 doesn't support per-MRT blends */
 386                 return family == CHIP_R600 ? 0 : 1;
 387
 388         /* Supported on Evergreen. */
 389         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 390                 return family >= CHIP_CEDAR ? 1 : 0;
 391
 392         /* Unsupported features. */
 393         case PIPE_CAP_STREAM_OUTPUT:
 394         case PIPE_CAP_PRIMITIVE_RESTART:
 395         case PIPE_CAP_TGSI_INSTANCEID:
 396         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 397         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 398                 return 0;
 399
 400         case PIPE_CAP_ARRAY_TEXTURES:
 401                 /* fix once the CS checker upstream is fixed */
 402                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 403
 404         /* Texturing. */
 405         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 406         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 407         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 408                 if (family >= CHIP_CEDAR)
 409                         return 15;
 410                 else
 411                         return 14;
 412         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 413         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 414                 return 16;
 415         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 416                 return 32;
 417
 418         /* Render targets. */
 419         case PIPE_CAP_MAX_RENDER_TARGETS:
 420                 /* FIXME some r6xx are buggy and can only do 4 */
 421                 return 8;
 422
 423         /* Timer queries, present when the clock frequency is non zero. */
 424         case PIPE_CAP_TIMER_QUERY:
 425                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 426
 427         default:
 428                 R600_ERR("r600: unknown param %d\n", param);
 429                 return 0;
 430         }
 431 }
 432
 433 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 434 {
 435         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 436         enum radeon_family family = r600_get_family(rscreen->radeon);
 437
 438         switch (param) {
 439         case PIPE_CAP_MAX_LINE_WIDTH:
 440         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 441         case PIPE_CAP_MAX_POINT_WIDTH:
 442         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 443                 if (family >= CHIP_CEDAR)
 444                         return 16384.0f;
 445                 else
 446                         return 8192.0f;
 447         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 448                 return 16.0f;
 449         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 450                 return 16.0f;
 451         default:
 452                 R600_ERR("r600: unsupported paramf %d\n", param);
 453                 return 0.0f;
 454         }
 455 }
 456
 457 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 458 {
 459         switch(shader)
 460         {
 461         case PIPE_SHADER_FRAGMENT:
 462         case PIPE_SHADER_VERTEX:
 463                 break;
 464         case PIPE_SHADER_GEOMETRY:
 465                 /* TODO: support and enable geometry programs */
 466                 return 0;
 467         default:
 468                 /* TODO: support tessellation on Evergreen */
 469                 return 0;
 470         }
 471
 472         /* TODO: all these should be fixed, since r600 surely supports much more! */
 473         switch (param) {
 474         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 475         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 476         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 477         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 478                 return 16384;
 479         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 480                 return 8; /* FIXME */
 481         case PIPE_SHADER_CAP_MAX_INPUTS:
 482                 if(shader == PIPE_SHADER_FRAGMENT)
 483                         return 34;
 484                 else
 485                         return 32;
 486         case PIPE_SHADER_CAP_MAX_TEMPS:
 487                 return 256; /* Max native temporaries. */
 488         case PIPE_SHADER_CAP_MAX_ADDRS:
 489                 /* FIXME Isn't this equal to TEMPS? */
 490                 return 1; /* Max native address registers */
 491         case PIPE_SHADER_CAP_MAX_CONSTS:
 492                 return R600_MAX_CONST_BUFFER_SIZE;
 493         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 494                 return R600_MAX_CONST_BUFFERS;
 495         case PIPE_SHADER_CAP_MAX_PREDS:
 496                 return 0; /* FIXME */
 497         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 498                 return 1;
 499         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 500         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 501         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 502         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 503                 return 1;
 504         case PIPE_SHADER_CAP_SUBROUTINES:
 505                 return 0;
 506         default:
 507                 return 0;
 508         }
 509 }
 510
 511 static int r600_get_video_param(struct pipe_screen *screen,
 512                                 enum pipe_video_profile profile,
 513                                 enum pipe_video_cap param)
 514 {
 515         switch (param) {
 516         case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 517                 return 1;
 518         default:
 519                 return 0;
 520         }
 521 }
 522
 523 static boolean r600_is_format_supported(struct pipe_screen* screen,
 524                                         enum pipe_format format,
 525                                         enum pipe_texture_target target,
 526                                         unsigned sample_count,
 527                                         unsigned usage)
 528 {
 529         unsigned retval = 0;
 530         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 531                 R600_ERR("r600: unsupported texture type %d\n", target);
 532                 return FALSE;
 533         }
 534
 535         if (!util_format_is_supported(format, usage))
 536                 return FALSE;
 537
 538         /* Multisample */
 539         if (sample_count > 1)
 540                 return FALSE;
 541
 542         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 543             r600_is_sampler_format_supported(screen, format)) {
 544                 retval |= PIPE_BIND_SAMPLER_VIEW;
 545         }
 546
 547         if ((usage & (PIPE_BIND_RENDER_TARGET |
 548                         PIPE_BIND_DISPLAY_TARGET |
 549                         PIPE_BIND_SCANOUT |
 550                         PIPE_BIND_SHARED)) &&
 551                         r600_is_colorbuffer_format_supported(format)) {
 552                 retval |= usage &
 553                         (PIPE_BIND_RENDER_TARGET |
 554                          PIPE_BIND_DISPLAY_TARGET |
 555                          PIPE_BIND_SCANOUT |
 556                          PIPE_BIND_SHARED);
 557         }
 558
 559         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 560             r600_is_zs_format_supported(format)) {
 561                 retval |= PIPE_BIND_DEPTH_STENCIL;
 562         }
 563
 564         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 565                 struct r600_screen *rscreen = (struct r600_screen *)screen;
 566                 enum radeon_family family = r600_get_family(rscreen->radeon);
 567
 568                 if (r600_is_vertex_format_supported(format, family)) {
 569                         retval |= PIPE_BIND_VERTEX_BUFFER;
 570                 }
 571         }
 572
 573         if (usage & PIPE_BIND_TRANSFER_READ)
 574                 retval |= PIPE_BIND_TRANSFER_READ;
 575         if (usage & PIPE_BIND_TRANSFER_WRITE)
 576                 retval |= PIPE_BIND_TRANSFER_WRITE;
 577
 578         return retval == usage;
 579 }
 580
 581 static void r600_destroy_screen(struct pipe_screen* pscreen)
 582 {
 583         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 584
 585         if (rscreen == NULL)
 586                 return;
 587
 588         radeon_decref(rscreen->radeon);
 589
 590         util_slab_destroy(&rscreen->pool_buffers);
 591         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 592         FREE(rscreen);
 593 }
 594
 595 static void r600_fence_reference(struct pipe_screen *pscreen,
 596                                  struct pipe_fence_handle **ptr,
 597                                  struct pipe_fence_handle *fence)
 598 {
 599         struct r600_fence **oldf = (struct r600_fence**)ptr;
 600         struct r600_fence *newf = (struct r600_fence*)fence;
 601
 602         if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
 603                 struct r600_pipe_context *ctx = (*oldf)->ctx;
 604                 LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
 605         }
 606
 607         *ptr = fence;
 608 }
 609
 610 static boolean r600_fence_signalled(struct pipe_screen *pscreen,
 611                                     struct pipe_fence_handle *fence)
 612 {
 613         struct r600_fence *rfence = (struct r600_fence*)fence;
 614         struct r600_pipe_context *ctx = rfence->ctx;
 615
 616         return ctx->fences.data[rfence->index];
 617 }
 618
 619 static boolean r600_fence_finish(struct pipe_screen *pscreen,
 620                                  struct pipe_fence_handle *fence,
 621                                  uint64_t timeout)
 622 {
 623         struct r600_fence *rfence = (struct r600_fence*)fence;
 624         struct r600_pipe_context *ctx = rfence->ctx;
 625         int64_t start_time = 0;
 626         unsigned spins = 0;
 627
 628         if (timeout != PIPE_TIMEOUT_INFINITE) {
 629                 start_time = os_time_get();
 630
 631                 /* Convert to microseconds. */
 632                 timeout /= 1000;
 633         }
 634
 635         while (ctx->fences.data[rfence->index] == 0) {
 636                 if (++spins % 256)
 637                         continue;
 638 #ifdef PIPE_OS_UNIX
 639                 sched_yield();
 640 #else
 641                 os_time_sleep(10);
 642 #endif
 643                 if (timeout != PIPE_TIMEOUT_INFINITE &&
 644                     os_time_get() - start_time >= timeout) {
 645                         return FALSE;
 646                 }
 647         }
 648
 649         return TRUE;
 650 }
 651
 652 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 653 {
 654         struct r600_screen *rscreen;
 655
 656         rscreen = CALLOC_STRUCT(r600_screen);
 657         if (rscreen == NULL) {
 658                 return NULL;
 659         }
 660
 661         rscreen->radeon = radeon;
 662         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 663         rscreen->screen.destroy = r600_destroy_screen;
 664         rscreen->screen.get_name = r600_get_name;
 665         rscreen->screen.get_vendor = r600_get_vendor;
 666         rscreen->screen.get_param = r600_get_param;
 667         rscreen->screen.get_shader_param = r600_get_shader_param;
 668         rscreen->screen.get_paramf = r600_get_paramf;
 669         rscreen->screen.get_video_param = r600_get_video_param;
 670         rscreen->screen.is_format_supported = r600_is_format_supported;
 671         rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 672         rscreen->screen.context_create = r600_create_context;
 673         rscreen->screen.video_context_create = r600_video_create;
 674         rscreen->screen.fence_reference = r600_fence_reference;
 675         rscreen->screen.fence_signalled = r600_fence_signalled;
 676         rscreen->screen.fence_finish = r600_fence_finish;
 677         r600_init_screen_resource_functions(&rscreen->screen);
 678
 679         rscreen->tiling_info = r600_get_tiling_info(radeon);
 680         util_format_s3tc_init();
 681
 682         util_slab_create(&rscreen->pool_buffers,
 683                          sizeof(struct r600_resource_buffer), 64,
 684                          UTIL_SLAB_SINGLETHREADED);
 685
 686         pipe_mutex_init(rscreen->mutex_num_contexts);
 687
 688         return &rscreen->screen;
 689 }