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radeonsi: initial WIP SI code
[android-x86/external-mesa.git] / src / gallium / drivers / radeon / AMDILBase.td
1 //===- AMDIL.td - AMDIL Target Machine -------------*- tablegen -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 // Target-independent interfaces which we are implementing
10 //===----------------------------------------------------------------------===//
11
12 include "llvm/Target/Target.td"
13
14 //===----------------------------------------------------------------------===//
15 // AMDIL Subtarget features.
16 //===----------------------------------------------------------------------===//
17 def FeatureFP64     : SubtargetFeature<"fp64",
18         "CapsOverride[AMDILDeviceInfo::DoubleOps]",
19         "true",
20         "Enable 64bit double precision operations">;
21 def FeatureByteAddress    : SubtargetFeature<"byte_addressable_store",
22         "CapsOverride[AMDILDeviceInfo::ByteStores]",
23         "true",
24         "Enable byte addressable stores">;
25 def FeatureBarrierDetect : SubtargetFeature<"barrier_detect",
26         "CapsOverride[AMDILDeviceInfo::BarrierDetect]",
27         "true",
28         "Enable duplicate barrier detection(HD5XXX or later).">;
29 def FeatureImages : SubtargetFeature<"images",
30         "CapsOverride[AMDILDeviceInfo::Images]",
31         "true",
32         "Enable image functions">;
33 def FeatureMultiUAV : SubtargetFeature<"multi_uav",
34         "CapsOverride[AMDILDeviceInfo::MultiUAV]",
35         "true",
36         "Generate multiple UAV code(HD5XXX family or later)">;
37 def FeatureMacroDB : SubtargetFeature<"macrodb",
38         "CapsOverride[AMDILDeviceInfo::MacroDB]",
39         "true",
40         "Use internal macrodb, instead of macrodb in driver">;
41 def FeatureNoAlias : SubtargetFeature<"noalias",
42         "CapsOverride[AMDILDeviceInfo::NoAlias]",
43         "true",
44         "assert that all kernel argument pointers are not aliased">;
45 def FeatureNoInline : SubtargetFeature<"no-inline",
46         "CapsOverride[AMDILDeviceInfo::NoInline]",
47         "true",
48         "specify whether to not inline functions">;
49
50 def Feature64BitPtr : SubtargetFeature<"64BitPtr",
51         "mIs64bit",
52         "false",
53         "Specify if 64bit addressing should be used.">;
54
55 def Feature32on64BitPtr : SubtargetFeature<"64on32BitPtr",
56         "mIs32on64bit",
57         "false",
58         "Specify if 64bit sized pointers with 32bit addressing should be used.">;
59 def FeatureDebug : SubtargetFeature<"debug",
60         "CapsOverride[AMDILDeviceInfo::Debug]",
61         "true",
62         "Debug mode is enabled, so disable hardware accelerated address spaces.">;
63
64 //===----------------------------------------------------------------------===//
65 // Register File, Calling Conv, Instruction Descriptions
66 //===----------------------------------------------------------------------===//
67
68
69 include "AMDILRegisterInfo.td"
70 include "AMDILCallingConv.td"
71 include "AMDILInstrInfo.td"
72
73 def AMDILInstrInfo : InstrInfo {}
74
75 //===----------------------------------------------------------------------===//
76 // AMDIL processors supported.
77 //===----------------------------------------------------------------------===//
78 //include "Processors.td"
79
80 //===----------------------------------------------------------------------===//
81 // Declare the target which we are implementing
82 //===----------------------------------------------------------------------===//
83 def AMDILAsmWriter : AsmWriter {
84     string AsmWriterClassName = "AsmPrinter";
85     int Variant = 0;
86 }
87
88 def AMDILAsmParser : AsmParser {
89     string AsmParserClassName = "AsmParser";
90     int Variant = 0;
91
92     string CommentDelimiter = ";";
93
94     string RegisterPrefix = "r";
95
96 }
97
98
99 def AMDIL : Target {
100   // Pull in Instruction Info:
101   let InstructionSet = AMDILInstrInfo;
102   let AssemblyWriters = [AMDILAsmWriter];
103   let AssemblyParsers = [AMDILAsmParser];
104 }