1 //===- AMDILNodes.td - AMD IL nodes ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //==-----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Conversion DAG Nodes
12 //===----------------------------------------------------------------------===//
13 // Double to Single conversion
14 def IL_d2f : SDNode<"AMDILISD::DP_TO_FP" , SDTIL_DPToFPOp>;
16 def IL_inttoany: SDNode<"AMDILISD::INTTOANY", SDTIL_IntToAny>;
17 //===----------------------------------------------------------------------===//
18 // Flow Control DAG Nodes
19 //===----------------------------------------------------------------------===//
20 def IL_brcond : SDNode<"AMDILISD::BRANCH_COND", SDTIL_BRCond, [SDNPHasChain]>;
22 //===----------------------------------------------------------------------===//
23 // Comparison DAG Nodes
24 //===----------------------------------------------------------------------===//
25 def IL_cmp : SDNode<"AMDILISD::CMP", SDTIL_Cmp>;
27 //===----------------------------------------------------------------------===//
28 // Call/Return DAG Nodes
29 //===----------------------------------------------------------------------===//
30 def IL_callseq_start : SDNode<"ISD::CALLSEQ_START", SDTIL_CallSeqStart,
31 [SDNPHasChain, SDNPOutGlue]>;
32 def IL_callseq_end : SDNode<"ISD::CALLSEQ_END", SDTIL_CallSeqEnd,
33 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
34 def IL_call : SDNode<"AMDILISD::CALL", SDTIL_Call,
35 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
37 def IL_retflag : SDNode<"AMDILISD::RET_FLAG", SDTNone,
38 [SDNPHasChain, SDNPOptInGlue]>;
40 //===----------------------------------------------------------------------===//
41 // Arithmetic DAG Nodes
42 //===----------------------------------------------------------------------===//
43 // Address modification nodes
44 def IL_addaddrri : SDNode<"AMDILISD::ADDADDR", SDTIL_AddAddrri,
45 [SDNPCommutative, SDNPAssociative]>;
46 def IL_addaddrir : SDNode<"AMDILISD::ADDADDR", SDTIL_AddAddrir,
47 [SDNPCommutative, SDNPAssociative]>;
49 //===--------------------------------------------------------------------===//
51 //===--------------------------------------------------------------------===//
52 // Floating point math functions
53 def IL_cmov_logical : SDNode<"AMDILISD::CMOVLOG", SDTIL_GenTernaryOp>;
54 def IL_add : SDNode<"AMDILISD::ADD" , SDTIL_GenBinaryOp>;
55 def IL_cmov : SDNode<"AMDILISD::CMOV" , SDTIL_GenBinaryOp>;
56 def IL_or : SDNode<"AMDILISD::OR" ,SDTIL_GenBinaryOp>;
57 def IL_and : SDNode<"AMDILISD::AND" ,SDTIL_GenBinaryOp>;
58 def IL_xor : SDNode<"AMDILISD::XOR", SDTIL_GenBinaryOp>;
59 def IL_not : SDNode<"AMDILISD::NOT", SDTIL_GenUnaryOp>;
60 def IL_div_inf : SDNode<"AMDILISD::DIV_INF", SDTIL_GenBinaryOp>;
61 def IL_mad : SDNode<"AMDILISD::MAD", SDTIL_GenTernaryOp>;
63 //===----------------------------------------------------------------------===//
65 //===----------------------------------------------------------------------===//
66 def IL_inegate : SDNode<"AMDILISD::INEGATE" , SDTIntUnaryOp>;
67 def IL_umul : SDNode<"AMDILISD::UMUL" , SDTIntBinOp,
68 [SDNPCommutative, SDNPAssociative]>;
69 def IL_mov : SDNode<"AMDILISD::MOVE", SDTIL_GenUnaryOp>;
70 def IL_phimov : SDNode<"AMDILISD::PHIMOVE", SDTIL_GenUnaryOp>;
71 def IL_bitconv : SDNode<"AMDILISD::BITCONV", SDTIL_GenBitConv>;
72 def IL_ffb_hi : SDNode<"AMDILISD::IFFB_HI", SDTIL_GenUnaryOp>;
73 def IL_ffb_lo : SDNode<"AMDILISD::IFFB_LO", SDTIL_GenUnaryOp>;
74 def IL_smax : SDNode<"AMDILISD::SMAX", SDTIL_GenBinaryOp>;
76 //===----------------------------------------------------------------------===//
78 //===----------------------------------------------------------------------===//
79 def IL_dcreate : SDNode<"AMDILISD::DCREATE" , SDTIL_DCreate>;
80 def IL_dcomphi : SDNode<"AMDILISD::DCOMPHI" , SDTIL_DComp>;
81 def IL_dcomplo : SDNode<"AMDILISD::DCOMPLO" , SDTIL_DComp>;
82 def IL_dcreate2 : SDNode<"AMDILISD::DCREATE2" , SDTIL_DCreate2>;
83 def IL_dcomphi2 : SDNode<"AMDILISD::DCOMPHI2" , SDTIL_DComp2>;
84 def IL_dcomplo2 : SDNode<"AMDILISD::DCOMPLO2" , SDTIL_DComp2>;
86 //===----------------------------------------------------------------------===//
88 //===----------------------------------------------------------------------===//
89 def IL_lcreate : SDNode<"AMDILISD::LCREATE" , SDTIL_LCreate>;
90 def IL_lcreate2 : SDNode<"AMDILISD::LCREATE2" , SDTIL_LCreate2>;
91 def IL_lcomphi : SDNode<"AMDILISD::LCOMPHI" , SDTIL_LComp>;
92 def IL_lcomphi2 : SDNode<"AMDILISD::LCOMPHI2" , SDTIL_LComp2>;
93 def IL_lcomplo : SDNode<"AMDILISD::LCOMPLO" , SDTIL_LComp>;
94 def IL_lcomplo2 : SDNode<"AMDILISD::LCOMPLO2" , SDTIL_LComp2>;
96 //===----------------------------------------------------------------------===//
98 //===----------------------------------------------------------------------===//
99 def IL_vbuild : SDNode<"AMDILISD::VBUILD", SDTIL_GenVecBuild,
101 def IL_vextract : SDNode<"AMDILISD::VEXTRACT", SDTIL_GenVecExtract,
103 def IL_vinsert : SDNode<"AMDILISD::VINSERT", SDTIL_GenVecInsert,
105 def IL_vconcat : SDNode<"AMDILISD::VCONCAT", SDTIL_GenVecConcat,
108 //===----------------------------------------------------------------------===//
109 // AMDIL Image Custom SDNodes
110 //===----------------------------------------------------------------------===//
111 def image2d_read : SDNode<"AMDILISD::IMAGE2D_READ", SDTIL_ImageRead,
112 [SDNPHasChain, SDNPMayLoad]>;
113 def image2d_write : SDNode<"AMDILISD::IMAGE2D_WRITE", SDTIL_ImageWrite,
114 [SDNPHasChain, SDNPMayStore]>;
115 def image2d_info0 : SDNode<"AMDILISD::IMAGE2D_INFO0", SDTIL_ImageInfo, []>;
116 def image2d_info1 : SDNode<"AMDILISD::IMAGE2D_INFO1", SDTIL_ImageInfo, []>;
117 def image3d_read : SDNode<"AMDILISD::IMAGE3D_READ", SDTIL_ImageRead,
118 [SDNPHasChain, SDNPMayLoad]>;
119 def image3d_write : SDNode<"AMDILISD::IMAGE3D_WRITE", SDTIL_ImageWrite3D,
120 [SDNPHasChain, SDNPMayStore]>;
121 def image3d_info0 : SDNode<"AMDILISD::IMAGE3D_INFO0", SDTIL_ImageInfo, []>;
122 def image3d_info1 : SDNode<"AMDILISD::IMAGE3D_INFO1", SDTIL_ImageInfo, []>;
124 //===----------------------------------------------------------------------===//
125 // AMDIL Atomic Custom SDNodes
126 //===----------------------------------------------------------------------===//
127 //===-------------- 32 bit global atomics with return values --------------===//
128 def atom_g_add : SDNode<"AMDILISD::ATOM_G_ADD", SDTIL_BinAtom,
129 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
130 def atom_g_and : SDNode<"AMDILISD::ATOM_G_AND", SDTIL_BinAtom,
131 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
132 def atom_g_cmpxchg : SDNode<"AMDILISD::ATOM_G_CMPXCHG", SDTIL_TriAtom,
133 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
134 def atom_g_dec : SDNode<"AMDILISD::ATOM_G_DEC", SDTIL_BinAtom,
135 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
136 def atom_g_inc : SDNode<"AMDILISD::ATOM_G_INC", SDTIL_BinAtom,
137 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
138 def atom_g_max : SDNode<"AMDILISD::ATOM_G_MAX", SDTIL_BinAtom,
139 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
140 def atom_g_umax : SDNode<"AMDILISD::ATOM_G_UMAX", SDTIL_BinAtom,
141 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
142 def atom_g_min : SDNode<"AMDILISD::ATOM_G_MIN", SDTIL_BinAtom,
143 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
144 def atom_g_umin : SDNode<"AMDILISD::ATOM_G_UMIN", SDTIL_BinAtom,
145 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
146 def atom_g_or : SDNode<"AMDILISD::ATOM_G_OR", SDTIL_BinAtom,
147 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
148 def atom_g_sub : SDNode<"AMDILISD::ATOM_G_SUB", SDTIL_BinAtom,
149 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
150 def atom_g_rsub : SDNode<"AMDILISD::ATOM_G_RSUB", SDTIL_BinAtom,
151 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
152 def atom_g_xchg : SDNode<"AMDILISD::ATOM_G_XCHG", SDTIL_BinAtom,
153 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
154 def atom_g_xor : SDNode<"AMDILISD::ATOM_G_XOR", SDTIL_BinAtom,
155 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
157 //===------------- 32 bit global atomics without return values ------------===//
158 def atom_g_add_noret : SDNode<"AMDILISD::ATOM_G_ADD_NORET", SDTIL_BinAtom,
159 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
160 def atom_g_and_noret : SDNode<"AMDILISD::ATOM_G_AND_NORET", SDTIL_BinAtom,
161 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
162 def atom_g_cmpxchg_noret : SDNode<"AMDILISD::ATOM_G_CMPXCHG_NORET",
163 SDTIL_TriAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
164 def atom_g_cmp_noret : SDNode<"AMDILISD::ATOM_G_CMPXCHG_NORET",
165 SDTIL_TriAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
166 def atom_g_dec_noret : SDNode<"AMDILISD::ATOM_G_DEC_NORET", SDTIL_BinAtom,
167 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
168 def atom_g_inc_noret : SDNode<"AMDILISD::ATOM_G_INC_NORET", SDTIL_BinAtom,
169 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
170 def atom_g_max_noret : SDNode<"AMDILISD::ATOM_G_MAX_NORET", SDTIL_BinAtom,
171 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
172 def atom_g_umax_noret: SDNode<"AMDILISD::ATOM_G_UMAX_NORET",
173 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
174 def atom_g_min_noret : SDNode<"AMDILISD::ATOM_G_MIN_NORET", SDTIL_BinAtom,
175 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
176 def atom_g_umin_noret: SDNode<"AMDILISD::ATOM_G_UMIN_NORET",
177 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
178 def atom_g_or_noret : SDNode<"AMDILISD::ATOM_G_OR_NORET", SDTIL_BinAtom,
179 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
180 def atom_g_sub_noret : SDNode<"AMDILISD::ATOM_G_SUB_NORET", SDTIL_BinAtom,
181 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
182 def atom_g_rsub_noret : SDNode<"AMDILISD::ATOM_G_RSUB_NORET", SDTIL_BinAtom,
183 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
184 def atom_g_xchg_noret: SDNode<"AMDILISD::ATOM_G_XCHG_NORET",
185 SDTIL_BinAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
186 def atom_g_xor_noret : SDNode<"AMDILISD::ATOM_G_XOR_NORET", SDTIL_BinAtom,
187 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
189 //===--------------- 32 bit local atomics with return values --------------===//
190 def atom_l_add : SDNode<"AMDILISD::ATOM_L_ADD", SDTIL_BinAtom,
191 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
192 def atom_l_and : SDNode<"AMDILISD::ATOM_L_AND", SDTIL_BinAtom,
193 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
194 def atom_l_cmpxchg : SDNode<"AMDILISD::ATOM_L_CMPXCHG", SDTIL_TriAtom,
195 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
196 def atom_l_dec : SDNode<"AMDILISD::ATOM_L_DEC", SDTIL_BinAtom,
197 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
198 def atom_l_inc : SDNode<"AMDILISD::ATOM_L_INC", SDTIL_BinAtom,
199 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
200 def atom_l_max : SDNode<"AMDILISD::ATOM_L_MAX", SDTIL_BinAtom,
201 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
202 def atom_l_umax : SDNode<"AMDILISD::ATOM_L_UMAX", SDTIL_BinAtom,
203 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
204 def atom_l_min : SDNode<"AMDILISD::ATOM_L_MIN", SDTIL_BinAtom,
205 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
206 def atom_l_umin : SDNode<"AMDILISD::ATOM_L_UMIN", SDTIL_BinAtom,
207 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
208 def atom_l_or : SDNode<"AMDILISD::ATOM_L_OR", SDTIL_BinAtom,
209 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
210 def atom_l_mskor : SDNode<"AMDILISD::ATOM_L_MSKOR", SDTIL_TriAtom,
211 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
212 def atom_l_sub : SDNode<"AMDILISD::ATOM_L_SUB", SDTIL_BinAtom,
213 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
214 def atom_l_rsub : SDNode<"AMDILISD::ATOM_L_RSUB", SDTIL_BinAtom,
215 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
216 def atom_l_xchg : SDNode<"AMDILISD::ATOM_L_XCHG", SDTIL_BinAtom,
217 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
218 def atom_l_xor : SDNode<"AMDILISD::ATOM_L_XOR", SDTIL_BinAtom,
219 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
221 //===-------------- 32 bit local atomics without return values ------------===//
222 def atom_l_add_noret : SDNode<"AMDILISD::ATOM_L_ADD_NORET", SDTIL_BinAtom,
223 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
224 def atom_l_and_noret : SDNode<"AMDILISD::ATOM_L_AND_NORET", SDTIL_BinAtom,
225 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
226 def atom_l_cmpxchg_noret : SDNode<"AMDILISD::ATOM_L_CMPXCHG_NORET",
227 SDTIL_TriAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
228 def atom_l_dec_noret : SDNode<"AMDILISD::ATOM_L_DEC_NORET", SDTIL_BinAtom,
229 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
230 def atom_l_inc_noret : SDNode<"AMDILISD::ATOM_L_INC_NORET", SDTIL_BinAtom,
231 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
232 def atom_l_max_noret : SDNode<"AMDILISD::ATOM_L_MAX_NORET", SDTIL_BinAtom,
233 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
234 def atom_l_umax_noret: SDNode<"AMDILISD::ATOM_L_UMAX_NORET",
235 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
236 def atom_l_min_noret : SDNode<"AMDILISD::ATOM_L_MIN_NORET", SDTIL_BinAtom,
237 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
238 def atom_l_umin_noret: SDNode<"AMDILISD::ATOM_L_UMIN_NORET",
239 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
240 def atom_l_or_noret : SDNode<"AMDILISD::ATOM_L_OR_NORET", SDTIL_BinAtom,
241 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
242 def atom_l_mskor_noret : SDNode<"AMDILISD::ATOM_L_MSKOR_NORET",
243 SDTIL_TriAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
244 def atom_l_sub_noret : SDNode<"AMDILISD::ATOM_L_SUB_NORET", SDTIL_BinAtom,
245 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
246 def atom_l_rsub_noret : SDNode<"AMDILISD::ATOM_L_RSUB_NORET",
247 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
248 def atom_l_xchg_noret: SDNode<"AMDILISD::ATOM_L_XCHG_NORET",
249 SDTIL_BinAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
250 def atom_l_xor_noret : SDNode<"AMDILISD::ATOM_L_XOR_NORET", SDTIL_BinAtom,
251 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
253 //===--------------- 32 bit local atomics with return values --------------===//
254 def atom_r_add : SDNode<"AMDILISD::ATOM_R_ADD", SDTIL_BinAtom,
255 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
256 def atom_r_and : SDNode<"AMDILISD::ATOM_R_AND", SDTIL_BinAtom,
257 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
258 def atom_r_cmpxchg : SDNode<"AMDILISD::ATOM_R_CMPXCHG", SDTIL_TriAtom,
259 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
260 def atom_r_dec : SDNode<"AMDILISD::ATOM_R_DEC", SDTIL_BinAtom,
261 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
262 def atom_r_inc : SDNode<"AMDILISD::ATOM_R_INC", SDTIL_BinAtom,
263 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
264 def atom_r_max : SDNode<"AMDILISD::ATOM_R_MAX", SDTIL_BinAtom,
265 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
266 def atom_r_umax : SDNode<"AMDILISD::ATOM_R_UMAX", SDTIL_BinAtom,
267 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
268 def atom_r_min : SDNode<"AMDILISD::ATOM_R_MIN", SDTIL_BinAtom,
269 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
270 def atom_r_umin : SDNode<"AMDILISD::ATOM_R_UMIN", SDTIL_BinAtom,
271 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
272 def atom_r_or : SDNode<"AMDILISD::ATOM_R_OR", SDTIL_BinAtom,
273 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
274 def atom_r_mskor : SDNode<"AMDILISD::ATOM_R_MSKOR", SDTIL_TriAtom,
275 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
276 def atom_r_sub : SDNode<"AMDILISD::ATOM_R_SUB", SDTIL_BinAtom,
277 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
278 def atom_r_rsub : SDNode<"AMDILISD::ATOM_R_RSUB", SDTIL_BinAtom,
279 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
280 def atom_r_xchg : SDNode<"AMDILISD::ATOM_R_XCHG", SDTIL_BinAtom,
281 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
282 def atom_r_xor : SDNode<"AMDILISD::ATOM_R_XOR", SDTIL_BinAtom,
283 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
285 //===-------------- 32 bit local atomics without return values ------------===//
286 def atom_r_add_noret : SDNode<"AMDILISD::ATOM_R_ADD_NORET", SDTIL_BinAtom,
287 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
288 def atom_r_and_noret : SDNode<"AMDILISD::ATOM_R_AND_NORET", SDTIL_BinAtom,
289 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
290 def atom_r_cmpxchg_noret : SDNode<"AMDILISD::ATOM_R_CMPXCHG_NORET",
291 SDTIL_TriAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
292 def atom_r_dec_noret : SDNode<"AMDILISD::ATOM_R_DEC_NORET", SDTIL_BinAtom,
293 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
294 def atom_r_inc_noret : SDNode<"AMDILISD::ATOM_R_INC_NORET", SDTIL_BinAtom,
295 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
296 def atom_r_max_noret : SDNode<"AMDILISD::ATOM_R_MAX_NORET", SDTIL_BinAtom,
297 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
298 def atom_r_umax_noret: SDNode<"AMDILISD::ATOM_R_UMAX_NORET",
299 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
300 def atom_r_min_noret : SDNode<"AMDILISD::ATOM_R_MIN_NORET", SDTIL_BinAtom,
301 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
302 def atom_r_umin_noret: SDNode<"AMDILISD::ATOM_R_UMIN_NORET",
303 SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
304 def atom_r_or_noret : SDNode<"AMDILISD::ATOM_R_OR_NORET", SDTIL_BinAtom,
305 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
306 def atom_r_mskor_noret : SDNode<"AMDILISD::ATOM_R_MSKOR_NORET", SDTIL_TriAtom,
307 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
308 def atom_r_sub_noret : SDNode<"AMDILISD::ATOM_R_SUB_NORET", SDTIL_BinAtom,
309 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
310 def atom_r_rsub_noret : SDNode<"AMDILISD::ATOM_R_RSUB_NORET", SDTIL_BinAtom,
311 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
312 def atom_r_xchg_noret: SDNode<"AMDILISD::ATOM_R_XCHG_NORET",
313 SDTIL_BinAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
314 def atom_r_xor_noret : SDNode<"AMDILISD::ATOM_R_XOR_NORET", SDTIL_BinAtom,
315 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
317 //===--------------- 32 bit atomic counter instructions -------------------===//
318 def append_alloc : SDNode<"AMDILISD::APPEND_ALLOC", SDTIL_Append,
319 [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
320 def append_consume : SDNode<"AMDILISD::APPEND_CONSUME", SDTIL_Append,
321 [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
322 def append_alloc_noret : SDNode<"AMDILISD::APPEND_ALLOC_NORET", SDTIL_Append,
323 [SDNPHasChain, SDNPMayStore]>;
324 def append_consume_noret : SDNode<"AMDILISD::APPEND_CONSUME_NORET",
325 SDTIL_Append, [SDNPHasChain, SDNPMayStore]>;