2 * Copyright 2012 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Christian König <christian.koenig@amd.com>
31 #include "radeon/r600_pipe_common.h"
33 #define SI_NUM_SHADERS (PIPE_SHADER_TESS_EVAL+1)
34 #define SI_MAX_ATTRIBS 16
39 struct si_state_blend {
40 struct si_pm4_state pm4;
41 uint32_t cb_target_mask;
46 struct si_state_sample_mask {
47 struct si_pm4_state pm4;
51 struct si_state_viewport {
52 struct si_pm4_state pm4;
53 struct pipe_viewport_state viewport;
56 struct si_state_rasterizer {
57 struct si_pm4_state pm4;
60 bool multisample_enable;
61 bool line_stipple_enable;
62 unsigned sprite_coord_enable;
63 unsigned pa_sc_line_stipple;
64 unsigned pa_cl_clip_cntl;
65 unsigned clip_plane_enable;
68 bool poly_stipple_enable;
74 struct si_pm4_state pm4;
80 struct si_vertex_element
83 uint32_t rsrc_word3[SI_MAX_ATTRIBS];
84 uint32_t format_size[SI_MAX_ATTRIBS];
85 struct pipe_vertex_element elements[SI_MAX_ATTRIBS];
90 struct si_state_blend *blend;
91 struct si_pm4_state *blend_color;
92 struct si_pm4_state *clip;
93 struct si_state_sample_mask *sample_mask;
94 struct si_state_viewport *viewport[16];
95 struct si_state_rasterizer *rasterizer;
96 struct si_state_dsa *dsa;
97 struct si_pm4_state *fb_rs;
98 struct si_pm4_state *fb_blend;
99 struct si_pm4_state *dsa_stencil_ref;
100 struct si_pm4_state *ta_bordercolor_base;
101 struct si_pm4_state *ls;
102 struct si_pm4_state *hs;
103 struct si_pm4_state *es;
104 struct si_pm4_state *gs;
105 struct si_pm4_state *gs_rings;
106 struct si_pm4_state *tf_ring;
107 struct si_pm4_state *vgt_shader_config;
108 struct si_pm4_state *vs;
109 struct si_pm4_state *ps;
110 struct si_pm4_state *spi;
112 struct si_pm4_state *array[0];
115 struct si_shader_data {
116 struct r600_atom atom;
117 uint32_t sh_base[SI_NUM_SHADERS];
120 #define SI_NUM_USER_SAMPLERS 16 /* AKA OpenGL textures units per shader */
121 #define SI_POLY_STIPPLE_SAMPLER SI_NUM_USER_SAMPLERS
122 #define SI_NUM_SAMPLERS (SI_POLY_STIPPLE_SAMPLER + 1)
124 /* User sampler views: 0..15
125 * Polygon stipple tex: 16
126 * FMASK sampler views: 17..33 (no sampler states)
128 #define SI_FMASK_TEX_OFFSET SI_NUM_SAMPLERS
129 #define SI_NUM_SAMPLER_VIEWS (SI_FMASK_TEX_OFFSET + SI_NUM_SAMPLERS)
130 #define SI_NUM_SAMPLER_STATES SI_NUM_SAMPLERS
132 /* User constant buffers: 0..15
133 * Driver state constants: 16
135 #define SI_NUM_USER_CONST_BUFFERS 16
136 #define SI_DRIVER_STATE_CONST_BUF SI_NUM_USER_CONST_BUFFERS
137 #define SI_NUM_CONST_BUFFERS (SI_DRIVER_STATE_CONST_BUF + 1)
139 /* Read-write buffer slots.
142 * Streamout buffers: 2..5
144 #define SI_RING_TESS_FACTOR 0 /* for HS (TCS) */
145 #define SI_RING_ESGS 0 /* for ES, GS */
146 #define SI_RING_GSVS 1 /* for GS, VS */
147 #define SI_RING_GSVS_1 2 /* 1, 2, 3 for GS */
148 #define SI_RING_GSVS_2 3
149 #define SI_RING_GSVS_3 4
150 #define SI_NUM_RING_BUFFERS 5
151 #define SI_SO_BUF_OFFSET SI_NUM_RING_BUFFERS
152 #define SI_NUM_RW_BUFFERS (SI_SO_BUF_OFFSET + 4)
154 #define SI_NUM_VERTEX_BUFFERS SI_MAX_ATTRIBS
157 /* This represents descriptors in memory, such as buffer resources,
158 * image resources, and sampler states.
160 struct si_descriptors {
161 /* The list of descriptors in malloc'd memory. */
163 /* The size of one descriptor. */
164 unsigned element_dw_size;
165 /* The maximum number of descriptors. */
166 unsigned num_elements;
167 /* Whether the list has been changed and should be re-uploaded. */
170 /* The buffer where the descriptors have been uploaded. */
171 struct r600_resource *buffer;
172 unsigned buffer_offset;
174 /* The i-th bit is set if that element is enabled (non-NULL resource). */
175 uint64_t enabled_mask;
177 /* The shader userdata offset within a shader where the 64-bit pointer to the descriptor
178 * array will be stored. */
179 unsigned shader_userdata_offset;
180 /* Whether the pointer should be re-emitted. */
184 struct si_sampler_views {
185 struct si_descriptors desc;
186 struct pipe_sampler_view *views[SI_NUM_SAMPLER_VIEWS];
189 struct si_sampler_states {
190 struct si_descriptors desc;
191 void *saved_states[2]; /* saved for u_blitter */
194 struct si_buffer_resources {
195 struct si_descriptors desc;
196 enum radeon_bo_usage shader_usage; /* READ, WRITE, or READWRITE */
197 enum radeon_bo_priority priority;
198 struct pipe_resource **buffers; /* this has num_buffers elements */
201 #define si_pm4_block_idx(member) \
202 (offsetof(union si_state, named.member) / sizeof(struct si_pm4_state *))
204 #define si_pm4_state_changed(sctx, member) \
205 ((sctx)->queued.named.member != (sctx)->emitted.named.member)
207 #define si_pm4_bind_state(sctx, member, value) \
209 (sctx)->queued.named.member = (value); \
212 #define si_pm4_delete_state(sctx, member, value) \
214 if ((sctx)->queued.named.member == (value)) { \
215 (sctx)->queued.named.member = NULL; \
217 si_pm4_free_state(sctx, (struct si_pm4_state *)(value), \
218 si_pm4_block_idx(member)); \
221 #define si_pm4_set_state(sctx, member, value) \
223 if ((sctx)->queued.named.member != (value)) { \
224 si_pm4_free_state(sctx, \
225 (struct si_pm4_state *)(sctx)->queued.named.member, \
226 si_pm4_block_idx(member)); \
227 (sctx)->queued.named.member = (value); \
231 /* si_descriptors.c */
232 void si_set_sampler_descriptors(struct si_context *sctx, unsigned shader,
233 unsigned start, unsigned count, void **states);
234 void si_set_ring_buffer(struct pipe_context *ctx, uint shader, uint slot,
235 struct pipe_resource *buffer,
236 unsigned stride, unsigned num_records,
237 bool add_tid, bool swizzle,
238 unsigned element_size, unsigned index_stride, uint64_t offset);
239 void si_init_all_descriptors(struct si_context *sctx);
240 bool si_upload_shader_descriptors(struct si_context *sctx);
241 void si_release_all_descriptors(struct si_context *sctx);
242 void si_all_descriptors_begin_new_cs(struct si_context *sctx);
243 void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuffer,
244 const uint8_t *ptr, unsigned size, uint32_t *const_offset);
245 void si_shader_change_notify(struct si_context *sctx);
248 struct si_shader_selector;
250 void si_update_fb_blend_state(struct si_context *sctx);
251 boolean si_is_format_supported(struct pipe_screen *screen,
252 enum pipe_format format,
253 enum pipe_texture_target target,
254 unsigned sample_count,
256 void si_init_state_functions(struct si_context *sctx);
257 unsigned cik_bank_wh(unsigned bankwh);
258 unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode);
259 unsigned cik_macro_tile_aspect(unsigned macro_tile_aspect);
260 unsigned cik_tile_split(unsigned tile_split);
261 unsigned si_array_mode(unsigned mode);
262 uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex);
263 unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil);
264 struct pipe_sampler_view *
265 si_create_sampler_view_custom(struct pipe_context *ctx,
266 struct pipe_resource *texture,
267 const struct pipe_sampler_view *state,
268 unsigned width0, unsigned height0,
269 unsigned force_level);
271 /* si_state_shader.c */
272 void si_update_shaders(struct si_context *sctx);
273 void si_init_shader_functions(struct si_context *sctx);
275 /* si_state_draw.c */
276 extern const struct r600_atom si_atom_cache_flush;
277 extern const struct r600_atom si_atom_msaa_sample_locs;
278 extern const struct r600_atom si_atom_msaa_config;
279 void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *atom);
280 void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
281 void si_trace_emit(struct si_context *sctx);
284 void si_cmd_context_control(struct si_pm4_state *pm4);