2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
39 static const struct debug_named_value debug_options[] = {
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "tgsi", VC4_DEBUG_TGSI,
47 "Dump TGSI during program compile" },
48 { "shaderdb", VC4_DEBUG_SHADERDB,
49 "Dump program compile information for shader-db analysis" },
50 { "perf", VC4_DEBUG_PERF,
51 "Print during performance-related events" },
52 { "norast", VC4_DEBUG_NORAST,
53 "Skip actual hardware execution of commands" },
54 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
55 "Flush after each draw call" },
56 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
57 "Wait for finish after each flush" },
61 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
65 vc4_screen_get_name(struct pipe_screen *pscreen)
71 vc4_screen_get_vendor(struct pipe_screen *pscreen)
77 vc4_screen_destroy(struct pipe_screen *pscreen)
79 vc4_bufmgr_destroy(pscreen);
84 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
87 /* Supported features (boolean caps). */
88 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
89 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
90 case PIPE_CAP_NPOT_TEXTURES:
91 case PIPE_CAP_USER_CONSTANT_BUFFERS:
92 case PIPE_CAP_TEXTURE_SHADOW_MAP:
93 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
94 case PIPE_CAP_TWO_SIDED_STENCIL:
97 /* lying for GL 2.0 */
98 case PIPE_CAP_OCCLUSION_QUERY:
99 case PIPE_CAP_POINT_SPRITE:
102 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
105 case PIPE_CAP_GLSL_FEATURE_LEVEL:
108 case PIPE_CAP_MAX_VIEWPORTS:
111 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
112 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
115 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
118 /* Unsupported features. */
119 case PIPE_CAP_ANISOTROPIC_FILTER:
120 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
121 case PIPE_CAP_CUBE_MAP_ARRAY:
122 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
123 case PIPE_CAP_TEXTURE_SWIZZLE:
124 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
125 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
126 case PIPE_CAP_SEAMLESS_CUBE_MAP:
127 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
128 case PIPE_CAP_TGSI_INSTANCEID:
129 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
130 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
131 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
132 case PIPE_CAP_COMPUTE:
133 case PIPE_CAP_START_INSTANCE:
134 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
135 case PIPE_CAP_SHADER_STENCIL_EXPORT:
136 case PIPE_CAP_TGSI_TEXCOORD:
137 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
138 case PIPE_CAP_CONDITIONAL_RENDER:
139 case PIPE_CAP_PRIMITIVE_RESTART:
140 case PIPE_CAP_TEXTURE_MULTISAMPLE:
141 case PIPE_CAP_TEXTURE_BARRIER:
143 case PIPE_CAP_INDEP_BLEND_ENABLE:
144 case PIPE_CAP_INDEP_BLEND_FUNC:
145 case PIPE_CAP_DEPTH_CLIP_DISABLE:
146 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
147 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
148 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
149 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
150 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
151 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
152 case PIPE_CAP_USER_VERTEX_BUFFERS:
153 case PIPE_CAP_USER_INDEX_BUFFERS:
154 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
155 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
156 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
157 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
158 case PIPE_CAP_TEXTURE_GATHER_SM5:
159 case PIPE_CAP_FAKE_SW_MSAA:
160 case PIPE_CAP_TEXTURE_QUERY_LOD:
161 case PIPE_CAP_SAMPLE_SHADING:
162 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
163 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
164 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
165 case PIPE_CAP_MAX_TEXEL_OFFSET:
166 case PIPE_CAP_MAX_VERTEX_STREAMS:
167 case PIPE_CAP_DRAW_INDIRECT:
168 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
169 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
170 case PIPE_CAP_SAMPLER_VIEW_TARGET:
171 case PIPE_CAP_CLIP_HALFZ:
172 case PIPE_CAP_VERTEXID_NOBASE:
176 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
177 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
178 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
179 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
182 /* Geometry shader output, unsupported. */
183 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
184 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
188 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
189 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
190 return VC4_MAX_MIP_LEVELS;
191 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
192 /* Note: Not supported in hardware, just faking it. */
194 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
197 /* Render targets. */
198 case PIPE_CAP_MAX_RENDER_TARGETS:
202 case PIPE_CAP_QUERY_TIME_ELAPSED:
203 case PIPE_CAP_QUERY_TIMESTAMP:
206 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
207 case PIPE_CAP_MIN_TEXEL_OFFSET:
210 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
213 case PIPE_CAP_ENDIANNESS:
214 return PIPE_ENDIAN_LITTLE;
216 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
219 case PIPE_CAP_VENDOR_ID:
221 case PIPE_CAP_DEVICE_ID:
223 case PIPE_CAP_ACCELERATED:
225 case PIPE_CAP_VIDEO_MEMORY: {
226 uint64_t system_memory;
228 if (!os_get_total_physical_memory(&system_memory))
231 return (int)(system_memory >> 20);
237 fprintf(stderr, "unknown param %d\n", param);
243 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
246 case PIPE_CAPF_MAX_LINE_WIDTH:
247 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
250 case PIPE_CAPF_MAX_POINT_WIDTH:
251 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
254 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
256 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
258 case PIPE_CAPF_GUARD_BAND_LEFT:
259 case PIPE_CAPF_GUARD_BAND_TOP:
260 case PIPE_CAPF_GUARD_BAND_RIGHT:
261 case PIPE_CAPF_GUARD_BAND_BOTTOM:
264 fprintf(stderr, "unknown paramf %d\n", param);
270 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
271 enum pipe_shader_cap param)
273 if (shader != PIPE_SHADER_VERTEX &&
274 shader != PIPE_SHADER_FRAGMENT) {
278 /* this is probably not totally correct.. but it's a start: */
280 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
281 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
282 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
283 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
285 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
287 case PIPE_SHADER_CAP_MAX_INPUTS:
288 if (shader == PIPE_SHADER_FRAGMENT)
292 case PIPE_SHADER_CAP_MAX_OUTPUTS:
293 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
294 case PIPE_SHADER_CAP_MAX_TEMPS:
295 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
296 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
297 return 16 * 1024 * sizeof(float);
298 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
300 case PIPE_SHADER_CAP_MAX_PREDS:
301 return 0; /* nothing uses this */
302 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
304 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
305 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
306 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
308 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
310 case PIPE_SHADER_CAP_SUBROUTINES:
312 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
314 case PIPE_SHADER_CAP_INTEGERS:
316 case PIPE_SHADER_CAP_DOUBLES:
318 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
319 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
320 return VC4_MAX_TEXTURE_SAMPLERS;
321 case PIPE_SHADER_CAP_PREFERRED_IR:
322 return PIPE_SHADER_IR_TGSI;
324 fprintf(stderr, "unknown shader param %d\n", param);
331 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
332 enum pipe_format format,
333 enum pipe_texture_target target,
334 unsigned sample_count,
339 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
340 (sample_count > 1) ||
341 !util_format_is_supported(format, usage)) {
345 if (usage & PIPE_BIND_VERTEX_BUFFER) {
347 case PIPE_FORMAT_R32G32B32A32_FLOAT:
348 case PIPE_FORMAT_R32G32B32_FLOAT:
349 case PIPE_FORMAT_R32G32_FLOAT:
350 case PIPE_FORMAT_R32_FLOAT:
351 case PIPE_FORMAT_R32G32B32A32_SNORM:
352 case PIPE_FORMAT_R32G32B32_SNORM:
353 case PIPE_FORMAT_R32G32_SNORM:
354 case PIPE_FORMAT_R32_SNORM:
355 case PIPE_FORMAT_R32G32B32A32_SSCALED:
356 case PIPE_FORMAT_R32G32B32_SSCALED:
357 case PIPE_FORMAT_R32G32_SSCALED:
358 case PIPE_FORMAT_R32_SSCALED:
359 case PIPE_FORMAT_R16G16B16A16_UNORM:
360 case PIPE_FORMAT_R16G16B16_UNORM:
361 case PIPE_FORMAT_R16G16_UNORM:
362 case PIPE_FORMAT_R16_UNORM:
363 case PIPE_FORMAT_R16G16B16A16_SNORM:
364 case PIPE_FORMAT_R16G16B16_SNORM:
365 case PIPE_FORMAT_R16G16_SNORM:
366 case PIPE_FORMAT_R16_SNORM:
367 case PIPE_FORMAT_R16G16B16A16_USCALED:
368 case PIPE_FORMAT_R16G16B16_USCALED:
369 case PIPE_FORMAT_R16G16_USCALED:
370 case PIPE_FORMAT_R16_USCALED:
371 case PIPE_FORMAT_R16G16B16A16_SSCALED:
372 case PIPE_FORMAT_R16G16B16_SSCALED:
373 case PIPE_FORMAT_R16G16_SSCALED:
374 case PIPE_FORMAT_R16_SSCALED:
375 case PIPE_FORMAT_R8G8B8A8_UNORM:
376 case PIPE_FORMAT_R8G8B8_UNORM:
377 case PIPE_FORMAT_R8G8_UNORM:
378 case PIPE_FORMAT_R8_UNORM:
379 case PIPE_FORMAT_R8G8B8A8_SNORM:
380 case PIPE_FORMAT_R8G8B8_SNORM:
381 case PIPE_FORMAT_R8G8_SNORM:
382 case PIPE_FORMAT_R8_SNORM:
383 case PIPE_FORMAT_R8G8B8A8_USCALED:
384 case PIPE_FORMAT_R8G8B8_USCALED:
385 case PIPE_FORMAT_R8G8_USCALED:
386 case PIPE_FORMAT_R8_USCALED:
387 case PIPE_FORMAT_R8G8B8A8_SSCALED:
388 case PIPE_FORMAT_R8G8B8_SSCALED:
389 case PIPE_FORMAT_R8G8_SSCALED:
390 case PIPE_FORMAT_R8_SSCALED:
391 retval |= PIPE_BIND_VERTEX_BUFFER;
398 if ((usage & PIPE_BIND_RENDER_TARGET) &&
399 vc4_rt_format_supported(format)) {
400 retval |= PIPE_BIND_RENDER_TARGET;
403 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
404 (vc4_tex_format_supported(format))) {
405 retval |= PIPE_BIND_SAMPLER_VIEW;
408 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
409 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
410 format == PIPE_FORMAT_X8Z24_UNORM)) {
411 retval |= PIPE_BIND_DEPTH_STENCIL;
414 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
415 (format == PIPE_FORMAT_I8_UINT ||
416 format == PIPE_FORMAT_I16_UINT)) {
417 retval |= PIPE_BIND_INDEX_BUFFER;
420 if (usage & PIPE_BIND_TRANSFER_READ)
421 retval |= PIPE_BIND_TRANSFER_READ;
422 if (usage & PIPE_BIND_TRANSFER_WRITE)
423 retval |= PIPE_BIND_TRANSFER_WRITE;
426 if (retval != usage) {
428 "not supported: format=%s, target=%d, sample_count=%d, "
429 "usage=0x%x, retval=0x%x\n", util_format_name(format),
430 target, sample_count, usage, retval);
434 return retval == usage;
438 vc4_screen_create(int fd)
440 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
441 struct pipe_screen *pscreen;
443 pscreen = &screen->base;
445 pscreen->destroy = vc4_screen_destroy;
446 pscreen->get_param = vc4_screen_get_param;
447 pscreen->get_paramf = vc4_screen_get_paramf;
448 pscreen->get_shader_param = vc4_screen_get_shader_param;
449 pscreen->context_create = vc4_context_create;
450 pscreen->is_format_supported = vc4_screen_is_format_supported;
453 make_empty_list(&screen->bo_cache.time_list);
455 vc4_fence_init(screen);
457 vc4_debug = debug_get_option_vc4_debug();
458 if (vc4_debug & VC4_DEBUG_SHADERDB)
459 vc4_debug |= VC4_DEBUG_NORAST;
461 #if USE_VC4_SIMULATOR
462 vc4_simulator_init(screen);
465 vc4_resource_screen_init(pscreen);
467 pscreen->get_name = vc4_screen_get_name;
468 pscreen->get_vendor = vc4_screen_get_vendor;
474 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
477 struct winsys_handle *whandle)
479 whandle->stride = stride;
481 switch (whandle->type) {
482 case DRM_API_HANDLE_TYPE_SHARED:
483 return vc4_bo_flink(bo, &whandle->handle);
484 case DRM_API_HANDLE_TYPE_KMS:
485 whandle->handle = bo->handle;
487 case DRM_API_HANDLE_TYPE_FD:
488 whandle->handle = vc4_bo_get_dmabuf(bo);
489 return whandle->handle != -1;
496 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
497 struct winsys_handle *whandle)
499 struct vc4_screen *screen = vc4_screen(pscreen);
501 switch (whandle->type) {
502 case DRM_API_HANDLE_TYPE_SHARED:
503 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
504 case DRM_API_HANDLE_TYPE_FD:
505 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
508 "Attempt to import unsupported handle type %d\n",