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gallium: Add PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY
[android-x86/external-mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2  * Copyright © 2014 Broadcom
3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40         { "cl",       VC4_DEBUG_CL,
41           "Dump command list during creation" },
42         { "qpu",      VC4_DEBUG_QPU,
43           "Dump generated QPU instructions" },
44         { "qir",      VC4_DEBUG_QIR,
45           "Dump QPU IR during program compile" },
46         { "nir",      VC4_DEBUG_NIR,
47           "Dump NIR during program compile" },
48         { "tgsi",     VC4_DEBUG_TGSI,
49           "Dump TGSI during program compile" },
50         { "shaderdb", VC4_DEBUG_SHADERDB,
51           "Dump program compile information for shader-db analysis" },
52         { "perf",     VC4_DEBUG_PERF,
53           "Print during performance-related events" },
54         { "norast",   VC4_DEBUG_NORAST,
55           "Skip actual hardware execution of commands" },
56         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57           "Flush after each draw call" },
58         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59           "Wait for finish after each flush" },
60 #if USE_VC4_SIMULATOR
61         { "dump", VC4_DEBUG_DUMP,
62           "Write a GPU command stream trace file" },
63 #endif
64         { NULL }
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
68 uint32_t vc4_debug;
69
70 static const char *
71 vc4_screen_get_name(struct pipe_screen *pscreen)
72 {
73         return "VC4";
74 }
75
76 static const char *
77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
78 {
79         return "Broadcom";
80 }
81
82 static void
83 vc4_screen_destroy(struct pipe_screen *pscreen)
84 {
85         vc4_bufmgr_destroy(pscreen);
86         ralloc_free(pscreen);
87 }
88
89 static int
90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
91 {
92         switch (param) {
93                 /* Supported features (boolean caps). */
94         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
95         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
96         case PIPE_CAP_NPOT_TEXTURES:
97         case PIPE_CAP_USER_CONSTANT_BUFFERS:
98         case PIPE_CAP_TEXTURE_SHADOW_MAP:
99         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100         case PIPE_CAP_TWO_SIDED_STENCIL:
101         case PIPE_CAP_USER_INDEX_BUFFERS:
102         case PIPE_CAP_TEXTURE_MULTISAMPLE:
103         case PIPE_CAP_TEXTURE_SWIZZLE:
104                 return 1;
105
106                 /* lying for GL 2.0 */
107         case PIPE_CAP_OCCLUSION_QUERY:
108         case PIPE_CAP_POINT_SPRITE:
109                 return 1;
110
111         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
112                 return 256;
113
114         case PIPE_CAP_GLSL_FEATURE_LEVEL:
115                 return 120;
116
117         case PIPE_CAP_MAX_VIEWPORTS:
118                 return 1;
119
120         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
121         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
122                 return 1;
123
124         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
125                 return 1;
126
127                 /* Unsupported features. */
128         case PIPE_CAP_ANISOTROPIC_FILTER:
129         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
130         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
131         case PIPE_CAP_CUBE_MAP_ARRAY:
132         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
133         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
134         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
135         case PIPE_CAP_SEAMLESS_CUBE_MAP:
136         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
137         case PIPE_CAP_TGSI_INSTANCEID:
138         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
139         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
140         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
141         case PIPE_CAP_COMPUTE:
142         case PIPE_CAP_START_INSTANCE:
143         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
144         case PIPE_CAP_SHADER_STENCIL_EXPORT:
145         case PIPE_CAP_TGSI_TEXCOORD:
146         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
147         case PIPE_CAP_CONDITIONAL_RENDER:
148         case PIPE_CAP_PRIMITIVE_RESTART:
149         case PIPE_CAP_TEXTURE_BARRIER:
150         case PIPE_CAP_SM3:
151         case PIPE_CAP_INDEP_BLEND_ENABLE:
152         case PIPE_CAP_INDEP_BLEND_FUNC:
153         case PIPE_CAP_DEPTH_CLIP_DISABLE:
154         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
155         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
156         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
157         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
158         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
159         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
160         case PIPE_CAP_USER_VERTEX_BUFFERS:
161         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
162         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
163         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
164         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
165         case PIPE_CAP_TEXTURE_GATHER_SM5:
166         case PIPE_CAP_FAKE_SW_MSAA:
167         case PIPE_CAP_TEXTURE_QUERY_LOD:
168         case PIPE_CAP_SAMPLE_SHADING:
169         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
170         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
171         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
172         case PIPE_CAP_MAX_TEXEL_OFFSET:
173         case PIPE_CAP_MAX_VERTEX_STREAMS:
174         case PIPE_CAP_DRAW_INDIRECT:
175         case PIPE_CAP_MULTI_DRAW_INDIRECT:
176         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
177         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
178         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
179         case PIPE_CAP_SAMPLER_VIEW_TARGET:
180         case PIPE_CAP_CLIP_HALFZ:
181         case PIPE_CAP_VERTEXID_NOBASE:
182         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
183         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
184         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
185         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
186         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
187         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
188         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
189         case PIPE_CAP_DEPTH_BOUNDS_TEST:
190         case PIPE_CAP_TGSI_TXQS:
191         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
192         case PIPE_CAP_SHAREABLE_SHADERS:
193         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
194         case PIPE_CAP_CLEAR_TEXTURE:
195         case PIPE_CAP_DRAW_PARAMETERS:
196         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
197         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
198         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
199         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
200         case PIPE_CAP_INVALIDATE_BUFFER:
201         case PIPE_CAP_GENERATE_MIPMAP:
202         case PIPE_CAP_STRING_MARKER:
203                 return 0;
204
205                 /* Stream output. */
206         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
207         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
208         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
209         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
210                 return 0;
211
212                 /* Geometry shader output, unsupported. */
213         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
214         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
215                 return 0;
216
217                 /* Texturing. */
218         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
219         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
220                 return VC4_MAX_MIP_LEVELS;
221         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
222                 /* Note: Not supported in hardware, just faking it. */
223                 return 5;
224         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
225                 return 0;
226
227                 /* Render targets. */
228         case PIPE_CAP_MAX_RENDER_TARGETS:
229                 return 1;
230
231                 /* Queries. */
232         case PIPE_CAP_QUERY_TIME_ELAPSED:
233         case PIPE_CAP_QUERY_TIMESTAMP:
234                 return 0;
235
236         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
237         case PIPE_CAP_MIN_TEXEL_OFFSET:
238                 return 0;
239
240         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
241                 return 2048;
242
243         case PIPE_CAP_ENDIANNESS:
244                 return PIPE_ENDIAN_LITTLE;
245
246         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
247                 return 64;
248
249         case PIPE_CAP_VENDOR_ID:
250                 return 0x14E4;
251         case PIPE_CAP_DEVICE_ID:
252                 return 0xFFFFFFFF;
253         case PIPE_CAP_ACCELERATED:
254                 return 1;
255         case PIPE_CAP_VIDEO_MEMORY: {
256                 uint64_t system_memory;
257
258                 if (!os_get_total_physical_memory(&system_memory))
259                         return 0;
260
261                 return (int)(system_memory >> 20);
262         }
263         case PIPE_CAP_UMA:
264                 return 1;
265
266         default:
267                 fprintf(stderr, "unknown param %d\n", param);
268                 return 0;
269         }
270 }
271
272 static float
273 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
274 {
275         switch (param) {
276         case PIPE_CAPF_MAX_LINE_WIDTH:
277         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
278                 return 32;
279
280         case PIPE_CAPF_MAX_POINT_WIDTH:
281         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
282                 return 512.0f;
283
284         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
285                 return 0.0f;
286         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
287                 return 0.0f;
288         case PIPE_CAPF_GUARD_BAND_LEFT:
289         case PIPE_CAPF_GUARD_BAND_TOP:
290         case PIPE_CAPF_GUARD_BAND_RIGHT:
291         case PIPE_CAPF_GUARD_BAND_BOTTOM:
292                 return 0.0f;
293         default:
294                 fprintf(stderr, "unknown paramf %d\n", param);
295                 return 0;
296         }
297 }
298
299 static int
300 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
301                            enum pipe_shader_cap param)
302 {
303         if (shader != PIPE_SHADER_VERTEX &&
304             shader != PIPE_SHADER_FRAGMENT) {
305                 return 0;
306         }
307
308         /* this is probably not totally correct.. but it's a start: */
309         switch (param) {
310         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
311         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
312         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
313         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
314                 return 16384;
315         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
316                 return 0;
317         case PIPE_SHADER_CAP_MAX_INPUTS:
318                 if (shader == PIPE_SHADER_FRAGMENT)
319                         return 8;
320                 else
321                         return 16;
322         case PIPE_SHADER_CAP_MAX_OUTPUTS:
323                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
324         case PIPE_SHADER_CAP_MAX_TEMPS:
325                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
326         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
327                 return 16 * 1024 * sizeof(float);
328         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
329                 return 1;
330         case PIPE_SHADER_CAP_MAX_PREDS:
331                 return 0; /* nothing uses this */
332         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
333                 return 0;
334         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
335         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
336         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
337                 return 0;
338         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
339                 return 1;
340         case PIPE_SHADER_CAP_SUBROUTINES:
341                 return 0;
342         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
343                 return 0;
344         case PIPE_SHADER_CAP_INTEGERS:
345                 return 1;
346         case PIPE_SHADER_CAP_DOUBLES:
347         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
348         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
349         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
350         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
351                 return 0;
352         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
353         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
354                 return VC4_MAX_TEXTURE_SAMPLERS;
355         case PIPE_SHADER_CAP_PREFERRED_IR:
356                 return PIPE_SHADER_IR_TGSI;
357         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
358                 return 32;
359         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
360                 return 0;
361         default:
362                 fprintf(stderr, "unknown shader param %d\n", param);
363                 return 0;
364         }
365         return 0;
366 }
367
368 static boolean
369 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
370                                enum pipe_format format,
371                                enum pipe_texture_target target,
372                                unsigned sample_count,
373                                unsigned usage)
374 {
375         unsigned retval = 0;
376
377         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
378             !util_format_is_supported(format, usage)) {
379                 return FALSE;
380         }
381
382         if (usage & PIPE_BIND_VERTEX_BUFFER) {
383                 switch (format) {
384                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
385                 case PIPE_FORMAT_R32G32B32_FLOAT:
386                 case PIPE_FORMAT_R32G32_FLOAT:
387                 case PIPE_FORMAT_R32_FLOAT:
388                 case PIPE_FORMAT_R32G32B32A32_SNORM:
389                 case PIPE_FORMAT_R32G32B32_SNORM:
390                 case PIPE_FORMAT_R32G32_SNORM:
391                 case PIPE_FORMAT_R32_SNORM:
392                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
393                 case PIPE_FORMAT_R32G32B32_SSCALED:
394                 case PIPE_FORMAT_R32G32_SSCALED:
395                 case PIPE_FORMAT_R32_SSCALED:
396                 case PIPE_FORMAT_R16G16B16A16_UNORM:
397                 case PIPE_FORMAT_R16G16B16_UNORM:
398                 case PIPE_FORMAT_R16G16_UNORM:
399                 case PIPE_FORMAT_R16_UNORM:
400                 case PIPE_FORMAT_R16G16B16A16_SNORM:
401                 case PIPE_FORMAT_R16G16B16_SNORM:
402                 case PIPE_FORMAT_R16G16_SNORM:
403                 case PIPE_FORMAT_R16_SNORM:
404                 case PIPE_FORMAT_R16G16B16A16_USCALED:
405                 case PIPE_FORMAT_R16G16B16_USCALED:
406                 case PIPE_FORMAT_R16G16_USCALED:
407                 case PIPE_FORMAT_R16_USCALED:
408                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
409                 case PIPE_FORMAT_R16G16B16_SSCALED:
410                 case PIPE_FORMAT_R16G16_SSCALED:
411                 case PIPE_FORMAT_R16_SSCALED:
412                 case PIPE_FORMAT_R8G8B8A8_UNORM:
413                 case PIPE_FORMAT_R8G8B8_UNORM:
414                 case PIPE_FORMAT_R8G8_UNORM:
415                 case PIPE_FORMAT_R8_UNORM:
416                 case PIPE_FORMAT_R8G8B8A8_SNORM:
417                 case PIPE_FORMAT_R8G8B8_SNORM:
418                 case PIPE_FORMAT_R8G8_SNORM:
419                 case PIPE_FORMAT_R8_SNORM:
420                 case PIPE_FORMAT_R8G8B8A8_USCALED:
421                 case PIPE_FORMAT_R8G8B8_USCALED:
422                 case PIPE_FORMAT_R8G8_USCALED:
423                 case PIPE_FORMAT_R8_USCALED:
424                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
425                 case PIPE_FORMAT_R8G8B8_SSCALED:
426                 case PIPE_FORMAT_R8G8_SSCALED:
427                 case PIPE_FORMAT_R8_SSCALED:
428                         retval |= PIPE_BIND_VERTEX_BUFFER;
429                         break;
430                 default:
431                         break;
432                 }
433         }
434
435         if ((usage & PIPE_BIND_RENDER_TARGET) &&
436             (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
437             vc4_rt_format_supported(format)) {
438                 retval |= PIPE_BIND_RENDER_TARGET;
439         }
440
441         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
442             (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
443             (vc4_tex_format_supported(format))) {
444                 retval |= PIPE_BIND_SAMPLER_VIEW;
445         }
446
447         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
448             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
449              format == PIPE_FORMAT_X8Z24_UNORM)) {
450                 retval |= PIPE_BIND_DEPTH_STENCIL;
451         }
452
453         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
454             (format == PIPE_FORMAT_I8_UINT ||
455              format == PIPE_FORMAT_I16_UINT)) {
456                 retval |= PIPE_BIND_INDEX_BUFFER;
457         }
458
459         if (usage & PIPE_BIND_TRANSFER_READ)
460                 retval |= PIPE_BIND_TRANSFER_READ;
461         if (usage & PIPE_BIND_TRANSFER_WRITE)
462                 retval |= PIPE_BIND_TRANSFER_WRITE;
463
464 #if 0
465         if (retval != usage) {
466                 fprintf(stderr,
467                         "not supported: format=%s, target=%d, sample_count=%d, "
468                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
469                         target, sample_count, usage, retval);
470         }
471 #endif
472
473         return retval == usage;
474 }
475
476 struct pipe_screen *
477 vc4_screen_create(int fd)
478 {
479         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
480         struct pipe_screen *pscreen;
481
482         pscreen = &screen->base;
483
484         pscreen->destroy = vc4_screen_destroy;
485         pscreen->get_param = vc4_screen_get_param;
486         pscreen->get_paramf = vc4_screen_get_paramf;
487         pscreen->get_shader_param = vc4_screen_get_shader_param;
488         pscreen->context_create = vc4_context_create;
489         pscreen->is_format_supported = vc4_screen_is_format_supported;
490
491         screen->fd = fd;
492         list_inithead(&screen->bo_cache.time_list);
493
494         vc4_fence_init(screen);
495
496         vc4_debug = debug_get_option_vc4_debug();
497         if (vc4_debug & VC4_DEBUG_SHADERDB)
498                 vc4_debug |= VC4_DEBUG_NORAST;
499
500 #if USE_VC4_SIMULATOR
501         vc4_simulator_init(screen);
502 #endif
503
504         vc4_resource_screen_init(pscreen);
505
506         pscreen->get_name = vc4_screen_get_name;
507         pscreen->get_vendor = vc4_screen_get_vendor;
508         pscreen->get_device_vendor = vc4_screen_get_vendor;
509
510         return pscreen;
511 }
512
513 boolean
514 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
515                          struct vc4_bo *bo,
516                          unsigned stride,
517                          struct winsys_handle *whandle)
518 {
519         whandle->stride = stride;
520
521         /* If we're passing some reference to our BO out to some other part of
522          * the system, then we can't do any optimizations about only us being
523          * the ones seeing it (like BO caching or shadow update avoidance).
524          */
525         bo->private = false;
526
527         switch (whandle->type) {
528         case DRM_API_HANDLE_TYPE_SHARED:
529                 return vc4_bo_flink(bo, &whandle->handle);
530         case DRM_API_HANDLE_TYPE_KMS:
531                 whandle->handle = bo->handle;
532                 return TRUE;
533         case DRM_API_HANDLE_TYPE_FD:
534                 whandle->handle = vc4_bo_get_dmabuf(bo);
535                 return whandle->handle != -1;
536         }
537
538         return FALSE;
539 }
540
541 struct vc4_bo *
542 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
543                           struct winsys_handle *whandle)
544 {
545         struct vc4_screen *screen = vc4_screen(pscreen);
546
547         switch (whandle->type) {
548         case DRM_API_HANDLE_TYPE_SHARED:
549                 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
550         case DRM_API_HANDLE_TYPE_FD:
551                 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
552         default:
553                 fprintf(stderr,
554                         "Attempt to import unsupported handle type %d\n",
555                         whandle->type);
556                 return NULL;
557         }
558 }