src/gallium/drivers/vc4/vc4_screen.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_debug.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/ralloc.h"
  34
  35 #include "vc4_screen.h"
  36 #include "vc4_context.h"
  37 #include "vc4_resource.h"
  38
  39 static const struct debug_named_value debug_options[] = {
  40         { "cl",       VC4_DEBUG_CL,
  41           "Dump command list during creation" },
  42         { "qpu",      VC4_DEBUG_QPU,
  43           "Dump generated QPU instructions" },
  44         { "qir",      VC4_DEBUG_QIR,
  45           "Dump QPU IR during program compile" },
  46         { "nir",      VC4_DEBUG_NIR,
  47           "Dump NIR during program compile" },
  48         { "tgsi",     VC4_DEBUG_TGSI,
  49           "Dump TGSI during program compile" },
  50         { "shaderdb", VC4_DEBUG_SHADERDB,
  51           "Dump program compile information for shader-db analysis" },
  52         { "perf",     VC4_DEBUG_PERF,
  53           "Print during performance-related events" },
  54         { "norast",   VC4_DEBUG_NORAST,
  55           "Skip actual hardware execution of commands" },
  56         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
  57           "Flush after each draw call" },
  58         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
  59           "Wait for finish after each flush" },
  60 #if USE_VC4_SIMULATOR
  61         { "dump", VC4_DEBUG_DUMP,
  62           "Write a GPU command stream trace file" },
  63 #endif
  64         { NULL }
  65 };
  66
  67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
  68 uint32_t vc4_debug;
  69
  70 static const char *
  71 vc4_screen_get_name(struct pipe_screen *pscreen)
  72 {
  73         return "VC4";
  74 }
  75
  76 static const char *
  77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
  78 {
  79         return "Broadcom";
  80 }
  81
  82 static void
  83 vc4_screen_destroy(struct pipe_screen *pscreen)
  84 {
  85         vc4_bufmgr_destroy(pscreen);
  86         ralloc_free(pscreen);
  87 }
  88
  89 static int
  90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  91 {
  92         switch (param) {
  93                 /* Supported features (boolean caps). */
  94         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
  95         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_USER_CONSTANT_BUFFERS:
  98         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  99         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 100         case PIPE_CAP_TWO_SIDED_STENCIL:
 101         case PIPE_CAP_USER_INDEX_BUFFERS:
 102         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 103         case PIPE_CAP_TEXTURE_SWIZZLE:
 104                 return 1;
 105
 106                 /* lying for GL 2.0 */
 107         case PIPE_CAP_OCCLUSION_QUERY:
 108         case PIPE_CAP_POINT_SPRITE:
 109                 return 1;
 110
 111         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 112                 return 256;
 113
 114         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 115                 return 120;
 116
 117         case PIPE_CAP_MAX_VIEWPORTS:
 118                 return 1;
 119
 120         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 121         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 122                 return 1;
 123
 124         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 125                 return 1;
 126
 127                 /* Unsupported features. */
 128         case PIPE_CAP_ANISOTROPIC_FILTER:
 129         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 130         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 131         case PIPE_CAP_CUBE_MAP_ARRAY:
 132         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 133         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 134         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 135         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 136         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 137         case PIPE_CAP_TGSI_INSTANCEID:
 138         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 139         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 140         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 141         case PIPE_CAP_COMPUTE:
 142         case PIPE_CAP_START_INSTANCE:
 143         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 144         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 145         case PIPE_CAP_TGSI_TEXCOORD:
 146         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 147         case PIPE_CAP_CONDITIONAL_RENDER:
 148         case PIPE_CAP_PRIMITIVE_RESTART:
 149         case PIPE_CAP_TEXTURE_BARRIER:
 150         case PIPE_CAP_SM3:
 151         case PIPE_CAP_INDEP_BLEND_ENABLE:
 152         case PIPE_CAP_INDEP_BLEND_FUNC:
 153         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 155         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 156         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 157         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 158         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 159         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 160         case PIPE_CAP_USER_VERTEX_BUFFERS:
 161         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 162         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 163         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 164         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 165         case PIPE_CAP_TEXTURE_GATHER_SM5:
 166         case PIPE_CAP_FAKE_SW_MSAA:
 167         case PIPE_CAP_TEXTURE_QUERY_LOD:
 168         case PIPE_CAP_SAMPLE_SHADING:
 169         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 170         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 171         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 172         case PIPE_CAP_MAX_TEXEL_OFFSET:
 173         case PIPE_CAP_MAX_VERTEX_STREAMS:
 174         case PIPE_CAP_DRAW_INDIRECT:
 175         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 176         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 177         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 178         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 179         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 180         case PIPE_CAP_CLIP_HALFZ:
 181         case PIPE_CAP_VERTEXID_NOBASE:
 182         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 183         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 184         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 185         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 186         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 187         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 188         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 189         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 190         case PIPE_CAP_TGSI_TXQS:
 191         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 192         case PIPE_CAP_SHAREABLE_SHADERS:
 193         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 194         case PIPE_CAP_CLEAR_TEXTURE:
 195         case PIPE_CAP_DRAW_PARAMETERS:
 196         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 197         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 198         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 199         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 200         case PIPE_CAP_INVALIDATE_BUFFER:
 201         case PIPE_CAP_GENERATE_MIPMAP:
 202         case PIPE_CAP_STRING_MARKER:
 203         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 204         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 205         case PIPE_CAP_QUERY_MEMORY_INFO:
 206                 return 0;
 207
 208                 /* Stream output. */
 209         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 210         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 211         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 212         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 213                 return 0;
 214
 215                 /* Geometry shader output, unsupported. */
 216         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 217         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 218                 return 0;
 219
 220                 /* Texturing. */
 221         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 222         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 223                 return VC4_MAX_MIP_LEVELS;
 224         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 225                 /* Note: Not supported in hardware, just faking it. */
 226                 return 5;
 227         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 228                 return 0;
 229
 230                 /* Render targets. */
 231         case PIPE_CAP_MAX_RENDER_TARGETS:
 232                 return 1;
 233
 234                 /* Queries. */
 235         case PIPE_CAP_QUERY_TIME_ELAPSED:
 236         case PIPE_CAP_QUERY_TIMESTAMP:
 237                 return 0;
 238
 239         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 240         case PIPE_CAP_MIN_TEXEL_OFFSET:
 241                 return 0;
 242
 243         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 244                 return 2048;
 245
 246         case PIPE_CAP_ENDIANNESS:
 247                 return PIPE_ENDIAN_LITTLE;
 248
 249         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 250                 return 64;
 251
 252         case PIPE_CAP_VENDOR_ID:
 253                 return 0x14E4;
 254         case PIPE_CAP_DEVICE_ID:
 255                 return 0xFFFFFFFF;
 256         case PIPE_CAP_ACCELERATED:
 257                 return 1;
 258         case PIPE_CAP_VIDEO_MEMORY: {
 259                 uint64_t system_memory;
 260
 261                 if (!os_get_total_physical_memory(&system_memory))
 262                         return 0;
 263
 264                 return (int)(system_memory >> 20);
 265         }
 266         case PIPE_CAP_UMA:
 267                 return 1;
 268
 269         default:
 270                 fprintf(stderr, "unknown param %d\n", param);
 271                 return 0;
 272         }
 273 }
 274
 275 static float
 276 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 277 {
 278         switch (param) {
 279         case PIPE_CAPF_MAX_LINE_WIDTH:
 280         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 281                 return 32;
 282
 283         case PIPE_CAPF_MAX_POINT_WIDTH:
 284         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 285                 return 512.0f;
 286
 287         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 288                 return 0.0f;
 289         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 290                 return 0.0f;
 291         case PIPE_CAPF_GUARD_BAND_LEFT:
 292         case PIPE_CAPF_GUARD_BAND_TOP:
 293         case PIPE_CAPF_GUARD_BAND_RIGHT:
 294         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 295                 return 0.0f;
 296         default:
 297                 fprintf(stderr, "unknown paramf %d\n", param);
 298                 return 0;
 299         }
 300 }
 301
 302 static int
 303 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 304                            enum pipe_shader_cap param)
 305 {
 306         if (shader != PIPE_SHADER_VERTEX &&
 307             shader != PIPE_SHADER_FRAGMENT) {
 308                 return 0;
 309         }
 310
 311         /* this is probably not totally correct.. but it's a start: */
 312         switch (param) {
 313         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 314         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 315         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 316         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 317                 return 16384;
 318         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 319                 return 0;
 320         case PIPE_SHADER_CAP_MAX_INPUTS:
 321                 if (shader == PIPE_SHADER_FRAGMENT)
 322                         return 8;
 323                 else
 324                         return 16;
 325         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 326                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 327         case PIPE_SHADER_CAP_MAX_TEMPS:
 328                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 329         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 330                 return 16 * 1024 * sizeof(float);
 331         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 332                 return 1;
 333         case PIPE_SHADER_CAP_MAX_PREDS:
 334                 return 0; /* nothing uses this */
 335         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 336                 return 0;
 337         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 338         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 339         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 340                 return 0;
 341         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 342                 return 1;
 343         case PIPE_SHADER_CAP_SUBROUTINES:
 344                 return 0;
 345         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 346                 return 0;
 347         case PIPE_SHADER_CAP_INTEGERS:
 348                 return 1;
 349         case PIPE_SHADER_CAP_DOUBLES:
 350         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 351         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 352         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 353         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 354                 return 0;
 355         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 356         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 357                 return VC4_MAX_TEXTURE_SAMPLERS;
 358         case PIPE_SHADER_CAP_PREFERRED_IR:
 359                 return PIPE_SHADER_IR_TGSI;
 360         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 361                 return 0;
 362         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 363                 return 32;
 364         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 365         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 366                 return 0;
 367         default:
 368                 fprintf(stderr, "unknown shader param %d\n", param);
 369                 return 0;
 370         }
 371         return 0;
 372 }
 373
 374 static boolean
 375 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
 376                                enum pipe_format format,
 377                                enum pipe_texture_target target,
 378                                unsigned sample_count,
 379                                unsigned usage)
 380 {
 381         unsigned retval = 0;
 382
 383         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 384             !util_format_is_supported(format, usage)) {
 385                 return FALSE;
 386         }
 387
 388         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 389                 switch (format) {
 390                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 391                 case PIPE_FORMAT_R32G32B32_FLOAT:
 392                 case PIPE_FORMAT_R32G32_FLOAT:
 393                 case PIPE_FORMAT_R32_FLOAT:
 394                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 395                 case PIPE_FORMAT_R32G32B32_SNORM:
 396                 case PIPE_FORMAT_R32G32_SNORM:
 397                 case PIPE_FORMAT_R32_SNORM:
 398                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 399                 case PIPE_FORMAT_R32G32B32_SSCALED:
 400                 case PIPE_FORMAT_R32G32_SSCALED:
 401                 case PIPE_FORMAT_R32_SSCALED:
 402                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 403                 case PIPE_FORMAT_R16G16B16_UNORM:
 404                 case PIPE_FORMAT_R16G16_UNORM:
 405                 case PIPE_FORMAT_R16_UNORM:
 406                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 407                 case PIPE_FORMAT_R16G16B16_SNORM:
 408                 case PIPE_FORMAT_R16G16_SNORM:
 409                 case PIPE_FORMAT_R16_SNORM:
 410                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 411                 case PIPE_FORMAT_R16G16B16_USCALED:
 412                 case PIPE_FORMAT_R16G16_USCALED:
 413                 case PIPE_FORMAT_R16_USCALED:
 414                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 415                 case PIPE_FORMAT_R16G16B16_SSCALED:
 416                 case PIPE_FORMAT_R16G16_SSCALED:
 417                 case PIPE_FORMAT_R16_SSCALED:
 418                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 419                 case PIPE_FORMAT_R8G8B8_UNORM:
 420                 case PIPE_FORMAT_R8G8_UNORM:
 421                 case PIPE_FORMAT_R8_UNORM:
 422                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 423                 case PIPE_FORMAT_R8G8B8_SNORM:
 424                 case PIPE_FORMAT_R8G8_SNORM:
 425                 case PIPE_FORMAT_R8_SNORM:
 426                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 427                 case PIPE_FORMAT_R8G8B8_USCALED:
 428                 case PIPE_FORMAT_R8G8_USCALED:
 429                 case PIPE_FORMAT_R8_USCALED:
 430                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 431                 case PIPE_FORMAT_R8G8B8_SSCALED:
 432                 case PIPE_FORMAT_R8G8_SSCALED:
 433                 case PIPE_FORMAT_R8_SSCALED:
 434                         retval |= PIPE_BIND_VERTEX_BUFFER;
 435                         break;
 436                 default:
 437                         break;
 438                 }
 439         }
 440
 441         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 442             (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
 443             vc4_rt_format_supported(format)) {
 444                 retval |= PIPE_BIND_RENDER_TARGET;
 445         }
 446
 447         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 448             (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
 449             (vc4_tex_format_supported(format))) {
 450                 retval |= PIPE_BIND_SAMPLER_VIEW;
 451         }
 452
 453         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 454             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 455              format == PIPE_FORMAT_X8Z24_UNORM)) {
 456                 retval |= PIPE_BIND_DEPTH_STENCIL;
 457         }
 458
 459         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 460             (format == PIPE_FORMAT_I8_UINT ||
 461              format == PIPE_FORMAT_I16_UINT)) {
 462                 retval |= PIPE_BIND_INDEX_BUFFER;
 463         }
 464
 465         if (usage & PIPE_BIND_TRANSFER_READ)
 466                 retval |= PIPE_BIND_TRANSFER_READ;
 467         if (usage & PIPE_BIND_TRANSFER_WRITE)
 468                 retval |= PIPE_BIND_TRANSFER_WRITE;
 469
 470 #if 0
 471         if (retval != usage) {
 472                 fprintf(stderr,
 473                         "not supported: format=%s, target=%d, sample_count=%d, "
 474                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
 475                         target, sample_count, usage, retval);
 476         }
 477 #endif
 478
 479         return retval == usage;
 480 }
 481
 482 struct pipe_screen *
 483 vc4_screen_create(int fd)
 484 {
 485         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
 486         struct pipe_screen *pscreen;
 487
 488         pscreen = &screen->base;
 489
 490         pscreen->destroy = vc4_screen_destroy;
 491         pscreen->get_param = vc4_screen_get_param;
 492         pscreen->get_paramf = vc4_screen_get_paramf;
 493         pscreen->get_shader_param = vc4_screen_get_shader_param;
 494         pscreen->context_create = vc4_context_create;
 495         pscreen->is_format_supported = vc4_screen_is_format_supported;
 496
 497         screen->fd = fd;
 498         list_inithead(&screen->bo_cache.time_list);
 499
 500         vc4_fence_init(screen);
 501
 502         vc4_debug = debug_get_option_vc4_debug();
 503         if (vc4_debug & VC4_DEBUG_SHADERDB)
 504                 vc4_debug |= VC4_DEBUG_NORAST;
 505
 506 #if USE_VC4_SIMULATOR
 507         vc4_simulator_init(screen);
 508 #endif
 509
 510         vc4_resource_screen_init(pscreen);
 511
 512         pscreen->get_name = vc4_screen_get_name;
 513         pscreen->get_vendor = vc4_screen_get_vendor;
 514         pscreen->get_device_vendor = vc4_screen_get_vendor;
 515
 516         return pscreen;
 517 }
 518
 519 boolean
 520 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
 521                          struct vc4_bo *bo,
 522                          unsigned stride,
 523                          struct winsys_handle *whandle)
 524 {
 525         whandle->stride = stride;
 526
 527         /* If we're passing some reference to our BO out to some other part of
 528          * the system, then we can't do any optimizations about only us being
 529          * the ones seeing it (like BO caching or shadow update avoidance).
 530          */
 531         bo->private = false;
 532
 533         switch (whandle->type) {
 534         case DRM_API_HANDLE_TYPE_SHARED:
 535                 return vc4_bo_flink(bo, &whandle->handle);
 536         case DRM_API_HANDLE_TYPE_KMS:
 537                 whandle->handle = bo->handle;
 538                 return TRUE;
 539         case DRM_API_HANDLE_TYPE_FD:
 540                 whandle->handle = vc4_bo_get_dmabuf(bo);
 541                 return whandle->handle != -1;
 542         }
 543
 544         return FALSE;
 545 }
 546
 547 struct vc4_bo *
 548 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
 549                           struct winsys_handle *whandle)
 550 {
 551         struct vc4_screen *screen = vc4_screen(pscreen);
 552
 553         switch (whandle->type) {
 554         case DRM_API_HANDLE_TYPE_SHARED:
 555                 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
 556         case DRM_API_HANDLE_TYPE_FD:
 557                 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
 558         default:
 559                 fprintf(stderr,
 560                         "Attempt to import unsupported handle type %d\n",
 561                         whandle->type);
 562                 return NULL;
 563         }
 564 }