src/gallium/drivers/virgl/virgl_screen.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include "util/u_memory.h"
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_video.h"
  27 #include "util/u_math.h"
  28 #include "util/os_time.h"
  29 #include "pipe/p_defines.h"
  30 #include "pipe/p_screen.h"
  31
  32 #include "tgsi/tgsi_exec.h"
  33
  34 #include "virgl_screen.h"
  35 #include "virgl_resource.h"
  36 #include "virgl_public.h"
  37 #include "virgl_context.h"
  38
  39 static const char *
  40 virgl_get_vendor(struct pipe_screen *screen)
  41 {
  42    return "Red Hat";
  43 }
  44
  45
  46 static const char *
  47 virgl_get_name(struct pipe_screen *screen)
  48 {
  49    return "virgl";
  50 }
  51
  52 static int
  53 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
  54 {
  55    struct virgl_screen *vscreen = virgl_screen(screen);
  56    switch (param) {
  57    case PIPE_CAP_NPOT_TEXTURES:
  58       return 1;
  59    case PIPE_CAP_SM3:
  60       return 1;
  61    case PIPE_CAP_ANISOTROPIC_FILTER:
  62       return 1;
  63    case PIPE_CAP_POINT_SPRITE:
  64       return 1;
  65    case PIPE_CAP_MAX_RENDER_TARGETS:
  66       return vscreen->caps.caps.v1.max_render_targets;
  67    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
  68       return vscreen->caps.caps.v1.max_dual_source_render_targets;
  69    case PIPE_CAP_OCCLUSION_QUERY:
  70       return vscreen->caps.caps.v1.bset.occlusion_query;
  71    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  72       return vscreen->caps.caps.v1.bset.mirror_clamp;
  73    case PIPE_CAP_TEXTURE_SWIZZLE:
  74       return 1;
  75    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  76       if (vscreen->caps.caps.v2.max_texture_2d_size)
  77          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
  78       return 15; /* 16K x 16K */
  79    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  80       if (vscreen->caps.caps.v2.max_texture_3d_size)
  81          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
  82       return 9; /* 256 x 256 x 256 */
  83    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  84       if (vscreen->caps.caps.v2.max_texture_cube_size)
  85          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
  86       return 13; /* 4K x 4K */
  87    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  88       return 1;
  89    case PIPE_CAP_INDEP_BLEND_ENABLE:
  90       return vscreen->caps.caps.v1.bset.indep_blend_enable;
  91    case PIPE_CAP_INDEP_BLEND_FUNC:
  92       return vscreen->caps.caps.v1.bset.indep_blend_func;
  93    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
  94    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
  95    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
  96       return 1;
  97    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
  98       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
  99    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 100       return vscreen->caps.caps.v1.bset.depth_clip_disable;
 101    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 102       return vscreen->caps.caps.v1.max_streamout_buffers;
 103    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 104    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 105       return 16*4;
 106    case PIPE_CAP_PRIMITIVE_RESTART:
 107       return vscreen->caps.caps.v1.bset.primitive_restart;
 108    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 109       return vscreen->caps.caps.v1.bset.shader_stencil_export;
 110    case PIPE_CAP_TGSI_INSTANCEID:
 111    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 112       return 1;
 113    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 114       return vscreen->caps.caps.v1.bset.seamless_cube_map;
 115    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 116       return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
 117    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 118       return vscreen->caps.caps.v1.max_texture_array_layers;
 119    case PIPE_CAP_MIN_TEXEL_OFFSET:
 120       return vscreen->caps.caps.v2.min_texel_offset;
 121    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 122       return vscreen->caps.caps.v2.min_texture_gather_offset;
 123    case PIPE_CAP_MAX_TEXEL_OFFSET:
 124       return vscreen->caps.caps.v2.max_texel_offset;
 125    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 126       return vscreen->caps.caps.v2.max_texture_gather_offset;
 127    case PIPE_CAP_CONDITIONAL_RENDER:
 128       return vscreen->caps.caps.v1.bset.conditional_render;
 129    case PIPE_CAP_TEXTURE_BARRIER:
 130       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
 131    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 132       return 1;
 133    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 134    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 135       return vscreen->caps.caps.v1.bset.color_clamping;
 136    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 137       return 1;
 138    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 139       return vscreen->caps.caps.v1.glsl_level;
 140    case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 141       return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
 142    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 143       return 0;
 144    case PIPE_CAP_COMPUTE:
 145       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
 146    case PIPE_CAP_USER_VERTEX_BUFFERS:
 147       return 0;
 148    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 149       return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
 150    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 151    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 152       return vscreen->caps.caps.v1.bset.streamout_pause_resume;
 153    case PIPE_CAP_START_INSTANCE:
 154       return vscreen->caps.caps.v1.bset.start_instance;
 155    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 156    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 157    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 158    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 159    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 160       return 0;
 161    case PIPE_CAP_QUERY_TIMESTAMP:
 162       return 1;
 163    case PIPE_CAP_QUERY_TIME_ELAPSED:
 164       return 0;
 165    case PIPE_CAP_TGSI_TEXCOORD:
 166       return 0;
 167    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 168       return VIRGL_MAP_BUFFER_ALIGNMENT;
 169    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 170       return vscreen->caps.caps.v1.max_tbo_size > 0;
 171    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 172       return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
 173    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 174       return 0;
 175    case PIPE_CAP_CUBE_MAP_ARRAY:
 176       return vscreen->caps.caps.v1.bset.cube_map_array;
 177    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 178       return vscreen->caps.caps.v1.bset.texture_multisample;
 179    case PIPE_CAP_MAX_VIEWPORTS:
 180       return vscreen->caps.caps.v1.max_viewports;
 181    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 182       return vscreen->caps.caps.v1.max_tbo_size;
 183    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 184    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 185    case PIPE_CAP_ENDIANNESS:
 186       return 0;
 187    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 188    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 189       return 1;
 190    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 191       return 0;
 192    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 193       return vscreen->caps.caps.v2.max_geom_output_vertices;
 194    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 195       return vscreen->caps.caps.v2.max_geom_total_output_components;
 196    case PIPE_CAP_TEXTURE_QUERY_LOD:
 197       return vscreen->caps.caps.v1.bset.texture_query_lod;
 198    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 199       return vscreen->caps.caps.v1.max_texture_gather_components;
 200    case PIPE_CAP_DRAW_INDIRECT:
 201       return vscreen->caps.caps.v1.bset.has_indirect_draw;
 202    case PIPE_CAP_SAMPLE_SHADING:
 203    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 204       return vscreen->caps.caps.v1.bset.has_sample_shading;
 205    case PIPE_CAP_CULL_DISTANCE:
 206       return vscreen->caps.caps.v1.bset.has_cull;
 207    case PIPE_CAP_MAX_VERTEX_STREAMS:
 208       return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
 209    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 210       return vscreen->caps.caps.v1.bset.conditional_render_inverted;
 211    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 212       return vscreen->caps.caps.v1.bset.derivative_control;
 213    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 214       return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
 215    case PIPE_CAP_QUERY_SO_OVERFLOW:
 216       return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
 217    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 218       return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
 219    case PIPE_CAP_DOUBLES:
 220       return vscreen->caps.caps.v1.bset.has_fp64;
 221    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 222       return vscreen->caps.caps.v2.max_shader_patch_varyings;
 223    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 224       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
 225    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 226       return vscreen->caps.caps.v2.max_vertex_attrib_stride;
 227    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 228       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
 229    case PIPE_CAP_TGSI_TXQS:
 230       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
 231    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 232       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
 233    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 234       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
 235    case PIPE_CAP_TGSI_FS_FBFETCH:
 236       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
 237    case PIPE_CAP_TGSI_CLOCK:
 238       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
 239    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 240       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
 241    case PIPE_CAP_TEXTURE_GATHER_SM5:
 242    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 243    case PIPE_CAP_FAKE_SW_MSAA:
 244    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 245    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 246    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 247    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 248    case PIPE_CAP_CLIP_HALFZ:
 249    case PIPE_CAP_VERTEXID_NOBASE:
 250    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 251    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 252    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 253    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 254    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 255    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 256    case PIPE_CAP_SHAREABLE_SHADERS:
 257    case PIPE_CAP_CLEAR_TEXTURE:
 258    case PIPE_CAP_DRAW_PARAMETERS:
 259    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 260    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 261    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 262    case PIPE_CAP_INVALIDATE_BUFFER:
 263    case PIPE_CAP_GENERATE_MIPMAP:
 264    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 265    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 266    case PIPE_CAP_STRING_MARKER:
 267    case PIPE_CAP_QUERY_MEMORY_INFO:
 268    case PIPE_CAP_PCI_GROUP:
 269    case PIPE_CAP_PCI_BUS:
 270    case PIPE_CAP_PCI_DEVICE:
 271    case PIPE_CAP_PCI_FUNCTION:
 272    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 273    case PIPE_CAP_TGSI_VOTE:
 274    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 275    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 276    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 277    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 278    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 279    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 280    case PIPE_CAP_INT64:
 281    case PIPE_CAP_INT64_DIVMOD:
 282    case PIPE_CAP_TGSI_TEX_TXF_LZ:
 283    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 284    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 285    case PIPE_CAP_TGSI_BALLOT:
 286    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 287    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 288    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 289    case PIPE_CAP_POST_DEPTH_COVERAGE:
 290    case PIPE_CAP_BINDLESS_TEXTURE:
 291    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 292    case PIPE_CAP_MEMOBJ:
 293    case PIPE_CAP_LOAD_CONSTBUF:
 294    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 295    case PIPE_CAP_TILE_RASTER_ORDER:
 296    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 297    case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 298    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 299    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 300    case PIPE_CAP_FENCE_SIGNAL:
 301    case PIPE_CAP_CONSTBUF0_FLAGS:
 302    case PIPE_CAP_PACKED_UNIFORMS:
 303    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 304    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 305    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 306    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 307    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 308    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 309    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 310       return 0;
 311    case PIPE_CAP_VENDOR_ID:
 312       return 0x1af4;
 313    case PIPE_CAP_DEVICE_ID:
 314       return 0x1010;
 315    case PIPE_CAP_ACCELERATED:
 316       return 1;
 317    case PIPE_CAP_UMA:
 318    case PIPE_CAP_VIDEO_MEMORY:
 319       return 0;
 320    case PIPE_CAP_NATIVE_FENCE_FD:
 321       return 0;
 322    }
 323    /* should only get here on unhandled cases */
 324    debug_printf("Unexpected PIPE_CAP %d query\n", param);
 325    return 0;
 326 }
 327
 328 static int
 329 virgl_get_shader_param(struct pipe_screen *screen,
 330                        enum pipe_shader_type shader,
 331                        enum pipe_shader_cap param)
 332 {
 333    struct virgl_screen *vscreen = virgl_screen(screen);
 334
 335    if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
 336        !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
 337       return 0;
 338
 339    if (shader == PIPE_SHADER_COMPUTE &&
 340        !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 341      return 0;
 342
 343    switch(shader)
 344    {
 345    case PIPE_SHADER_FRAGMENT:
 346    case PIPE_SHADER_VERTEX:
 347    case PIPE_SHADER_GEOMETRY:
 348    case PIPE_SHADER_TESS_CTRL:
 349    case PIPE_SHADER_TESS_EVAL:
 350    case PIPE_SHADER_COMPUTE:
 351       switch (param) {
 352       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 353       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 354       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 355       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 356          return INT_MAX;
 357       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 358       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 359       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 360          return 1;
 361       case PIPE_SHADER_CAP_MAX_INPUTS:
 362          if (vscreen->caps.caps.v1.glsl_level < 150)
 363             return vscreen->caps.caps.v2.max_vertex_attribs;
 364          return (shader == PIPE_SHADER_VERTEX ||
 365                  shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
 366       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 367          if (shader == PIPE_SHADER_FRAGMENT)
 368             return vscreen->caps.caps.v1.max_render_targets;
 369          return vscreen->caps.caps.v2.max_vertex_outputs;
 370      // case PIPE_SHADER_CAP_MAX_CONSTS:
 371      //    return 4096;
 372       case PIPE_SHADER_CAP_MAX_TEMPS:
 373          return 256;
 374       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 375          return vscreen->caps.caps.v1.max_uniform_blocks;
 376     //  case PIPE_SHADER_CAP_MAX_ADDRS:
 377      //    return 1;
 378       case PIPE_SHADER_CAP_SUBROUTINES:
 379          return 1;
 380       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 381             return 16;
 382       case PIPE_SHADER_CAP_INTEGERS:
 383          return vscreen->caps.caps.v1.glsl_level >= 130;
 384       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 385          return 32;
 386       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 387          return 4096 * sizeof(float[4]);
 388       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 389          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 390             return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
 391          else
 392             return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
 393       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 394          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 395             return vscreen->caps.caps.v2.max_shader_image_frag_compute;
 396          else
 397             return vscreen->caps.caps.v2.max_shader_image_other_stages;
 398       case PIPE_SHADER_CAP_SUPPORTED_IRS:
 399          return (1 << PIPE_SHADER_IR_TGSI);
 400       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 401       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 402       case PIPE_SHADER_CAP_INT64_ATOMICS:
 403       case PIPE_SHADER_CAP_FP16:
 404       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 405       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 406          return 0;
 407       case PIPE_SHADER_CAP_SCALAR_ISA:
 408          return 1;
 409       default:
 410          return 0;
 411       }
 412    default:
 413       return 0;
 414    }
 415 }
 416
 417 static float
 418 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 419 {
 420    struct virgl_screen *vscreen = virgl_screen(screen);
 421    switch (param) {
 422    case PIPE_CAPF_MAX_LINE_WIDTH:
 423       return vscreen->caps.caps.v2.max_aliased_line_width;
 424    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 425       return vscreen->caps.caps.v2.max_smooth_line_width;
 426    case PIPE_CAPF_MAX_POINT_WIDTH:
 427       return vscreen->caps.caps.v2.max_aliased_point_size;
 428    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 429       return vscreen->caps.caps.v2.max_smooth_point_size;
 430    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 431       return 16.0;
 432    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 433       return vscreen->caps.caps.v2.max_texture_lod_bias;
 434    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 435    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 436    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 437       return 0.0f;
 438    }
 439    /* should only get here on unhandled cases */
 440    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 441    return 0.0;
 442 }
 443
 444 static int
 445 virgl_get_compute_param(struct pipe_screen *screen,
 446                         enum pipe_shader_ir ir_type,
 447                         enum pipe_compute_cap param,
 448                         void *ret)
 449 {
 450    struct virgl_screen *vscreen = virgl_screen(screen);
 451    if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 452       return 0;
 453    switch (param) {
 454    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 455       if (ret) {
 456          uint64_t *grid_size = ret;
 457          grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
 458          grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
 459          grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
 460       }
 461       return 3 * sizeof(uint64_t) ;
 462    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 463       if (ret) {
 464          uint64_t *block_size = ret;
 465          block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
 466          block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
 467          block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
 468       }
 469       return 3 * sizeof(uint64_t);
 470    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 471       if (ret) {
 472          uint64_t *max_threads_per_block = ret;
 473          *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
 474       }
 475       return sizeof(uint64_t);
 476    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 477       if (ret) {
 478          uint64_t *max_local_size = ret;
 479          /* Value reported by the closed source driver. */
 480          *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
 481       }
 482       return sizeof(uint64_t);
 483    default:
 484       break;
 485    }
 486    return 0;
 487 }
 488
 489 static boolean
 490 virgl_is_vertex_format_supported(struct pipe_screen *screen,
 491                                  enum pipe_format format)
 492 {
 493    struct virgl_screen *vscreen = virgl_screen(screen);
 494    const struct util_format_description *format_desc;
 495    int i;
 496
 497    format_desc = util_format_description(format);
 498    if (!format_desc)
 499       return FALSE;
 500
 501    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 502       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
 503       int big = vformat / 32;
 504       int small = vformat % 32;
 505       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
 506          return FALSE;
 507       return TRUE;
 508    }
 509
 510    /* Find the first non-VOID channel. */
 511    for (i = 0; i < 4; i++) {
 512       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 513          break;
 514       }
 515    }
 516
 517    if (i == 4)
 518       return FALSE;
 519
 520    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 521       return FALSE;
 522
 523    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
 524       return FALSE;
 525    return TRUE;
 526 }
 527
 528 /**
 529  * Query format support for creating a texture, drawing surface, etc.
 530  * \param format  the format to test
 531  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 532  */
 533 static boolean
 534 virgl_is_format_supported( struct pipe_screen *screen,
 535                                  enum pipe_format format,
 536                                  enum pipe_texture_target target,
 537                                  unsigned sample_count,
 538                                  unsigned storage_sample_count,
 539                                  unsigned bind)
 540 {
 541    struct virgl_screen *vscreen = virgl_screen(screen);
 542    const struct util_format_description *format_desc;
 543    int i;
 544
 545    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 546       return false;
 547
 548    assert(target == PIPE_BUFFER ||
 549           target == PIPE_TEXTURE_1D ||
 550           target == PIPE_TEXTURE_1D_ARRAY ||
 551           target == PIPE_TEXTURE_2D ||
 552           target == PIPE_TEXTURE_2D_ARRAY ||
 553           target == PIPE_TEXTURE_RECT ||
 554           target == PIPE_TEXTURE_3D ||
 555           target == PIPE_TEXTURE_CUBE ||
 556           target == PIPE_TEXTURE_CUBE_ARRAY);
 557
 558    format_desc = util_format_description(format);
 559    if (!format_desc)
 560       return FALSE;
 561
 562    if (util_format_is_intensity(format))
 563       return FALSE;
 564
 565    if (sample_count > 1) {
 566       if (!vscreen->caps.caps.v1.bset.texture_multisample)
 567          return FALSE;
 568
 569       if (bind & PIPE_BIND_SHADER_IMAGE) {
 570          if (sample_count > vscreen->caps.caps.v2.max_image_samples)
 571             return FALSE;
 572       }
 573
 574       if (sample_count > vscreen->caps.caps.v1.max_samples)
 575          return FALSE;
 576    }
 577
 578    if (bind & PIPE_BIND_VERTEX_BUFFER) {
 579       return virgl_is_vertex_format_supported(screen, format);
 580    }
 581
 582    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
 583    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
 584        format == PIPE_FORMAT_R32G32B32_SINT ||
 585        format == PIPE_FORMAT_R32G32B32_UINT) &&
 586        target != PIPE_BUFFER)
 587       return FALSE;
 588
 589    if (bind & PIPE_BIND_RENDER_TARGET) {
 590       /* For ARB_framebuffer_no_attachments. */
 591       if (format == PIPE_FORMAT_NONE)
 592          return TRUE;
 593
 594       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 595          return FALSE;
 596
 597       /*
 598        * Although possible, it is unnatural to render into compressed or YUV
 599        * surfaces. So disable these here to avoid going into weird paths
 600        * inside the state trackers.
 601        */
 602       if (format_desc->block.width != 1 ||
 603           format_desc->block.height != 1)
 604          return FALSE;
 605
 606       {
 607          int big = format / 32;
 608          int small = format % 32;
 609          if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
 610             return FALSE;
 611       }
 612    }
 613
 614    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 615       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 616          return FALSE;
 617    }
 618
 619    /*
 620     * All other operations (sampling, transfer, etc).
 621     */
 622
 623    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 624       goto out_lookup;
 625    }
 626    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
 627       goto out_lookup;
 628    }
 629    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
 630       goto out_lookup;
 631    }
 632
 633    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 634       goto out_lookup;
 635    } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
 636       goto out_lookup;
 637    }
 638
 639    /* Find the first non-VOID channel. */
 640    for (i = 0; i < 4; i++) {
 641       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 642          break;
 643       }
 644    }
 645
 646    if (i == 4)
 647       return FALSE;
 648
 649    /* no L4A4 */
 650    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
 651       return FALSE;
 652
 653  out_lookup:
 654    {
 655       int big = format / 32;
 656       int small = format % 32;
 657       if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
 658          return FALSE;
 659    }
 660    /*
 661     * Everything else should be supported by u_format.
 662     */
 663    return TRUE;
 664 }
 665
 666 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
 667                                       struct pipe_resource *res,
 668                                       unsigned level, unsigned layer,
 669                                     void *winsys_drawable_handle, struct pipe_box *sub_box)
 670 {
 671    struct virgl_screen *vscreen = virgl_screen(screen);
 672    struct virgl_winsys *vws = vscreen->vws;
 673    struct virgl_resource *vres = virgl_resource(res);
 674
 675    if (vws->flush_frontbuffer)
 676       vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
 677                              sub_box);
 678 }
 679
 680 static void virgl_fence_reference(struct pipe_screen *screen,
 681                                   struct pipe_fence_handle **ptr,
 682                                   struct pipe_fence_handle *fence)
 683 {
 684    struct virgl_screen *vscreen = virgl_screen(screen);
 685    struct virgl_winsys *vws = vscreen->vws;
 686
 687    vws->fence_reference(vws, ptr, fence);
 688 }
 689
 690 static boolean virgl_fence_finish(struct pipe_screen *screen,
 691                                   struct pipe_context *ctx,
 692                                   struct pipe_fence_handle *fence,
 693                                   uint64_t timeout)
 694 {
 695    struct virgl_screen *vscreen = virgl_screen(screen);
 696    struct virgl_winsys *vws = vscreen->vws;
 697
 698    return vws->fence_wait(vws, fence, timeout);
 699 }
 700
 701 static uint64_t
 702 virgl_get_timestamp(struct pipe_screen *_screen)
 703 {
 704    return os_time_get_nano();
 705 }
 706
 707 static void
 708 virgl_destroy_screen(struct pipe_screen *screen)
 709 {
 710    struct virgl_screen *vscreen = virgl_screen(screen);
 711    struct virgl_winsys *vws = vscreen->vws;
 712
 713    slab_destroy_parent(&vscreen->texture_transfer_pool);
 714
 715    if (vws)
 716       vws->destroy(vws);
 717    FREE(vscreen);
 718 }
 719
 720 struct pipe_screen *
 721 virgl_create_screen(struct virgl_winsys *vws)
 722 {
 723    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 724
 725    if (!screen)
 726       return NULL;
 727
 728    screen->vws = vws;
 729    screen->base.get_name = virgl_get_name;
 730    screen->base.get_vendor = virgl_get_vendor;
 731    screen->base.get_param = virgl_get_param;
 732    screen->base.get_shader_param = virgl_get_shader_param;
 733    screen->base.get_compute_param = virgl_get_compute_param;
 734    screen->base.get_paramf = virgl_get_paramf;
 735    screen->base.is_format_supported = virgl_is_format_supported;
 736    screen->base.destroy = virgl_destroy_screen;
 737    screen->base.context_create = virgl_context_create;
 738    screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
 739    screen->base.get_timestamp = virgl_get_timestamp;
 740    screen->base.fence_reference = virgl_fence_reference;
 741    //screen->base.fence_signalled = virgl_fence_signalled;
 742    screen->base.fence_finish = virgl_fence_finish;
 743
 744    virgl_init_screen_resource_functions(&screen->base);
 745
 746    vws->get_caps(vws, &screen->caps);
 747
 748    screen->refcnt = 1;
 749
 750    slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
 751
 752    return &screen->base;
 753 }