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3 * Copyright 2007 VMware, Inc.
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32 * Abstract graphics pipe state objects.
35 * 1. Want compact representations, so we use bitfields.
36 * 2. Put bitfields before other (GLfloat) fields.
43 #include "p_compiler.h"
44 #include "p_defines.h"
54 * Implementation limits
56 #define PIPE_MAX_ATTRIBS 32
57 #define PIPE_MAX_CLIP_PLANES 8
58 #define PIPE_MAX_COLOR_BUFS 8
59 #define PIPE_MAX_CONSTANT_BUFFERS 32
60 #define PIPE_MAX_SAMPLERS 32
61 #define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
62 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
63 #define PIPE_MAX_SHADER_SAMPLER_VIEWS 32
64 #define PIPE_MAX_SHADER_BUFFERS 32
65 #define PIPE_MAX_SHADER_IMAGES 32
66 #define PIPE_MAX_TEXTURE_LEVELS 16
67 #define PIPE_MAX_SO_BUFFERS 4
68 #define PIPE_MAX_SO_OUTPUTS 64
69 #define PIPE_MAX_VIEWPORTS 16
70 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
71 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
76 int32_t count; /* atomic */
82 * Primitive (point/line/tri) rasterization info
84 struct pipe_rasterizer_state
87 unsigned light_twoside:1;
88 unsigned clamp_vertex_color:1;
89 unsigned clamp_fragment_color:1;
91 unsigned cull_face:2; /**< PIPE_FACE_x */
92 unsigned fill_front:2; /**< PIPE_POLYGON_MODE_x */
93 unsigned fill_back:2; /**< PIPE_POLYGON_MODE_x */
94 unsigned offset_point:1;
95 unsigned offset_line:1;
96 unsigned offset_tri:1;
98 unsigned poly_smooth:1;
99 unsigned poly_stipple_enable:1;
100 unsigned point_smooth:1;
101 unsigned sprite_coord_mode:1; /**< PIPE_SPRITE_COORD_ */
102 unsigned point_quad_rasterization:1; /** points rasterized as quads or points */
103 unsigned point_tri_clip:1; /** large points clipped as tris or points */
104 unsigned point_size_per_vertex:1; /**< size computed in vertex shader */
105 unsigned multisample:1; /* XXX maybe more ms state in future */
106 unsigned force_persample_interp:1;
107 unsigned line_smooth:1;
108 unsigned line_stipple_enable:1;
109 unsigned line_last_pixel:1;
112 * Use the first vertex of a primitive as the provoking vertex for
115 unsigned flatshade_first:1;
117 unsigned half_pixel_center:1;
118 unsigned bottom_edge_rule:1;
121 * When true, rasterization is disabled and no pixels are written.
122 * This only makes sense with the Stream Out functionality.
124 unsigned rasterizer_discard:1;
127 * When false, depth clipping is disabled and the depth value will be
128 * clamped later at the per-pixel level before depth testing.
129 * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
131 unsigned depth_clip:1;
134 * When true clip space in the z axis goes from [0..1] (D3D). When false
137 * NOTE: D3D will always use depth clamping.
139 unsigned clip_halfz:1;
142 * Enable bits for clipping half-spaces.
143 * This applies to both user clip planes and shader clip distances.
144 * Note that if the bound shader exports any clip distances, these
145 * replace all user clip planes, and clip half-spaces enabled here
146 * but not written by the shader count as disabled.
148 unsigned clip_plane_enable:PIPE_MAX_CLIP_PLANES;
150 unsigned line_stipple_factor:8; /**< [1..256] actually */
151 unsigned line_stipple_pattern:16;
153 uint32_t sprite_coord_enable; /* referring to 32 TEXCOORD/GENERIC inputs */
156 float point_size; /**< used when no per-vertex size */
163 struct pipe_poly_stipple
165 unsigned stipple[32];
169 struct pipe_viewport_state
176 struct pipe_scissor_state
185 struct pipe_clip_state
187 float ucp[PIPE_MAX_CLIP_PLANES][4];
192 * Stream output for vertex transform feedback.
194 struct pipe_stream_output_info
196 unsigned num_outputs;
197 /** stride for an entire vertex for each buffer in dwords */
198 unsigned stride[PIPE_MAX_SO_BUFFERS];
201 * Array of stream outputs, in the order they are to be written in.
202 * Selected components are tightly packed into the output buffer.
205 unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */
206 unsigned start_component:2; /** 0 to 3 */
207 unsigned num_components:3; /** 1 to 4 */
208 unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
209 unsigned dst_offset:16; /**< offset into the buffer in dwords */
210 unsigned stream:2; /**< 0 to 3 */
211 } output[PIPE_MAX_SO_OUTPUTS];
215 * The 'type' parameter identifies whether the shader state contains TGSI
216 * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
217 * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
218 * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
219 * requests a different 'pipe_shader_ir' type, then it must check the 'type'
220 * enum to see if it is getting TGSI tokens or its preferred IR.
222 * TODO pipe_compute_state should probably get similar treatment to handle
223 * multiple IR's in a cleaner way..
225 * NOTE: since it is expected that the consumer will want to perform
226 * additional passes on the nir_shader, the driver takes ownership of
227 * the nir_shader. If state trackers need to hang on to the IR (for
228 * example, variant management), it should use nir_shader_clone().
230 struct pipe_shader_state
232 enum pipe_shader_ir type;
233 /* TODO move tokens into union. */
234 const struct tgsi_token *tokens;
240 struct pipe_stream_output_info stream_output;
244 pipe_shader_state_from_tgsi(struct pipe_shader_state *state,
245 const struct tgsi_token *tokens)
247 state->type = PIPE_SHADER_IR_TGSI;
248 state->tokens = tokens;
249 memset(&state->stream_output, 0, sizeof(state->stream_output));
252 struct pipe_depth_state
254 unsigned enabled:1; /**< depth test enabled? */
255 unsigned writemask:1; /**< allow depth buffer writes? */
256 unsigned func:3; /**< depth test func (PIPE_FUNC_x) */
257 unsigned bounds_test:1; /**< depth bounds test enabled? */
258 float bounds_min; /**< minimum depth bound */
259 float bounds_max; /**< maximum depth bound */
263 struct pipe_stencil_state
265 unsigned enabled:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
266 unsigned func:3; /**< PIPE_FUNC_x */
267 unsigned fail_op:3; /**< PIPE_STENCIL_OP_x */
268 unsigned zpass_op:3; /**< PIPE_STENCIL_OP_x */
269 unsigned zfail_op:3; /**< PIPE_STENCIL_OP_x */
270 unsigned valuemask:8;
271 unsigned writemask:8;
275 struct pipe_alpha_state
278 unsigned func:3; /**< PIPE_FUNC_x */
279 float ref_value; /**< reference value */
283 struct pipe_depth_stencil_alpha_state
285 struct pipe_depth_state depth;
286 struct pipe_stencil_state stencil[2]; /**< [0] = front, [1] = back */
287 struct pipe_alpha_state alpha;
291 struct pipe_rt_blend_state
293 unsigned blend_enable:1;
295 unsigned rgb_func:3; /**< PIPE_BLEND_x */
296 unsigned rgb_src_factor:5; /**< PIPE_BLENDFACTOR_x */
297 unsigned rgb_dst_factor:5; /**< PIPE_BLENDFACTOR_x */
299 unsigned alpha_func:3; /**< PIPE_BLEND_x */
300 unsigned alpha_src_factor:5; /**< PIPE_BLENDFACTOR_x */
301 unsigned alpha_dst_factor:5; /**< PIPE_BLENDFACTOR_x */
303 unsigned colormask:4; /**< bitmask of PIPE_MASK_R/G/B/A */
307 struct pipe_blend_state
309 unsigned independent_blend_enable:1;
310 unsigned logicop_enable:1;
311 unsigned logicop_func:4; /**< PIPE_LOGICOP_x */
313 unsigned alpha_to_coverage:1;
314 unsigned alpha_to_one:1;
315 struct pipe_rt_blend_state rt[PIPE_MAX_COLOR_BUFS];
319 struct pipe_blend_color
322 * Making the color array explicitly 16-byte aligned provides a hint to
323 * compilers to make more efficient auto-vectorization optimizations.
324 * The actual performance gains from vectorizing the blend color array are
325 * fairly minimal, if any, but the alignment is necessary to work around
326 * buggy vectorization in some compilers which fail to generate the correct
327 * unaligned accessors resulting in a segfault. Specifically several
328 * versions of the Intel compiler are known to be affected but it's likely
329 * others are as well.
331 PIPE_ALIGN_VAR(16) float color[4];
335 struct pipe_stencil_ref
342 * Note that pipe_surfaces are "texture views for rendering"
343 * and so in the case of ARB_framebuffer_no_attachment there
344 * is no pipe_surface state available such that we may
345 * extract the number of samples and layers.
347 struct pipe_framebuffer_state
349 unsigned width, height;
350 unsigned samples; /**< Number of samples in a no-attachment framebuffer */
351 unsigned layers; /**< Number of layers in a no-attachment framebuffer */
353 /** multiple color buffers for multiple render targets */
355 struct pipe_surface *cbufs[PIPE_MAX_COLOR_BUFS];
357 struct pipe_surface *zsbuf; /**< Z/stencil buffer */
362 * Texture sampler state.
364 struct pipe_sampler_state
366 unsigned wrap_s:3; /**< PIPE_TEX_WRAP_x */
367 unsigned wrap_t:3; /**< PIPE_TEX_WRAP_x */
368 unsigned wrap_r:3; /**< PIPE_TEX_WRAP_x */
369 unsigned min_img_filter:2; /**< PIPE_TEX_FILTER_x */
370 unsigned min_mip_filter:2; /**< PIPE_TEX_MIPFILTER_x */
371 unsigned mag_img_filter:2; /**< PIPE_TEX_FILTER_x */
372 unsigned compare_mode:1; /**< PIPE_TEX_COMPARE_x */
373 unsigned compare_func:3; /**< PIPE_FUNC_x */
374 unsigned normalized_coords:1; /**< Are coords normalized to [0,1]? */
375 unsigned max_anisotropy:6;
376 unsigned seamless_cube_map:1;
377 float lod_bias; /**< LOD/lambda bias */
378 float min_lod, max_lod; /**< LOD clamp range, after bias */
379 union pipe_color_union border_color;
384 * A view into a texture that can be bound to a color render target /
385 * depth stencil attachment point.
389 struct pipe_reference reference;
390 struct pipe_resource *texture; /**< resource into which this is a view */
391 struct pipe_context *context; /**< context this surface belongs to */
392 enum pipe_format format;
394 /* XXX width/height should be removed */
395 unsigned width; /**< logical width in pixels */
396 unsigned height; /**< logical height in pixels */
398 unsigned writable:1; /**< writable shader resource */
403 unsigned first_layer:16;
404 unsigned last_layer:16;
407 unsigned first_element;
408 unsigned last_element;
415 * A view into a texture that can be bound to a shader stage.
417 struct pipe_sampler_view
419 struct pipe_reference reference;
420 enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
421 enum pipe_format format; /**< typed PIPE_FORMAT_x */
422 struct pipe_resource *texture; /**< texture into which this is a view */
423 struct pipe_context *context; /**< context this view belongs to */
426 unsigned first_layer:16; /**< first layer to use for array textures */
427 unsigned last_layer:16; /**< last layer to use for array textures */
428 unsigned first_level:8; /**< first mipmap level to use */
429 unsigned last_level:8; /**< last mipmap level to use */
432 unsigned first_element;
433 unsigned last_element;
436 unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */
437 unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
438 unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
439 unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
444 * A description of a buffer or texture image that can be bound to a shader
447 struct pipe_image_view
449 struct pipe_resource *resource; /**< resource into which this is a view */
450 enum pipe_format format; /**< typed PIPE_FORMAT_x */
451 unsigned access; /**< PIPE_IMAGE_ACCESS_x */
455 unsigned first_layer:16; /**< first layer to use for array textures */
456 unsigned last_layer:16; /**< last layer to use for array textures */
457 unsigned level:8; /**< mipmap level to use */
460 unsigned first_element;
461 unsigned last_element;
468 * Subregion of 1D/2D/3D image resource.
482 * A memory object/resource such as a vertex buffer or texture.
486 struct pipe_reference reference;
487 struct pipe_screen *screen; /**< screen that this texture belongs to */
488 enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
489 enum pipe_format format; /**< PIPE_FORMAT_x */
496 unsigned last_level:8; /**< Index of last mipmap level present/defined */
497 unsigned nr_samples:8; /**< for multisampled surfaces, nr of samples */
498 unsigned usage:8; /**< PIPE_USAGE_x (not a bitmask) */
500 unsigned bind; /**< bitmask of PIPE_BIND_x */
501 unsigned flags; /**< bitmask of PIPE_RESOURCE_FLAG_x */
506 * Transfer object. For data transfer to/from a resource.
510 struct pipe_resource *resource; /**< resource to transfer to/from */
511 unsigned level; /**< texture mipmap level */
512 enum pipe_transfer_usage usage;
513 struct pipe_box box; /**< region of the resource to access */
514 unsigned stride; /**< row stride in bytes */
515 unsigned layer_stride; /**< image/layer stride in bytes */
521 * A vertex buffer. Typically, all the vertex data/attributes for
522 * drawing something will be in one buffer. But it's also possible, for
523 * example, to put colors in one buffer and texcoords in another.
525 struct pipe_vertex_buffer
527 unsigned stride; /**< stride to same attrib in next vertex, in bytes */
528 unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
529 struct pipe_resource *buffer; /**< the actual buffer */
530 const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
535 * A constant buffer. A subrange of an existing buffer can be set
536 * as a constant buffer.
538 struct pipe_constant_buffer
540 struct pipe_resource *buffer; /**< the actual buffer */
541 unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
542 unsigned buffer_size; /**< how much data can be read in shader */
543 const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
548 * An untyped shader buffer supporting loads, stores, and atomics.
550 struct pipe_shader_buffer {
551 struct pipe_resource *buffer; /**< the actual buffer */
552 unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
553 unsigned buffer_size; /**< how much data can be read in shader */
558 * A stream output target. The structure specifies the range vertices can
561 * In addition to that, the structure should internally maintain the offset
562 * into the buffer, which should be incremented everytime something is written
563 * (appended) to it. The internal offset is buffer_offset + how many bytes
564 * have been written. The internal offset can be stored on the device
565 * and the CPU actually doesn't have to query it.
567 * Note that the buffer_size variable is actually specifying the available
568 * space in the buffer, not the size of the attached buffer.
569 * In other words in majority of cases buffer_size would simply be
570 * 'buffer->width0 - buffer_offset', so buffer_size refers to the size
571 * of the buffer left, after accounting for buffer offset, for stream output
574 * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have
575 * actually been written.
577 struct pipe_stream_output_target
579 struct pipe_reference reference;
580 struct pipe_resource *buffer; /**< the output buffer */
581 struct pipe_context *context; /**< context this SO target belongs to */
583 unsigned buffer_offset; /**< offset where data should be written, in bytes */
584 unsigned buffer_size; /**< how much data is allowed to be written */
589 * Information to describe a vertex attribute (position, color, etc)
591 struct pipe_vertex_element
593 /** Offset of this attribute, in bytes, from the start of the vertex */
596 /** Instance data rate divisor. 0 means this is per-vertex data,
597 * n means per-instance data used for n consecutive instances (n > 0).
599 unsigned instance_divisor;
601 /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
602 * this attribute live in?
604 unsigned vertex_buffer_index;
606 enum pipe_format src_format;
611 * An index buffer. When an index buffer is bound, all indices to vertices
612 * will be looked up in the buffer.
614 struct pipe_index_buffer
616 unsigned index_size; /**< size of an index, in bytes */
617 unsigned offset; /**< offset to start of data in buffer, in bytes */
618 struct pipe_resource *buffer; /**< the actual buffer */
619 const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
624 * Information to describe a draw_vbo call.
626 struct pipe_draw_info
628 boolean indexed; /**< use index buffer */
630 enum pipe_prim_type mode; /**< the mode of the primitive */
631 unsigned start; /**< the index of the first vertex */
632 unsigned count; /**< number of vertices */
634 unsigned start_instance; /**< first instance id */
635 unsigned instance_count; /**< number of instances */
637 unsigned drawid; /**< id of this draw in a multidraw */
639 unsigned vertices_per_patch; /**< the number of vertices per patch */
642 * For indexed drawing, these fields apply after index lookup.
644 int index_bias; /**< a bias to be added to each index */
645 unsigned min_index; /**< the min index */
646 unsigned max_index; /**< the max index */
649 * Primitive restart enable/index (only applies to indexed drawing)
651 boolean primitive_restart;
652 unsigned restart_index;
655 * Stream output target. If not NULL, it's used to provide the 'count'
656 * parameter based on the number vertices captured by the stream output
657 * stage. (or generally, based on the number of bytes captured)
659 * Only 'mode', 'start_instance', and 'instance_count' are taken into
660 * account, all the other variables from pipe_draw_info are ignored.
662 * 'start' is implicitly 0 and 'count' is set as discussed above.
663 * The draw command is non-indexed.
665 * Note that this only provides the count. The vertex buffers must
666 * be set via set_vertex_buffers manually.
668 struct pipe_stream_output_target *count_from_stream_output;
670 /* Indirect draw parameters resource: If not NULL, most values are taken
671 * from this buffer instead, which is laid out as follows:
673 * if indexed is TRUE:
676 * uint32_t instance_count;
678 * int32_t index_bias;
679 * uint32_t start_instance;
684 * uint32_t instance_count;
686 * uint32_t start_instance;
689 struct pipe_resource *indirect;
690 unsigned indirect_offset; /**< must be 4 byte aligned */
691 unsigned indirect_stride; /**< must be 4 byte aligned */
692 unsigned indirect_count; /**< number of indirect draws */
694 /* Indirect draw count resource: If not NULL, contains a 32-bit value which
695 * is to be used as the real indirect_count. In that case indirect_count
696 * becomes the maximum possible value.
698 struct pipe_resource *indirect_params;
699 unsigned indirect_params_offset; /**< must be 4 byte aligned */
704 * Information to describe a blit call.
706 struct pipe_blit_info
709 struct pipe_resource *resource;
711 struct pipe_box box; /**< negative width, height only legal for src */
712 /* For pipe_surface-like format casting: */
713 enum pipe_format format; /**< must be supported for sampling (src)
714 or rendering (dst), ZS is always supported */
717 unsigned mask; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */
718 unsigned filter; /**< PIPE_TEX_FILTER_* */
720 boolean scissor_enable;
721 struct pipe_scissor_state scissor;
723 boolean render_condition_enable; /**< whether the blit should honor the
724 current render condition */
725 boolean alpha_blend; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
729 * Information to describe a launch_grid call.
731 struct pipe_grid_info
734 * For drivers that use PIPE_SHADER_IR_LLVM as their prefered IR, this value
735 * will be the index of the kernel in the opencl.kernels metadata list.
740 * Will be used to initialize the INPUT resource, and it should point to a
741 * buffer of at least pipe_compute_state::req_input_mem bytes.
746 * Determine the layout of the working block (in thread units) to be used.
751 * Determine the layout of the grid (in block units) to be used.
755 /* Indirect compute parameters resource: If not NULL, block sizes are taken
756 * from this buffer instead, which is laid out as follows:
759 * uint32_t num_blocks_x;
760 * uint32_t num_blocks_y;
761 * uint32_t num_blocks_z;
764 struct pipe_resource *indirect;
765 unsigned indirect_offset; /**< must be 4 byte aligned */
769 * Structure used as a header for serialized LLVM programs.
771 struct pipe_llvm_program_header
773 uint32_t num_bytes; /**< Number of bytes in the LLVM bytecode program. */
776 struct pipe_compute_state
778 enum pipe_shader_ir ir_type; /**< IR type contained in prog. */
779 const void *prog; /**< Compute program to be executed. */
780 unsigned req_local_mem; /**< Required size of the LOCAL resource. */
781 unsigned req_private_mem; /**< Required size of the PRIVATE resource. */
782 unsigned req_input_mem; /**< Required size of the INPUT resource. */
786 * Structure that contains a callback for debug messages from the driver back
787 * to the state tracker.
789 struct pipe_debug_callback
792 * Callback for the driver to report debug/performance/etc information back
793 * to the state tracker.
795 * \param data user-supplied data pointer
796 * \param id message type identifier, if pointed value is 0, then a
798 * \param type PIPE_DEBUG_TYPE_*
799 * \param format printf-style format string
800 * \param args args for format string
802 void (*debug_message)(void *data,
804 enum pipe_debug_type type,
811 * Information about memory usage. All sizes are in kilobytes.
813 struct pipe_memory_info
815 unsigned total_device_memory; /**< size of device memory, e.g. VRAM */
816 unsigned avail_device_memory; /**< free device memory at the moment */
817 unsigned total_staging_memory; /**< size of staging memory, e.g. GART */
818 unsigned avail_staging_memory; /**< free staging memory at the moment */
819 unsigned device_memory_evicted; /**< size of memory evicted (monotonic counter) */
820 unsigned nr_device_memory_evictions; /**< # of evictions (monotonic counter) */