2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
26 * Zhao Yakui <yakui.zhao@intel.com>
36 #include "intel_batchbuffer.h"
37 #include "i965_defines.h"
38 #include "i965_structs.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
41 #include "i965_encoder_utils.h"
45 #include "intel_media.h"
48 #define log2f(x) (logf(x)/(float)M_LN2)
51 int intel_avc_enc_slice_type_fixup(int slice_type)
53 if (slice_type == SLICE_TYPE_SP ||
54 slice_type == SLICE_TYPE_P)
55 slice_type = SLICE_TYPE_P;
56 else if (slice_type == SLICE_TYPE_SI ||
57 slice_type == SLICE_TYPE_I)
58 slice_type = SLICE_TYPE_I;
60 if (slice_type != SLICE_TYPE_B)
61 WARN_ONCE("Invalid slice type for H.264 encoding!\n");
63 slice_type = SLICE_TYPE_B;
70 intel_mfc_bit_rate_control_context_init(struct encode_state *encode_state,
71 struct intel_encoder_context *encoder_context)
73 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
76 for (i = 0 ; i < 3; i++) {
77 mfc_context->bit_rate_control_context[i].MaxQpNegModifier = 6;
78 mfc_context->bit_rate_control_context[i].MaxQpPosModifier = 6;
79 mfc_context->bit_rate_control_context[i].GrowInit = 6;
80 mfc_context->bit_rate_control_context[i].GrowResistance = 4;
81 mfc_context->bit_rate_control_context[i].ShrinkInit = 6;
82 mfc_context->bit_rate_control_context[i].ShrinkResistance = 4;
84 mfc_context->bit_rate_control_context[i].Correct[0] = 8;
85 mfc_context->bit_rate_control_context[i].Correct[1] = 4;
86 mfc_context->bit_rate_control_context[i].Correct[2] = 2;
87 mfc_context->bit_rate_control_context[i].Correct[3] = 2;
88 mfc_context->bit_rate_control_context[i].Correct[4] = 4;
89 mfc_context->bit_rate_control_context[i].Correct[5] = 8;
93 static void intel_mfc_brc_init(struct encode_state *encode_state,
94 struct intel_encoder_context* encoder_context)
96 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
97 double bitrate, framerate;
98 double frame_per_bits = 8 * 3 * encoder_context->frame_width_in_pixel * encoder_context->frame_height_in_pixel / 2;
99 double qp1_size = 0.1 * frame_per_bits;
100 double qp51_size = 0.001 * frame_per_bits;
101 int min_qp = MAX(1, encoder_context->brc.min_qp);
102 double bpf, factor, hrd_factor;
103 int inum = encoder_context->brc.num_iframes_in_gop,
104 pnum = encoder_context->brc.num_pframes_in_gop,
105 bnum = encoder_context->brc.num_bframes_in_gop; /* Gop structure: number of I, P, B frames in the Gop. */
106 int intra_period = encoder_context->brc.gop_size;
110 if (encoder_context->layer.num_layers > 1)
111 qp1_size = 0.15 * frame_per_bits;
113 mfc_context->brc.mode = encoder_context->rate_control_mode;
115 mfc_context->hrd.violation_noted = 0;
117 for (i = 0; i < encoder_context->layer.num_layers; i++) {
118 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_I] = 26;
119 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P] = 26;
120 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_B] = 26;
123 bitrate = encoder_context->brc.bits_per_second[0];
124 framerate = (double)encoder_context->brc.framerate[0].num / (double)encoder_context->brc.framerate[0].den;
126 bitrate = (encoder_context->brc.bits_per_second[i] - encoder_context->brc.bits_per_second[i - 1]);
127 framerate = ((double)encoder_context->brc.framerate[i].num / (double)encoder_context->brc.framerate[i].den) -
128 ((double)encoder_context->brc.framerate[i - 1].num / (double)encoder_context->brc.framerate[i - 1].den);
131 if (mfc_context->brc.mode == VA_RC_VBR && encoder_context->brc.target_percentage[i])
132 bitrate = bitrate * encoder_context->brc.target_percentage[i] / 100;
134 if (i == encoder_context->layer.num_layers - 1)
137 factor = ((double)encoder_context->brc.framerate[i].num / (double)encoder_context->brc.framerate[i].den) /
138 ((double)encoder_context->brc.framerate[i - 1].num / (double)encoder_context->brc.framerate[i - 1].den);
141 hrd_factor = (double)bitrate / encoder_context->brc.bits_per_second[encoder_context->layer.num_layers - 1];
143 mfc_context->hrd.buffer_size[i] = (unsigned int)(encoder_context->brc.hrd_buffer_size * hrd_factor);
144 mfc_context->hrd.current_buffer_fullness[i] =
145 (double)(encoder_context->brc.hrd_initial_buffer_fullness < encoder_context->brc.hrd_buffer_size) ?
146 encoder_context->brc.hrd_initial_buffer_fullness : encoder_context->brc.hrd_buffer_size / 2.;
147 mfc_context->hrd.current_buffer_fullness[i] *= hrd_factor;
148 mfc_context->hrd.target_buffer_fullness[i] = (double)encoder_context->brc.hrd_buffer_size * hrd_factor / 2.;
149 mfc_context->hrd.buffer_capacity[i] = (double)encoder_context->brc.hrd_buffer_size * hrd_factor / qp1_size;
151 if (encoder_context->layer.num_layers > 1) {
153 intra_period = (int)(encoder_context->brc.gop_size * factor);
155 pnum = (int)(encoder_context->brc.num_pframes_in_gop * factor);
156 bnum = intra_period - inum - pnum;
158 intra_period = (int)(encoder_context->brc.gop_size * factor) - intra_period;
160 pnum = (int)(encoder_context->brc.num_pframes_in_gop * factor) - pnum;
161 bnum = intra_period - inum - pnum;
165 mfc_context->brc.gop_nums[i][SLICE_TYPE_I] = inum;
166 mfc_context->brc.gop_nums[i][SLICE_TYPE_P] = pnum;
167 mfc_context->brc.gop_nums[i][SLICE_TYPE_B] = bnum;
169 mfc_context->brc.target_frame_size[i][SLICE_TYPE_I] = (int)((double)((bitrate * intra_period) / framerate) /
170 (double)(inum + BRC_PWEIGHT * pnum + BRC_BWEIGHT * bnum));
171 mfc_context->brc.target_frame_size[i][SLICE_TYPE_P] = BRC_PWEIGHT * mfc_context->brc.target_frame_size[i][SLICE_TYPE_I];
172 mfc_context->brc.target_frame_size[i][SLICE_TYPE_B] = BRC_BWEIGHT * mfc_context->brc.target_frame_size[i][SLICE_TYPE_I];
174 bpf = mfc_context->brc.bits_per_frame[i] = bitrate / framerate;
176 if (encoder_context->brc.initial_qp) {
177 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_I] = encoder_context->brc.initial_qp;
178 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P] = encoder_context->brc.initial_qp;
179 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_B] = encoder_context->brc.initial_qp;
181 BRC_CLIP(mfc_context->brc.qp_prime_y[i][SLICE_TYPE_I], min_qp, 51);
182 BRC_CLIP(mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P], min_qp, 51);
183 BRC_CLIP(mfc_context->brc.qp_prime_y[i][SLICE_TYPE_B], min_qp, 51);
185 if ((bpf > qp51_size) && (bpf < qp1_size)) {
186 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P] = 51 - 50 * (bpf - qp51_size) / (qp1_size - qp51_size);
187 } else if (bpf >= qp1_size)
188 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P] = 1;
189 else if (bpf <= qp51_size)
190 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P] = 51;
192 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_I] = mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P];
193 mfc_context->brc.qp_prime_y[i][SLICE_TYPE_B] = mfc_context->brc.qp_prime_y[i][SLICE_TYPE_I];
195 tmp_min_qp = (min_qp < 36) ? min_qp : 36;
196 BRC_CLIP(mfc_context->brc.qp_prime_y[i][SLICE_TYPE_I], tmp_min_qp, 36);
197 tmp_min_qp = (min_qp < 40) ? min_qp : 40;
198 BRC_CLIP(mfc_context->brc.qp_prime_y[i][SLICE_TYPE_P], tmp_min_qp, 40);
199 tmp_min_qp = (min_qp < 45) ? min_qp : 45;
200 BRC_CLIP(mfc_context->brc.qp_prime_y[i][SLICE_TYPE_B], tmp_min_qp, 45);
205 int intel_mfc_update_hrd(struct encode_state *encode_state,
206 struct intel_encoder_context *encoder_context,
209 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
210 int layer_id = encoder_context->layer.curr_frame_layer_id;
211 double prev_bf = mfc_context->hrd.current_buffer_fullness[layer_id];
213 mfc_context->hrd.current_buffer_fullness[layer_id] -= frame_bits;
215 if (mfc_context->hrd.buffer_size[layer_id] > 0 && mfc_context->hrd.current_buffer_fullness[layer_id] <= 0.) {
216 mfc_context->hrd.current_buffer_fullness[layer_id] = prev_bf;
217 return BRC_UNDERFLOW;
220 mfc_context->hrd.current_buffer_fullness[layer_id] += mfc_context->brc.bits_per_frame[layer_id];
221 if (mfc_context->hrd.buffer_size[layer_id] > 0 && mfc_context->hrd.current_buffer_fullness[layer_id] > mfc_context->hrd.buffer_size[layer_id]) {
222 if (mfc_context->brc.mode == VA_RC_VBR)
223 mfc_context->hrd.current_buffer_fullness[layer_id] = mfc_context->hrd.buffer_size[layer_id];
225 mfc_context->hrd.current_buffer_fullness[layer_id] = prev_bf;
229 return BRC_NO_HRD_VIOLATION;
232 static int intel_mfc_brc_postpack_cbr(struct encode_state *encode_state,
233 struct intel_encoder_context *encoder_context,
236 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
237 gen6_brc_status sts = BRC_NO_HRD_VIOLATION;
238 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
239 int slicetype = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
240 int curr_frame_layer_id, next_frame_layer_id;
242 int qp; // quantizer of previously encoded slice of current type
243 int qpn; // predicted quantizer for next frame of current type in integer format
244 double qpf; // predicted quantizer for next frame of current type in float format
245 double delta_qp; // QP correction
246 int min_qp = MAX(1, encoder_context->brc.min_qp);
247 int target_frame_size, frame_size_next;
249 * x - how far we are from HRD buffer borders
250 * y - how far we are from target HRD buffer fullness
253 double frame_size_alpha;
255 if (encoder_context->layer.num_layers < 2 || encoder_context->layer.size_frame_layer_ids == 0) {
256 curr_frame_layer_id = 0;
257 next_frame_layer_id = 0;
259 curr_frame_layer_id = encoder_context->layer.curr_frame_layer_id;
260 next_frame_layer_id = encoder_context->layer.frame_layer_ids[encoder_context->num_frames_in_sequence % encoder_context->layer.size_frame_layer_ids];
263 /* checking wthether HRD compliance first */
264 sts = intel_mfc_update_hrd(encode_state, encoder_context, frame_bits);
266 if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation
269 next_frame_layer_id = curr_frame_layer_id;
272 mfc_context->brc.bits_prev_frame[curr_frame_layer_id] = frame_bits;
273 frame_bits = mfc_context->brc.bits_prev_frame[next_frame_layer_id];
275 mfc_context->brc.prev_slice_type[curr_frame_layer_id] = slicetype;
276 slicetype = mfc_context->brc.prev_slice_type[next_frame_layer_id];
278 /* 0 means the next frame is the first frame of next layer */
282 qpi = mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_I];
283 qpp = mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_P];
284 qpb = mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_B];
286 qp = mfc_context->brc.qp_prime_y[next_frame_layer_id][slicetype];
288 target_frame_size = mfc_context->brc.target_frame_size[next_frame_layer_id][slicetype];
289 if (mfc_context->hrd.buffer_capacity[next_frame_layer_id] < 5)
290 frame_size_alpha = 0;
292 frame_size_alpha = (double)mfc_context->brc.gop_nums[next_frame_layer_id][slicetype];
293 if (frame_size_alpha > 30) frame_size_alpha = 30;
294 frame_size_next = target_frame_size + (double)(target_frame_size - frame_bits) /
295 (double)(frame_size_alpha + 1.);
297 /* frame_size_next: avoiding negative number and too small value */
298 if ((double)frame_size_next < (double)(target_frame_size * 0.25))
299 frame_size_next = (int)((double)target_frame_size * 0.25);
301 qpf = (double)qp * target_frame_size / frame_size_next;
302 qpn = (int)(qpf + 0.5);
305 /* setting qpn we round qpf making mistakes: now we are trying to compensate this */
306 mfc_context->brc.qpf_rounding_accumulator[next_frame_layer_id] += qpf - qpn;
307 if (mfc_context->brc.qpf_rounding_accumulator[next_frame_layer_id] > 1.0) {
309 mfc_context->brc.qpf_rounding_accumulator[next_frame_layer_id] = 0.;
310 } else if (mfc_context->brc.qpf_rounding_accumulator[next_frame_layer_id] < -1.0) {
312 mfc_context->brc.qpf_rounding_accumulator[next_frame_layer_id] = 0.;
315 /* making sure that QP is not changing too fast */
316 if ((qpn - qp) > BRC_QP_MAX_CHANGE) qpn = qp + BRC_QP_MAX_CHANGE;
317 else if ((qpn - qp) < -BRC_QP_MAX_CHANGE) qpn = qp - BRC_QP_MAX_CHANGE;
318 /* making sure that with QP predictions we did do not leave QPs range */
319 BRC_CLIP(qpn, 1, 51);
321 /* calculating QP delta as some function*/
322 x = mfc_context->hrd.target_buffer_fullness[next_frame_layer_id] - mfc_context->hrd.current_buffer_fullness[next_frame_layer_id];
324 x /= mfc_context->hrd.target_buffer_fullness[next_frame_layer_id];
325 y = mfc_context->hrd.current_buffer_fullness[next_frame_layer_id];
327 x /= (mfc_context->hrd.buffer_size[next_frame_layer_id] - mfc_context->hrd.target_buffer_fullness[next_frame_layer_id]);
328 y = mfc_context->hrd.buffer_size[next_frame_layer_id] - mfc_context->hrd.current_buffer_fullness[next_frame_layer_id];
330 if (y < 0.01) y = 0.01;
332 else if (x < -1) x = -1;
334 delta_qp = BRC_QP_MAX_CHANGE * exp(-1 / y) * sin(BRC_PI_0_5 * x);
335 qpn = (int)(qpn + delta_qp + 0.5);
337 /* making sure that with QP predictions we did do not leave QPs range */
338 BRC_CLIP(qpn, min_qp, 51);
340 if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation
341 /* correcting QPs of slices of other types */
342 if (slicetype == SLICE_TYPE_P) {
343 if (abs(qpn + BRC_P_B_QP_DIFF - qpb) > 2)
344 mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_B] += (qpn + BRC_P_B_QP_DIFF - qpb) >> 1;
345 if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 2)
346 mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_I] += (qpn - BRC_I_P_QP_DIFF - qpi) >> 1;
347 } else if (slicetype == SLICE_TYPE_I) {
348 if (abs(qpn + BRC_I_B_QP_DIFF - qpb) > 4)
349 mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_B] += (qpn + BRC_I_B_QP_DIFF - qpb) >> 2;
350 if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 2)
351 mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_P] += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2;
352 } else { // SLICE_TYPE_B
353 if (abs(qpn - BRC_P_B_QP_DIFF - qpp) > 2)
354 mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_P] += (qpn - BRC_P_B_QP_DIFF - qpp) >> 1;
355 if (abs(qpn - BRC_I_B_QP_DIFF - qpi) > 4)
356 mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_I] += (qpn - BRC_I_B_QP_DIFF - qpi) >> 2;
358 BRC_CLIP(mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_I], min_qp, 51);
359 BRC_CLIP(mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_P], min_qp, 51);
360 BRC_CLIP(mfc_context->brc.qp_prime_y[next_frame_layer_id][SLICE_TYPE_B], min_qp, 51);
361 } else if (sts == BRC_UNDERFLOW) { // underflow
362 if (qpn <= qp) qpn = qp + 1;
365 sts = BRC_UNDERFLOW_WITH_MAX_QP; //underflow with maxQP
367 } else if (sts == BRC_OVERFLOW) {
368 if (qpn >= qp) qpn = qp - 1;
369 if (qpn < min_qp) { // overflow with minQP
371 sts = BRC_OVERFLOW_WITH_MIN_QP; // bit stuffing to be done
375 mfc_context->brc.qp_prime_y[next_frame_layer_id][slicetype] = qpn;
380 static int intel_mfc_brc_postpack_vbr(struct encode_state *encode_state,
381 struct intel_encoder_context *encoder_context,
384 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
386 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
387 int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
388 int *qp = mfc_context->brc.qp_prime_y[0];
389 int min_qp = MAX(1, encoder_context->brc.min_qp);
390 int qp_delta, large_frame_adjustment;
392 // This implements a simple reactive VBR rate control mode for single-layer H.264. The primary
393 // aim here is to avoid the problematic behaviour that the CBR rate controller displays on
394 // scene changes, where the QP can get pushed up by a large amount in a short period and
395 // compromise the quality of following frames to a very visible degree.
396 // The main idea, then, is to try to keep the HRD buffering above the target level most of the
397 // time, so that when a large frame is generated (on a scene change or when the stream
398 // complexity increases) we have plenty of slack to be able to encode the more difficult region
399 // without compromising quality immediately on the following frames. It is optimistic about
400 // the complexity of future frames, so even after generating one or more large frames on a
401 // significant change it will try to keep the QP at its current level until the HRD buffer
402 // bounds force a change to maintain the intended rate.
404 sts = intel_mfc_update_hrd(encode_state, encoder_context, frame_bits);
406 // This adjustment is applied to increase the QP by more than we normally would if a very
407 // large frame is encountered and we are in danger of running out of slack.
408 large_frame_adjustment = rint(2.0 * log(frame_bits / mfc_context->brc.target_frame_size[0][slice_type]));
410 if (sts == BRC_UNDERFLOW) {
411 // The frame is far too big and we don't have the bits available to send it, so it will
412 // have to be re-encoded at a higher QP.
414 if (frame_bits > mfc_context->brc.target_frame_size[0][slice_type])
415 qp_delta += large_frame_adjustment;
416 } else if (sts == BRC_OVERFLOW) {
417 // The frame is very small and we are now overflowing the HRD buffer. Currently this case
418 // does not occur because we ignore overflow in VBR mode.
419 assert(0 && "Overflow in VBR mode");
420 } else if (frame_bits <= mfc_context->brc.target_frame_size[0][slice_type]) {
421 // The frame is smaller than the average size expected for this frame type.
422 if (mfc_context->hrd.current_buffer_fullness[0] >
423 (mfc_context->hrd.target_buffer_fullness[0] + mfc_context->hrd.buffer_size[0]) / 2.0) {
424 // We currently have lots of bits available, so decrease the QP slightly for the next
428 // The HRD buffer fullness is increasing, so do nothing. (We may be under the target
429 // level here, but are moving in the right direction.)
433 // The frame is larger than the average size expected for this frame type.
434 if (mfc_context->hrd.current_buffer_fullness[0] > mfc_context->hrd.target_buffer_fullness[0]) {
435 // We are currently over the target level, so do nothing.
437 } else if (mfc_context->hrd.current_buffer_fullness[0] > mfc_context->hrd.target_buffer_fullness[0] / 2.0) {
438 // We are under the target level, but not critically. Increase the QP by one step if
439 // continuing like this would underflow soon (currently within one second).
440 if (mfc_context->hrd.current_buffer_fullness[0] /
441 (double)(frame_bits - mfc_context->brc.target_frame_size[0][slice_type] + 1) <
442 ((double)encoder_context->brc.framerate[0].num / (double)encoder_context->brc.framerate[0].den))
447 // We are a long way under the target level. Always increase the QP, possibly by a
448 // larger amount dependent on how big the frame we just made actually was.
449 qp_delta = +1 + large_frame_adjustment;
453 switch (slice_type) {
455 qp[SLICE_TYPE_I] += qp_delta;
456 qp[SLICE_TYPE_P] = qp[SLICE_TYPE_I] + BRC_I_P_QP_DIFF;
457 qp[SLICE_TYPE_B] = qp[SLICE_TYPE_I] + BRC_I_B_QP_DIFF;
460 qp[SLICE_TYPE_P] += qp_delta;
461 qp[SLICE_TYPE_I] = qp[SLICE_TYPE_P] - BRC_I_P_QP_DIFF;
462 qp[SLICE_TYPE_B] = qp[SLICE_TYPE_P] + BRC_P_B_QP_DIFF;
465 qp[SLICE_TYPE_B] += qp_delta;
466 qp[SLICE_TYPE_I] = qp[SLICE_TYPE_B] - BRC_I_B_QP_DIFF;
467 qp[SLICE_TYPE_P] = qp[SLICE_TYPE_B] - BRC_P_B_QP_DIFF;
470 BRC_CLIP(mfc_context->brc.qp_prime_y[0][SLICE_TYPE_I], min_qp, 51);
471 BRC_CLIP(mfc_context->brc.qp_prime_y[0][SLICE_TYPE_P], min_qp, 51);
472 BRC_CLIP(mfc_context->brc.qp_prime_y[0][SLICE_TYPE_B], min_qp, 51);
474 if (sts == BRC_UNDERFLOW && qp[slice_type] == 51)
475 sts = BRC_UNDERFLOW_WITH_MAX_QP;
476 if (sts == BRC_OVERFLOW && qp[slice_type] == min_qp)
477 sts = BRC_OVERFLOW_WITH_MIN_QP;
482 int intel_mfc_brc_postpack(struct encode_state *encode_state,
483 struct intel_encoder_context *encoder_context,
486 switch (encoder_context->rate_control_mode) {
488 return intel_mfc_brc_postpack_cbr(encode_state, encoder_context, frame_bits);
490 return intel_mfc_brc_postpack_vbr(encode_state, encoder_context, frame_bits);
492 assert(0 && "Invalid RC mode");
496 static void intel_mfc_hrd_context_init(struct encode_state *encode_state,
497 struct intel_encoder_context *encoder_context)
499 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
500 unsigned int rate_control_mode = encoder_context->rate_control_mode;
501 int target_bit_rate = encoder_context->brc.bits_per_second[encoder_context->layer.num_layers - 1];
503 // current we only support CBR mode.
504 if (rate_control_mode == VA_RC_CBR) {
505 mfc_context->vui_hrd.i_bit_rate_value = target_bit_rate >> 10;
506 mfc_context->vui_hrd.i_initial_cpb_removal_delay = ((target_bit_rate * 8) >> 10) * 0.5 * 1024 / target_bit_rate * 90000;
507 mfc_context->vui_hrd.i_cpb_removal_delay = 2;
508 mfc_context->vui_hrd.i_frame_number = 0;
510 mfc_context->vui_hrd.i_initial_cpb_removal_delay_length = 24;
511 mfc_context->vui_hrd.i_cpb_removal_delay_length = 24;
512 mfc_context->vui_hrd.i_dpb_output_delay_length = 24;
518 intel_mfc_hrd_context_update(struct encode_state *encode_state,
519 struct gen6_mfc_context *mfc_context)
521 mfc_context->vui_hrd.i_frame_number++;
524 int intel_mfc_interlace_check(VADriverContextP ctx,
525 struct encode_state *encode_state,
526 struct intel_encoder_context *encoder_context)
528 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
529 VAEncSliceParameterBufferH264 *pSliceParameter;
532 int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
533 int height_in_mbs = (mfc_context->surface_state.height + 15) / 16;
535 for (i = 0; i < encode_state->num_slice_params_ext; i++) {
536 pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[i]->buffer;
537 mbCount += pSliceParameter->num_macroblocks;
540 if (mbCount == (width_in_mbs * height_in_mbs))
546 void intel_mfc_brc_prepare(struct encode_state *encode_state,
547 struct intel_encoder_context *encoder_context)
549 unsigned int rate_control_mode = encoder_context->rate_control_mode;
551 if (encoder_context->codec != CODEC_H264 &&
552 encoder_context->codec != CODEC_H264_MVC)
555 if (rate_control_mode != VA_RC_CQP) {
556 /*Programing bit rate control */
557 if (encoder_context->brc.need_reset) {
558 intel_mfc_bit_rate_control_context_init(encode_state, encoder_context);
559 intel_mfc_brc_init(encode_state, encoder_context);
562 /*Programing HRD control */
563 if (encoder_context->brc.need_reset)
564 intel_mfc_hrd_context_init(encode_state, encoder_context);
568 void intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx,
569 struct encode_state *encode_state,
570 struct intel_encoder_context *encoder_context,
571 struct intel_batchbuffer *slice_batch)
573 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
574 int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SPS);
575 unsigned int skip_emul_byte_cnt;
577 if (encode_state->packed_header_data[idx]) {
578 VAEncPackedHeaderParameterBuffer *param = NULL;
579 unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
580 unsigned int length_in_bits;
582 assert(encode_state->packed_header_param[idx]);
583 param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
584 length_in_bits = param->bit_length;
586 skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits);
587 mfc_context->insert_object(ctx,
590 ALIGN(length_in_bits, 32) >> 5,
591 length_in_bits & 0x1f,
595 !param->has_emulation_bytes,
599 idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_PPS);
601 if (encode_state->packed_header_data[idx]) {
602 VAEncPackedHeaderParameterBuffer *param = NULL;
603 unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
604 unsigned int length_in_bits;
606 assert(encode_state->packed_header_param[idx]);
607 param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
608 length_in_bits = param->bit_length;
610 skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits);
612 mfc_context->insert_object(ctx,
615 ALIGN(length_in_bits, 32) >> 5,
616 length_in_bits & 0x1f,
620 !param->has_emulation_bytes,
624 idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SEI);
626 if (encode_state->packed_header_data[idx]) {
627 VAEncPackedHeaderParameterBuffer *param = NULL;
628 unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
629 unsigned int length_in_bits;
631 assert(encode_state->packed_header_param[idx]);
632 param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
633 length_in_bits = param->bit_length;
635 skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits);
636 mfc_context->insert_object(ctx,
639 ALIGN(length_in_bits, 32) >> 5,
640 length_in_bits & 0x1f,
644 !param->has_emulation_bytes,
649 VAStatus intel_mfc_avc_prepare(VADriverContextP ctx,
650 struct encode_state *encode_state,
651 struct intel_encoder_context *encoder_context)
653 struct i965_driver_data *i965 = i965_driver_data(ctx);
654 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
655 struct object_surface *obj_surface;
656 struct object_buffer *obj_buffer;
657 GenAvcSurface *gen6_avc_surface;
659 VAStatus vaStatus = VA_STATUS_SUCCESS;
660 int i, j, enable_avc_ildb = 0;
661 VAEncSliceParameterBufferH264 *slice_param;
662 struct i965_coded_buffer_segment *coded_buffer_segment;
663 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
664 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
665 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
667 if (IS_GEN6(i965->intel.device_info)) {
668 /* On the SNB it should be fixed to 128 for the DMV buffer */
672 for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == 0; j++) {
673 assert(encode_state->slice_params_ext && encode_state->slice_params_ext[j]->buffer);
674 slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j]->buffer;
676 for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) {
677 assert((slice_param->slice_type == SLICE_TYPE_I) ||
678 (slice_param->slice_type == SLICE_TYPE_SI) ||
679 (slice_param->slice_type == SLICE_TYPE_P) ||
680 (slice_param->slice_type == SLICE_TYPE_SP) ||
681 (slice_param->slice_type == SLICE_TYPE_B));
683 if (slice_param->disable_deblocking_filter_idc != 1) {
692 /*Setup all the input&output object*/
694 /* Setup current frame and current direct mv buffer*/
695 obj_surface = encode_state->reconstructed_object;
696 i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
698 if (obj_surface->private_data == NULL) {
699 gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1);
700 assert(gen6_avc_surface);
701 gen6_avc_surface->dmv_top =
702 dri_bo_alloc(i965->intel.bufmgr,
704 68 * width_in_mbs * height_in_mbs,
706 gen6_avc_surface->dmv_bottom =
707 dri_bo_alloc(i965->intel.bufmgr,
709 68 * width_in_mbs * height_in_mbs,
711 assert(gen6_avc_surface->dmv_top);
712 assert(gen6_avc_surface->dmv_bottom);
713 obj_surface->private_data = (void *)gen6_avc_surface;
714 obj_surface->free_private_data = (void *)gen_free_avc_surface;
716 gen6_avc_surface = (GenAvcSurface *) obj_surface->private_data;
717 mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo = gen6_avc_surface->dmv_top;
718 mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 1].bo = gen6_avc_surface->dmv_bottom;
719 dri_bo_reference(gen6_avc_surface->dmv_top);
720 dri_bo_reference(gen6_avc_surface->dmv_bottom);
722 if (enable_avc_ildb) {
723 mfc_context->post_deblocking_output.bo = obj_surface->bo;
724 dri_bo_reference(mfc_context->post_deblocking_output.bo);
726 mfc_context->pre_deblocking_output.bo = obj_surface->bo;
727 dri_bo_reference(mfc_context->pre_deblocking_output.bo);
730 mfc_context->surface_state.width = obj_surface->orig_width;
731 mfc_context->surface_state.height = obj_surface->orig_height;
732 mfc_context->surface_state.w_pitch = obj_surface->width;
733 mfc_context->surface_state.h_pitch = obj_surface->height;
735 /* Setup reference frames and direct mv buffers*/
736 for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++) {
737 obj_surface = encode_state->reference_objects[i];
739 if (obj_surface && obj_surface->bo) {
740 mfc_context->reference_surfaces[i].bo = obj_surface->bo;
741 dri_bo_reference(obj_surface->bo);
743 /* Check DMV buffer */
744 if (obj_surface->private_data == NULL) {
746 gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1);
747 assert(gen6_avc_surface);
748 gen6_avc_surface->dmv_top =
749 dri_bo_alloc(i965->intel.bufmgr,
751 68 * width_in_mbs * height_in_mbs,
753 gen6_avc_surface->dmv_bottom =
754 dri_bo_alloc(i965->intel.bufmgr,
756 68 * width_in_mbs * height_in_mbs,
758 assert(gen6_avc_surface->dmv_top);
759 assert(gen6_avc_surface->dmv_bottom);
760 obj_surface->private_data = gen6_avc_surface;
761 obj_surface->free_private_data = gen_free_avc_surface;
764 gen6_avc_surface = (GenAvcSurface *) obj_surface->private_data;
765 /* Setup DMV buffer */
766 mfc_context->direct_mv_buffers[i * 2].bo = gen6_avc_surface->dmv_top;
767 mfc_context->direct_mv_buffers[i * 2 + 1].bo = gen6_avc_surface->dmv_bottom;
768 dri_bo_reference(gen6_avc_surface->dmv_top);
769 dri_bo_reference(gen6_avc_surface->dmv_bottom);
775 mfc_context->uncompressed_picture_source.bo = encode_state->input_yuv_object->bo;
776 dri_bo_reference(mfc_context->uncompressed_picture_source.bo);
778 obj_buffer = encode_state->coded_buf_object;
779 bo = obj_buffer->buffer_store->bo;
780 mfc_context->mfc_indirect_pak_bse_object.bo = bo;
781 mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE;
782 mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000);
783 dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo);
786 coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual;
787 coded_buffer_segment->mapped = 0;
788 coded_buffer_segment->codec = encoder_context->codec;
794 * The LUT uses the pair of 4-bit units: (shift, base) structure.
796 * So it is necessary to convert one cost into the nearest LUT format.
798 * 2^K *x = 2^n * (1 + deltaX)
799 * k + log2(x) = n + log2(1 + deltaX)
800 * log2(x) = n - k + log2(1 + deltaX)
801 * As X is in the range of [1, 15]
802 * 4 > n - k + log2(1 + deltaX) >= 0
803 * => n + log2(1 + deltaX) >= k > n - 4 + log2(1 + deltaX)
804 * Then we can derive the corresponding K and get the nearest LUT format.
806 int intel_format_lutvalue(int value, int max)
809 int logvalue, temp1, temp2;
814 logvalue = (int)(log2f((float)value));
818 int error, temp_value, base, j, temp_err;
820 j = logvalue - 4 + 1;
822 for (; j <= logvalue; j++) {
826 base = (value + (1 << (j - 1)) - 1) >> j;
831 temp_value = base << j;
832 temp_err = abs(value - temp_value);
833 if (temp_err < error) {
835 ret = (j << 4) | base;
841 temp1 = (ret & 0xf) << ((ret & 0xf0) >> 4);
842 temp2 = (max & 0xf) << ((max & 0xf0) >> 4);
851 #define VP8_QP_MAX 128
854 static float intel_lambda_qp(int qp)
856 float value, lambdaf;
858 value = value / 6 - 2;
861 lambdaf = roundf(powf(2, value));
866 void intel_h264_calc_mbmvcost_qp(int qp,
868 uint8_t *vme_state_message)
870 int m_cost, j, mv_count;
871 float lambda, m_costf;
873 assert(qp <= QP_MAX);
874 lambda = intel_lambda_qp(qp);
877 vme_state_message[MODE_CHROMA_INTRA] = 0;
878 vme_state_message[MODE_REFID_COST] = intel_format_lutvalue(m_cost, 0x8f);
880 if (slice_type == SLICE_TYPE_I) {
881 vme_state_message[MODE_INTRA_16X16] = 0;
883 vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f);
884 m_cost = lambda * 16;
885 vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
887 vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
890 vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f);
891 for (j = 1; j < 3; j++) {
892 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
893 m_cost = (int)m_costf;
894 vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f);
897 for (j = 4; j <= 64; j *= 2) {
898 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
899 m_cost = (int)m_costf;
900 vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f);
905 vme_state_message[MODE_INTRA_16X16] = 0x4a;
906 vme_state_message[MODE_INTRA_8X8] = 0x4a;
907 vme_state_message[MODE_INTRA_4X4] = 0x4a;
908 vme_state_message[MODE_INTRA_NONPRED] = 0x4a;
909 vme_state_message[MODE_INTER_16X16] = 0x4a;
910 vme_state_message[MODE_INTER_16X8] = 0x4a;
911 vme_state_message[MODE_INTER_8X8] = 0x4a;
912 vme_state_message[MODE_INTER_8X4] = 0x4a;
913 vme_state_message[MODE_INTER_4X4] = 0x4a;
914 vme_state_message[MODE_INTER_BWD] = 0x2a;
917 m_costf = lambda * 10;
918 vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f);
919 m_cost = lambda * 14;
920 vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f);
921 m_cost = lambda * 24;
922 vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
923 m_costf = lambda * 3.5;
925 vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
926 if (slice_type == SLICE_TYPE_P) {
927 m_costf = lambda * 2.5;
929 vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
930 m_costf = lambda * 4;
932 vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
933 m_costf = lambda * 1.5;
935 vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
936 m_costf = lambda * 3;
938 vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f);
939 m_costf = lambda * 5;
941 vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
942 /* BWD is not used in P-frame */
943 vme_state_message[MODE_INTER_BWD] = 0;
945 m_costf = lambda * 2.5;
947 vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
948 m_costf = lambda * 5.5;
950 vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
951 m_costf = lambda * 3.5;
953 vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
954 m_costf = lambda * 5.0;
956 vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f);
957 m_costf = lambda * 6.5;
959 vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
960 m_costf = lambda * 1.5;
962 vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f);
968 void intel_vme_update_mbmv_cost(VADriverContextP ctx,
969 struct encode_state *encode_state,
970 struct intel_encoder_context *encoder_context)
972 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
973 struct gen6_vme_context *vme_context = encoder_context->vme_context;
974 VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
975 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
977 uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message);
979 int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
981 if (encoder_context->rate_control_mode == VA_RC_CQP)
982 qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
984 qp = mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][slice_type];
986 if (vme_state_message == NULL)
989 intel_h264_calc_mbmvcost_qp(qp, slice_type, vme_state_message);
992 void intel_vme_vp8_update_mbmv_cost(VADriverContextP ctx,
993 struct encode_state *encode_state,
994 struct intel_encoder_context *encoder_context)
996 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
997 struct gen6_vme_context *vme_context = encoder_context->vme_context;
998 VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer;
999 VAQMatrixBufferVP8 *q_matrix = (VAQMatrixBufferVP8 *)encode_state->q_matrix->buffer;
1000 int qp, m_cost, j, mv_count;
1001 uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message);
1002 float lambda, m_costf;
1004 int is_key_frame = !pic_param->pic_flags.bits.frame_type;
1005 int slice_type = (is_key_frame ? SLICE_TYPE_I : SLICE_TYPE_P);
1007 if (vme_state_message == NULL)
1010 if (encoder_context->rate_control_mode == VA_RC_CQP)
1011 qp = q_matrix->quantization_index[0];
1013 qp = mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][slice_type];
1015 lambda = intel_lambda_qp(qp * QP_MAX / VP8_QP_MAX);
1018 vme_state_message[MODE_CHROMA_INTRA] = intel_format_lutvalue(m_cost, 0x8f);
1021 vme_state_message[MODE_INTRA_16X16] = 0;
1022 m_cost = lambda * 16;
1023 vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
1024 m_cost = lambda * 3;
1025 vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
1028 vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f);
1029 for (j = 1; j < 3; j++) {
1030 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
1031 m_cost = (int)m_costf;
1032 vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f);
1035 for (j = 4; j <= 64; j *= 2) {
1036 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
1037 m_cost = (int)m_costf;
1038 vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f);
1043 vme_state_message[MODE_INTRA_16X16] = 0x4a;
1044 vme_state_message[MODE_INTRA_4X4] = 0x4a;
1045 vme_state_message[MODE_INTRA_NONPRED] = 0x4a;
1046 vme_state_message[MODE_INTER_16X16] = 0x4a;
1047 vme_state_message[MODE_INTER_16X8] = 0x4a;
1048 vme_state_message[MODE_INTER_8X8] = 0x4a;
1049 vme_state_message[MODE_INTER_4X4] = 0x4a;
1050 vme_state_message[MODE_INTER_BWD] = 0;
1053 m_costf = lambda * 10;
1054 vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f);
1055 m_cost = lambda * 24;
1056 vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
1058 m_costf = lambda * 3.5;
1060 vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
1062 m_costf = lambda * 2.5;
1064 vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
1065 m_costf = lambda * 4;
1067 vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
1068 m_costf = lambda * 1.5;
1070 vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
1071 m_costf = lambda * 5;
1073 vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
1074 /* BWD is not used in P-frame */
1075 vme_state_message[MODE_INTER_BWD] = 0;
1079 #define MB_SCOREBOARD_A (1 << 0)
1080 #define MB_SCOREBOARD_B (1 << 1)
1081 #define MB_SCOREBOARD_C (1 << 2)
1083 gen7_vme_scoreboard_init(VADriverContextP ctx, struct gen6_vme_context *vme_context)
1085 vme_context->gpe_context.vfe_desc5.scoreboard0.enable = 1;
1086 vme_context->gpe_context.vfe_desc5.scoreboard0.type = SCOREBOARD_STALLING;
1087 vme_context->gpe_context.vfe_desc5.scoreboard0.mask = (MB_SCOREBOARD_A |
1091 /* In VME prediction the current mb depends on the neighbour
1092 * A/B/C macroblock. So the left/up/up-right dependency should
1095 vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x0 = -1;
1096 vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y0 = 0;
1097 vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x1 = 0;
1098 vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y1 = -1;
1099 vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x2 = 1;
1100 vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y2 = -1;
1102 vme_context->gpe_context.vfe_desc7.dword = 0;
1106 /* check whether the mb of (x_index, y_index) is out of bound */
1107 static inline int loop_in_bounds(int x_index, int y_index, int first_mb, int num_mb, int mb_width, int mb_height)
1110 if (x_index < 0 || x_index >= mb_width)
1112 if (y_index < 0 || y_index >= mb_height)
1115 mb_index = y_index * mb_width + x_index;
1116 if (mb_index < first_mb || mb_index > (first_mb + num_mb))
1122 gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx,
1123 struct encode_state *encode_state,
1124 int mb_width, int mb_height,
1126 int transform_8x8_mode_flag,
1127 struct intel_encoder_context *encoder_context)
1129 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1132 unsigned int *command_ptr;
1133 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
1134 VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
1135 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1136 int qp, qp_mb, qp_index;
1137 int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
1139 if (encoder_context->rate_control_mode == VA_RC_CQP)
1140 qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
1142 qp = mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][slice_type];
1144 #define USE_SCOREBOARD (1 << 21)
1146 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
1147 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
1149 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
1150 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
1151 int first_mb = pSliceParameter->macroblock_address;
1152 int num_mb = pSliceParameter->num_macroblocks;
1153 unsigned int mb_intra_ub, score_dep;
1154 int x_outer, y_outer, x_inner, y_inner;
1155 int xtemp_outer = 0;
1157 x_outer = first_mb % mb_width;
1158 y_outer = first_mb / mb_width;
1161 for (; x_outer < (mb_width - 2) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height);) {
1164 for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
1168 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
1169 score_dep |= MB_SCOREBOARD_A;
1171 if (y_inner != mb_row) {
1172 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
1173 score_dep |= MB_SCOREBOARD_B;
1175 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
1176 if (x_inner != (mb_width - 1)) {
1177 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
1178 score_dep |= MB_SCOREBOARD_C;
1182 *command_ptr++ = (CMD_MEDIA_OBJECT | (9 - 2));
1183 *command_ptr++ = kernel;
1184 *command_ptr++ = USE_SCOREBOARD;
1187 /* the (X, Y) term of scoreboard */
1188 *command_ptr++ = ((y_inner << 16) | x_inner);
1189 *command_ptr++ = score_dep;
1191 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
1192 *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
1193 /* QP occupies one byte */
1194 if (vme_context->roi_enabled) {
1195 qp_index = y_inner * mb_width + x_inner;
1196 qp_mb = *(vme_context->qp_per_mb + qp_index);
1199 *command_ptr++ = qp_mb;
1206 xtemp_outer = mb_width - 2;
1207 if (xtemp_outer < 0)
1209 x_outer = xtemp_outer;
1210 y_outer = first_mb / mb_width;
1211 for (; !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height);) {
1214 for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
1218 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
1219 score_dep |= MB_SCOREBOARD_A;
1221 if (y_inner != mb_row) {
1222 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
1223 score_dep |= MB_SCOREBOARD_B;
1225 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
1227 if (x_inner != (mb_width - 1)) {
1228 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
1229 score_dep |= MB_SCOREBOARD_C;
1233 *command_ptr++ = (CMD_MEDIA_OBJECT | (9 - 2));
1234 *command_ptr++ = kernel;
1235 *command_ptr++ = USE_SCOREBOARD;
1238 /* the (X, Y) term of scoreboard */
1239 *command_ptr++ = ((y_inner << 16) | x_inner);
1240 *command_ptr++ = score_dep;
1242 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
1243 *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
1244 /* qp occupies one byte */
1245 if (vme_context->roi_enabled) {
1246 qp_index = y_inner * mb_width + x_inner;
1247 qp_mb = *(vme_context->qp_per_mb + qp_index);
1250 *command_ptr++ = qp_mb;
1256 if (x_outer >= mb_width) {
1258 x_outer = xtemp_outer;
1264 *command_ptr++ = MI_BATCH_BUFFER_END;
1266 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
1270 intel_get_ref_idx_state_1(VAPictureH264 *va_pic, unsigned int frame_store_id)
1272 unsigned int is_long_term =
1273 !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE);
1274 unsigned int is_top_field =
1275 !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD);
1276 unsigned int is_bottom_field =
1277 !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD);
1279 return ((is_long_term << 6) |
1280 ((is_top_field ^ is_bottom_field ^ 1) << 5) |
1281 (frame_store_id << 1) |
1282 ((is_top_field ^ 1) & is_bottom_field));
1286 intel_mfc_avc_ref_idx_state(VADriverContextP ctx,
1287 struct encode_state *encode_state,
1288 struct intel_encoder_context *encoder_context)
1290 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1291 struct intel_batchbuffer *batch = encoder_context->base.batch;
1293 struct object_surface *obj_surface;
1294 unsigned int fref_entry, bref_entry;
1296 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1298 fref_entry = 0x80808080;
1299 bref_entry = 0x80808080;
1300 slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
1302 if (slice_type == SLICE_TYPE_P || slice_type == SLICE_TYPE_B) {
1303 int ref_idx_l0 = (vme_context->ref_index_in_mb[0] & 0xff);
1305 if (ref_idx_l0 > 3) {
1306 WARN_ONCE("ref_idx_l0 is out of range\n");
1310 obj_surface = vme_context->used_reference_objects[0];
1312 for (i = 0; i < 16; i++) {
1314 obj_surface == encode_state->reference_objects[i]) {
1319 if (frame_index == -1) {
1320 WARN_ONCE("RefPicList0 is not found in DPB!\n");
1322 int ref_idx_l0_shift = ref_idx_l0 * 8;
1323 fref_entry &= ~(0xFF << ref_idx_l0_shift);
1324 fref_entry += (intel_get_ref_idx_state_1(vme_context->used_references[0], frame_index) << ref_idx_l0_shift);
1328 if (slice_type == SLICE_TYPE_B) {
1329 int ref_idx_l1 = (vme_context->ref_index_in_mb[1] & 0xff);
1331 if (ref_idx_l1 > 3) {
1332 WARN_ONCE("ref_idx_l1 is out of range\n");
1336 obj_surface = vme_context->used_reference_objects[1];
1338 for (i = 0; i < 16; i++) {
1340 obj_surface == encode_state->reference_objects[i]) {
1345 if (frame_index == -1) {
1346 WARN_ONCE("RefPicList1 is not found in DPB!\n");
1348 int ref_idx_l1_shift = ref_idx_l1 * 8;
1349 bref_entry &= ~(0xFF << ref_idx_l1_shift);
1350 bref_entry += (intel_get_ref_idx_state_1(vme_context->used_references[1], frame_index) << ref_idx_l1_shift);
1354 BEGIN_BCS_BATCH(batch, 10);
1355 OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
1356 OUT_BCS_BATCH(batch, 0); //Select L0
1357 OUT_BCS_BATCH(batch, fref_entry); //Only 1 reference
1358 for (i = 0; i < 7; i++) {
1359 OUT_BCS_BATCH(batch, 0x80808080);
1361 ADVANCE_BCS_BATCH(batch);
1363 BEGIN_BCS_BATCH(batch, 10);
1364 OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
1365 OUT_BCS_BATCH(batch, 1); //Select L1
1366 OUT_BCS_BATCH(batch, bref_entry); //Only 1 reference
1367 for (i = 0; i < 7; i++) {
1368 OUT_BCS_BATCH(batch, 0x80808080);
1370 ADVANCE_BCS_BATCH(batch);
1374 void intel_vme_mpeg2_state_setup(VADriverContextP ctx,
1375 struct encode_state *encode_state,
1376 struct intel_encoder_context *encoder_context)
1378 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1379 uint32_t *vme_state_message = (uint32_t *)(vme_context->vme_state_message);
1380 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
1381 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
1382 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
1383 uint32_t mv_x, mv_y;
1384 VAEncSliceParameterBufferMPEG2 *slice_param = NULL;
1385 VAEncPictureParameterBufferMPEG2 *pic_param = NULL;
1386 slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
1388 if (vme_context->mpeg2_level == MPEG2_LEVEL_LOW) {
1391 } else if (vme_context->mpeg2_level == MPEG2_LEVEL_MAIN) {
1394 } else if (vme_context->mpeg2_level == MPEG2_LEVEL_HIGH) {
1398 WARN_ONCE("Incorrect Mpeg2 level setting!\n");
1403 pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
1404 if (pic_param->picture_type != VAEncPictureTypeIntra) {
1405 int qp, m_cost, j, mv_count;
1406 float lambda, m_costf;
1407 slice_param = (VAEncSliceParameterBufferMPEG2 *)
1408 encode_state->slice_params_ext[0]->buffer;
1409 qp = slice_param->quantiser_scale_code;
1410 lambda = intel_lambda_qp(qp);
1411 /* No Intra prediction. So it is zero */
1412 vme_state_message[MODE_INTRA_8X8] = 0;
1413 vme_state_message[MODE_INTRA_4X4] = 0;
1414 vme_state_message[MODE_INTER_MV0] = 0;
1415 for (j = 1; j < 3; j++) {
1416 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
1417 m_cost = (int)m_costf;
1418 vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f);
1421 for (j = 4; j <= 64; j *= 2) {
1422 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
1423 m_cost = (int)m_costf;
1424 vme_state_message[MODE_INTER_MV0 + mv_count] =
1425 intel_format_lutvalue(m_cost, 0x6f);
1429 /* It can only perform the 16x16 search. So mode cost can be ignored for
1430 * the other mode. for example: 16x8/8x8
1432 vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f);
1433 vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
1435 vme_state_message[MODE_INTER_16X8] = 0;
1436 vme_state_message[MODE_INTER_8X8] = 0;
1437 vme_state_message[MODE_INTER_8X4] = 0;
1438 vme_state_message[MODE_INTER_4X4] = 0;
1439 vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f);
1442 vme_state_message[MPEG2_MV_RANGE] = (mv_y << 16) | (mv_x);
1444 vme_state_message[MPEG2_PIC_WIDTH_HEIGHT] = (height_in_mbs << 16) |
1449 gen7_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx,
1450 struct encode_state *encode_state,
1451 int mb_width, int mb_height,
1453 struct intel_encoder_context *encoder_context)
1455 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1456 unsigned int *command_ptr;
1458 #define MPEG2_SCOREBOARD (1 << 21)
1460 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
1461 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
1464 unsigned int mb_intra_ub, score_dep;
1465 int x_outer, y_outer, x_inner, y_inner;
1466 int xtemp_outer = 0;
1468 int num_mb = mb_width * mb_height;
1474 for (; x_outer < (mb_width - 2) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height);) {
1477 for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
1481 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
1482 score_dep |= MB_SCOREBOARD_A;
1485 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
1486 score_dep |= MB_SCOREBOARD_B;
1489 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
1491 if (x_inner != (mb_width - 1)) {
1492 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
1493 score_dep |= MB_SCOREBOARD_C;
1497 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
1498 *command_ptr++ = kernel;
1499 *command_ptr++ = MPEG2_SCOREBOARD;
1502 /* the (X, Y) term of scoreboard */
1503 *command_ptr++ = ((y_inner << 16) | x_inner);
1504 *command_ptr++ = score_dep;
1506 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
1507 *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8));
1514 xtemp_outer = mb_width - 2;
1515 if (xtemp_outer < 0)
1517 x_outer = xtemp_outer;
1519 for (; !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height);) {
1522 for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
1526 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
1527 score_dep |= MB_SCOREBOARD_A;
1530 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
1531 score_dep |= MB_SCOREBOARD_B;
1534 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
1536 if (x_inner != (mb_width - 1)) {
1537 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
1538 score_dep |= MB_SCOREBOARD_C;
1542 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
1543 *command_ptr++ = kernel;
1544 *command_ptr++ = MPEG2_SCOREBOARD;
1547 /* the (X, Y) term of scoreboard */
1548 *command_ptr++ = ((y_inner << 16) | x_inner);
1549 *command_ptr++ = score_dep;
1551 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
1552 *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8));
1558 if (x_outer >= mb_width) {
1560 x_outer = xtemp_outer;
1566 *command_ptr++ = MI_BATCH_BUFFER_END;
1568 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
1573 avc_temporal_find_surface(VAPictureH264 *curr_pic,
1574 VAPictureH264 *ref_list,
1578 int i, found = -1, min = 0x7FFFFFFF;
1580 for (i = 0; i < num_pictures; i++) {
1583 if ((ref_list[i].flags & VA_PICTURE_H264_INVALID) ||
1584 (ref_list[i].picture_id == VA_INVALID_SURFACE))
1587 tmp = curr_pic->TopFieldOrderCnt - ref_list[i].TopFieldOrderCnt;
1592 if (tmp > 0 && tmp < min) {
1602 intel_avc_vme_reference_state(VADriverContextP ctx,
1603 struct encode_state *encode_state,
1604 struct intel_encoder_context *encoder_context,
1607 void (* vme_source_surface_state)(
1608 VADriverContextP ctx,
1610 struct object_surface *obj_surface,
1611 struct intel_encoder_context *encoder_context))
1613 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1614 struct object_surface *obj_surface = NULL;
1615 struct i965_driver_data *i965 = i965_driver_data(ctx);
1616 VASurfaceID ref_surface_id;
1617 VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
1618 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1619 int max_num_references;
1620 VAPictureH264 *curr_pic;
1621 VAPictureH264 *ref_list;
1624 if (list_index == 0) {
1625 max_num_references = pic_param->num_ref_idx_l0_active_minus1 + 1;
1626 ref_list = slice_param->RefPicList0;
1628 max_num_references = pic_param->num_ref_idx_l1_active_minus1 + 1;
1629 ref_list = slice_param->RefPicList1;
1632 if (max_num_references == 1) {
1633 if (list_index == 0) {
1634 ref_surface_id = slice_param->RefPicList0[0].picture_id;
1635 vme_context->used_references[0] = &slice_param->RefPicList0[0];
1637 ref_surface_id = slice_param->RefPicList1[0].picture_id;
1638 vme_context->used_references[1] = &slice_param->RefPicList1[0];
1641 if (ref_surface_id != VA_INVALID_SURFACE)
1642 obj_surface = SURFACE(ref_surface_id);
1646 obj_surface = encode_state->reference_objects[list_index];
1647 vme_context->used_references[list_index] = &pic_param->ReferenceFrames[list_index];
1652 curr_pic = &pic_param->CurrPic;
1654 /* select the reference frame in temporal space */
1655 ref_idx = avc_temporal_find_surface(curr_pic, ref_list, max_num_references, list_index == 1);
1656 ref_surface_id = ref_list[ref_idx].picture_id;
1658 if (ref_surface_id != VA_INVALID_SURFACE) /* otherwise warning later */
1659 obj_surface = SURFACE(ref_surface_id);
1661 vme_context->used_reference_objects[list_index] = obj_surface;
1662 vme_context->used_references[list_index] = &ref_list[ref_idx];
1667 assert(ref_idx >= 0);
1668 vme_context->used_reference_objects[list_index] = obj_surface;
1669 vme_source_surface_state(ctx, surface_index, obj_surface, encoder_context);
1670 vme_context->ref_index_in_mb[list_index] = (ref_idx << 24 |
1675 vme_context->used_reference_objects[list_index] = NULL;
1676 vme_context->used_references[list_index] = NULL;
1677 vme_context->ref_index_in_mb[list_index] = 0;
1681 #define AVC_NAL_DELIMITER 9
1683 intel_avc_insert_aud_packed_data(VADriverContextP ctx,
1684 struct encode_state *encode_state,
1685 struct intel_encoder_context *encoder_context,
1686 struct intel_batchbuffer *batch)
1688 VAEncPackedHeaderParameterBuffer *param = NULL;
1689 unsigned int length_in_bits;
1690 unsigned int *header_data = NULL;
1691 unsigned char *nal_type = NULL;
1692 int count, i, start_index;
1693 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
1695 count = encode_state->slice_rawdata_count[0];
1696 start_index = (encode_state->slice_rawdata_index[0] & SLICE_PACKED_DATA_INDEX_MASK);
1698 for (i = 0; i < count; i++) {
1699 unsigned int skip_emul_byte_cnt;
1701 header_data = (unsigned int *)encode_state->packed_header_data_ext[start_index + i]->buffer;
1702 nal_type = (unsigned char *)header_data;
1704 param = (VAEncPackedHeaderParameterBuffer *)(encode_state->packed_header_params_ext[start_index + i]->buffer);
1706 length_in_bits = param->bit_length;
1708 skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits);
1710 if ((*(nal_type + skip_emul_byte_cnt - 1) & 0x1f) == AVC_NAL_DELIMITER) {
1711 mfc_context->insert_object(ctx,
1714 ALIGN(length_in_bits, 32) >> 5,
1715 length_in_bits & 0x1f,
1719 !param->has_emulation_bytes,
1727 void intel_avc_slice_insert_packed_data(VADriverContextP ctx,
1728 struct encode_state *encode_state,
1729 struct intel_encoder_context *encoder_context,
1731 struct intel_batchbuffer *slice_batch)
1733 int count, i, start_index;
1734 unsigned int length_in_bits;
1735 VAEncPackedHeaderParameterBuffer *param = NULL;
1736 unsigned int *header_data = NULL;
1737 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
1738 int slice_header_index;
1739 unsigned char *nal_type = NULL;
1741 if (encode_state->slice_header_index[slice_index] == 0)
1742 slice_header_index = -1;
1744 slice_header_index = (encode_state->slice_header_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK);
1746 count = encode_state->slice_rawdata_count[slice_index];
1747 start_index = (encode_state->slice_rawdata_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK);
1749 for (i = 0; i < count; i++) {
1750 unsigned int skip_emul_byte_cnt;
1752 header_data = (unsigned int *)encode_state->packed_header_data_ext[start_index + i]->buffer;
1753 nal_type = (unsigned char *)header_data;
1755 param = (VAEncPackedHeaderParameterBuffer *)
1756 (encode_state->packed_header_params_ext[start_index + i]->buffer);
1758 length_in_bits = param->bit_length;
1760 skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits);
1762 /* skip the slice header/AUD packed data type as it is lastly inserted */
1763 if (param->type == VAEncPackedHeaderSlice || (*(nal_type + skip_emul_byte_cnt - 1) & 0x1f) == AVC_NAL_DELIMITER)
1766 /* as the slice header is still required, the last header flag is set to
1769 mfc_context->insert_object(ctx,
1772 ALIGN(length_in_bits, 32) >> 5,
1773 length_in_bits & 0x1f,
1777 !param->has_emulation_bytes,
1781 if (slice_header_index == -1) {
1782 unsigned char *slice_header = NULL;
1783 int slice_header_length_in_bits = 0;
1784 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
1785 VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
1786 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer;
1788 /* No slice header data is passed. And the driver needs to generate it */
1789 /* For the Normal H264 */
1790 slice_header_length_in_bits = build_avc_slice_header(pSequenceParameter,
1794 mfc_context->insert_object(ctx, encoder_context,
1795 (unsigned int *)slice_header,
1796 ALIGN(slice_header_length_in_bits, 32) >> 5,
1797 slice_header_length_in_bits & 0x1f,
1798 5, /* first 5 bytes are start code + nal unit type */
1799 1, 0, 1, slice_batch);
1803 unsigned int skip_emul_byte_cnt;
1805 header_data = (unsigned int *)encode_state->packed_header_data_ext[slice_header_index]->buffer;
1807 param = (VAEncPackedHeaderParameterBuffer *)
1808 (encode_state->packed_header_params_ext[slice_header_index]->buffer);
1809 length_in_bits = param->bit_length;
1811 /* as the slice header is the last header data for one slice,
1812 * the last header flag is set to one.
1814 skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits);
1816 mfc_context->insert_object(ctx,
1819 ALIGN(length_in_bits, 32) >> 5,
1820 length_in_bits & 0x1f,
1824 !param->has_emulation_bytes,
1832 intel_h264_initialize_mbmv_cost(VADriverContextP ctx,
1833 struct encode_state *encode_state,
1834 struct intel_encoder_context *encoder_context)
1836 struct i965_driver_data *i965 = i965_driver_data(ctx);
1837 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1838 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1841 uint8_t *cost_table;
1843 int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
1846 if (slice_type == SLICE_TYPE_I) {
1847 if (vme_context->i_qp_cost_table)
1849 } else if (slice_type == SLICE_TYPE_P) {
1850 if (vme_context->p_qp_cost_table)
1853 if (vme_context->b_qp_cost_table)
1857 /* It is enough to allocate 32 bytes for each qp. */
1858 bo = dri_bo_alloc(i965->intel.bufmgr,
1864 assert(bo->virtual);
1865 cost_table = (uint8_t *)(bo->virtual);
1866 for (qp = 0; qp < QP_MAX; qp++) {
1867 intel_h264_calc_mbmvcost_qp(qp, slice_type, cost_table);
1873 if (slice_type == SLICE_TYPE_I) {
1874 vme_context->i_qp_cost_table = bo;
1875 } else if (slice_type == SLICE_TYPE_P) {
1876 vme_context->p_qp_cost_table = bo;
1878 vme_context->b_qp_cost_table = bo;
1881 vme_context->cost_table_size = QP_MAX * 32;
1886 intel_h264_setup_cost_surface(VADriverContextP ctx,
1887 struct encode_state *encode_state,
1888 struct intel_encoder_context *encoder_context,
1889 unsigned long binding_table_offset,
1890 unsigned long surface_state_offset)
1892 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1893 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1897 struct i965_buffer_surface cost_table;
1899 int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
1902 if (slice_type == SLICE_TYPE_I) {
1903 bo = vme_context->i_qp_cost_table;
1904 } else if (slice_type == SLICE_TYPE_P) {
1905 bo = vme_context->p_qp_cost_table;
1907 bo = vme_context->b_qp_cost_table;
1911 cost_table.num_blocks = QP_MAX;
1912 cost_table.pitch = 16;
1913 cost_table.size_block = 32;
1915 vme_context->vme_buffer_suface_setup(ctx,
1916 &vme_context->gpe_context,
1918 binding_table_offset,
1919 surface_state_offset);
1923 * the idea of conversion between qp and qstep comes from scaling process
1924 * of transform coeff for Luma component in H264 spec.
1926 * In order to avoid too small qstep, it is multiplied by 16.
1928 static float intel_h264_qp_qstep(int qp)
1932 value = value / 6 - 2;
1933 qstep = powf(2, value);
1937 static int intel_h264_qstep_qp(float qstep)
1941 qp = 12.0f + 6.0f * log2f(qstep);
1947 * Currently it is based on the following assumption:
1948 * SUM(roi_area * 1 / roi_qstep) + non_area * 1 / nonroi_qstep =
1949 * total_aread * 1 / baseqp_qstep
1951 * qstep is the linearized quantizer of H264 quantizer
1954 int row_start_in_mb;
1956 int col_start_in_mb;
1966 intel_h264_enc_roi_cbr(VADriverContextP ctx,
1968 struct encode_state *encode_state,
1969 struct intel_encoder_context *encoder_context)
1972 int min_qp = MAX(1, encoder_context->brc.min_qp);
1975 ROIRegionParam param_regions[I965_MAX_NUM_ROI_REGIONS];
1980 float qstep_nonroi, qstep_base;
1981 float roi_area, total_area, nonroi_area;
1984 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
1985 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
1986 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
1987 int mbs_in_picture = width_in_mbs * height_in_mbs;
1989 struct gen6_vme_context *vme_context = encoder_context->vme_context;
1990 VAStatus vaStatus = VA_STATUS_SUCCESS;
1992 /* currently roi_value_is_qp_delta is the only supported mode of priority.
1994 * qp_delta set by user is added to base_qp, which is then clapped by
1995 * [base_qp-min_delta, base_qp+max_delta].
1997 ASSERT_RET(encoder_context->brc.roi_value_is_qp_delta, VA_STATUS_ERROR_INVALID_PARAMETER);
1999 num_roi = encoder_context->brc.num_roi;
2001 /* when the base_qp is lower than 12, the quality is quite good based
2002 * on the H264 test experience.
2003 * In such case it is unnecessary to adjust the quality for ROI region.
2005 if (base_qp <= 12) {
2006 nonroi_qp = base_qp;
2013 for (i = 0; i < num_roi; i++) {
2014 int row_start, row_end, col_start, col_end;
2015 int roi_width_mbs, roi_height_mbs;
2020 col_start = encoder_context->brc.roi[i].left;
2021 col_end = encoder_context->brc.roi[i].right;
2022 row_start = encoder_context->brc.roi[i].top;
2023 row_end = encoder_context->brc.roi[i].bottom;
2025 col_start = col_start / 16;
2026 col_end = (col_end + 15) / 16;
2027 row_start = row_start / 16;
2028 row_end = (row_end + 15) / 16;
2030 roi_width_mbs = col_end - col_start;
2031 roi_height_mbs = row_end - row_start;
2032 mbs_in_roi = roi_width_mbs * roi_height_mbs;
2034 param_regions[i].row_start_in_mb = row_start;
2035 param_regions[i].row_end_in_mb = row_end;
2036 param_regions[i].col_start_in_mb = col_start;
2037 param_regions[i].col_end_in_mb = col_end;
2038 param_regions[i].width_mbs = roi_width_mbs;
2039 param_regions[i].height_mbs = roi_height_mbs;
2041 roi_qp = base_qp + encoder_context->brc.roi[i].value;
2042 BRC_CLIP(roi_qp, min_qp, 51);
2044 param_regions[i].roi_qp = roi_qp;
2045 qstep_roi = intel_h264_qp_qstep(roi_qp);
2047 roi_area += mbs_in_roi;
2048 sum_roi += mbs_in_roi / qstep_roi;
2051 total_area = mbs_in_picture;
2052 nonroi_area = total_area - roi_area;
2054 qstep_base = intel_h264_qp_qstep(base_qp);
2055 temp = (total_area / qstep_base - sum_roi);
2060 qstep_nonroi = nonroi_area / temp;
2061 nonroi_qp = intel_h264_qstep_qp(qstep_nonroi);
2064 BRC_CLIP(nonroi_qp, min_qp, 51);
2067 memset(vme_context->qp_per_mb, nonroi_qp, mbs_in_picture);
2071 for (i = 0; i < num_roi; i++) {
2072 for (j = param_regions[i].row_start_in_mb; j < param_regions[i].row_end_in_mb; j++) {
2073 qp_ptr = vme_context->qp_per_mb + (j * width_in_mbs) + param_regions[i].col_start_in_mb;
2074 memset(qp_ptr, param_regions[i].roi_qp, param_regions[i].width_mbs);
2082 intel_h264_enc_roi_config(VADriverContextP ctx,
2083 struct encode_state *encode_state,
2084 struct intel_encoder_context *encoder_context)
2088 struct i965_driver_data *i965 = i965_driver_data(ctx);
2089 struct gen6_vme_context *vme_context = encoder_context->vme_context;
2090 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
2091 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
2092 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
2093 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
2095 int row_start, row_end, col_start, col_end;
2098 vme_context->roi_enabled = 0;
2099 /* Restriction: Disable ROI when multi-slice is enabled */
2100 if (!encoder_context->context_roi || (encode_state->num_slice_params_ext > 1))
2103 vme_context->roi_enabled = !!encoder_context->brc.num_roi;
2105 if (!vme_context->roi_enabled)
2108 if ((vme_context->saved_width_mbs != width_in_mbs) ||
2109 (vme_context->saved_height_mbs != height_in_mbs)) {
2110 free(vme_context->qp_per_mb);
2111 vme_context->qp_per_mb = calloc(1, width_in_mbs * height_in_mbs);
2113 vme_context->saved_width_mbs = width_in_mbs;
2114 vme_context->saved_height_mbs = height_in_mbs;
2115 assert(vme_context->qp_per_mb);
2117 if (encoder_context->rate_control_mode == VA_RC_CBR) {
2119 * TODO: More complex Qp adjust needs to be added.
2120 * Currently it is initialized to slice_qp.
2122 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
2124 int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
2126 qp = mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][slice_type];
2127 intel_h264_enc_roi_cbr(ctx, qp, encode_state, encoder_context);
2129 } else if (encoder_context->rate_control_mode == VA_RC_CQP) {
2130 VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
2131 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
2133 int min_qp = MAX(1, encoder_context->brc.min_qp);
2135 qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
2136 memset(vme_context->qp_per_mb, qp, width_in_mbs * height_in_mbs);
2139 for (j = num_roi; j ; j--) {
2140 int qp_delta, qp_clip;
2142 col_start = encoder_context->brc.roi[i].left;
2143 col_end = encoder_context->brc.roi[i].right;
2144 row_start = encoder_context->brc.roi[i].top;
2145 row_end = encoder_context->brc.roi[i].bottom;
2147 col_start = col_start / 16;
2148 col_end = (col_end + 15) / 16;
2149 row_start = row_start / 16;
2150 row_end = (row_end + 15) / 16;
2152 qp_delta = encoder_context->brc.roi[i].value;
2153 qp_clip = qp + qp_delta;
2155 BRC_CLIP(qp_clip, min_qp, 51);
2157 for (i = row_start; i < row_end; i++) {
2158 qp_ptr = vme_context->qp_per_mb + (i * width_in_mbs) + col_start;
2159 memset(qp_ptr, qp_clip, (col_end - col_start));
2164 * TODO: Disable it for non CBR-CQP.
2166 vme_context->roi_enabled = 0;
2169 if (vme_context->roi_enabled && IS_GEN7(i965->intel.device_info))
2170 encoder_context->soft_batch_force = 1;
2177 hevc_temporal_find_surface(VAPictureHEVC *curr_pic,
2178 VAPictureHEVC *ref_list,
2182 int i, found = -1, min = 0x7FFFFFFF;
2184 for (i = 0; i < num_pictures; i++) {
2187 if ((ref_list[i].flags & VA_PICTURE_HEVC_INVALID) ||
2188 (ref_list[i].picture_id == VA_INVALID_SURFACE))
2191 tmp = curr_pic->pic_order_cnt - ref_list[i].pic_order_cnt;
2196 if (tmp > 0 && tmp < min) {
2205 intel_hevc_vme_reference_state(VADriverContextP ctx,
2206 struct encode_state *encode_state,
2207 struct intel_encoder_context *encoder_context,
2210 void (* vme_source_surface_state)(
2211 VADriverContextP ctx,
2213 struct object_surface *obj_surface,
2214 struct intel_encoder_context *encoder_context))
2216 struct gen6_vme_context *vme_context = encoder_context->vme_context;
2217 struct object_surface *obj_surface = NULL;
2218 struct i965_driver_data *i965 = i965_driver_data(ctx);
2219 VASurfaceID ref_surface_id;
2220 VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer;
2221 VAEncPictureParameterBufferHEVC *pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer;
2222 VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer;
2223 int max_num_references;
2224 VAPictureHEVC *curr_pic;
2225 VAPictureHEVC *ref_list;
2227 unsigned int is_hevc10 = 0;
2228 GenHevcSurface *hevc_encoder_surface = NULL;
2230 if ((pSequenceParameter->seq_fields.bits.bit_depth_luma_minus8 > 0)
2231 || (pSequenceParameter->seq_fields.bits.bit_depth_chroma_minus8 > 0))
2234 if (list_index == 0) {
2235 max_num_references = pic_param->num_ref_idx_l0_default_active_minus1 + 1;
2236 ref_list = slice_param->ref_pic_list0;
2238 max_num_references = pic_param->num_ref_idx_l1_default_active_minus1 + 1;
2239 ref_list = slice_param->ref_pic_list1;
2242 if (max_num_references == 1) {
2243 if (list_index == 0) {
2244 ref_surface_id = slice_param->ref_pic_list0[0].picture_id;
2245 vme_context->used_references[0] = &slice_param->ref_pic_list0[0];
2247 ref_surface_id = slice_param->ref_pic_list1[0].picture_id;
2248 vme_context->used_references[1] = &slice_param->ref_pic_list1[0];
2251 if (ref_surface_id != VA_INVALID_SURFACE)
2252 obj_surface = SURFACE(ref_surface_id);
2256 obj_surface = encode_state->reference_objects[list_index];
2257 vme_context->used_references[list_index] = &pic_param->reference_frames[list_index];
2262 curr_pic = &pic_param->decoded_curr_pic;
2264 /* select the reference frame in temporal space */
2265 ref_idx = hevc_temporal_find_surface(curr_pic, ref_list, max_num_references, list_index == 1);
2266 ref_surface_id = ref_list[ref_idx].picture_id;
2268 if (ref_surface_id != VA_INVALID_SURFACE) /* otherwise warning later */
2269 obj_surface = SURFACE(ref_surface_id);
2271 vme_context->used_reference_objects[list_index] = obj_surface;
2272 vme_context->used_references[list_index] = &ref_list[ref_idx];
2277 assert(ref_idx >= 0);
2278 vme_context->used_reference_objects[list_index] = obj_surface;
2281 hevc_encoder_surface = (GenHevcSurface *) obj_surface->private_data;
2282 assert(hevc_encoder_surface);
2283 obj_surface = hevc_encoder_surface->nv12_surface_obj;
2285 vme_source_surface_state(ctx, surface_index, obj_surface, encoder_context);
2286 vme_context->ref_index_in_mb[list_index] = (ref_idx << 24 |
2291 vme_context->used_reference_objects[list_index] = NULL;
2292 vme_context->used_references[list_index] = NULL;
2293 vme_context->ref_index_in_mb[list_index] = 0;
2297 void intel_vme_hevc_update_mbmv_cost(VADriverContextP ctx,
2298 struct encode_state *encode_state,
2299 struct intel_encoder_context *encoder_context)
2301 struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context;
2302 struct gen6_vme_context *vme_context = encoder_context->vme_context;
2303 VAEncPictureParameterBufferHEVC *pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer;
2304 VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer;
2305 VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer;
2306 int qp, m_cost, j, mv_count;
2307 uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message);
2308 float lambda, m_costf;
2310 /* here no SI SP slice for HEVC, do not need slice fixup */
2311 int slice_type = slice_param->slice_type;
2314 qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
2316 if (encoder_context->rate_control_mode == VA_RC_CBR) {
2317 qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
2318 if (slice_type == HEVC_SLICE_B) {
2319 if (pSequenceParameter->ip_period == 1) {
2320 slice_type = HEVC_SLICE_P;
2321 qp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY;
2323 } else if (mfc_context->vui_hrd.i_frame_number % pSequenceParameter->ip_period == 1) {
2324 slice_type = HEVC_SLICE_P;
2325 qp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY;
2331 if (vme_state_message == NULL)
2334 assert(qp <= QP_MAX);
2335 lambda = intel_lambda_qp(qp);
2336 if (slice_type == HEVC_SLICE_I) {
2337 vme_state_message[MODE_INTRA_16X16] = 0;
2338 m_cost = lambda * 4;
2339 vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f);
2340 m_cost = lambda * 16;
2341 vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
2342 m_cost = lambda * 3;
2343 vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
2346 vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f);
2347 for (j = 1; j < 3; j++) {
2348 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
2349 m_cost = (int)m_costf;
2350 vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f);
2353 for (j = 4; j <= 64; j *= 2) {
2354 m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
2355 m_cost = (int)m_costf;
2356 vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f);
2361 vme_state_message[MODE_INTRA_16X16] = 0x4a;
2362 vme_state_message[MODE_INTRA_8X8] = 0x4a;
2363 vme_state_message[MODE_INTRA_4X4] = 0x4a;
2364 vme_state_message[MODE_INTRA_NONPRED] = 0x4a;
2365 vme_state_message[MODE_INTER_16X16] = 0x4a;
2366 vme_state_message[MODE_INTER_16X8] = 0x4a;
2367 vme_state_message[MODE_INTER_8X8] = 0x4a;
2368 vme_state_message[MODE_INTER_8X4] = 0x4a;
2369 vme_state_message[MODE_INTER_4X4] = 0x4a;
2370 vme_state_message[MODE_INTER_BWD] = 0x2a;
2373 m_costf = lambda * 10;
2374 vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f);
2375 m_cost = lambda * 14;
2376 vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f);
2377 m_cost = lambda * 24;
2378 vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
2379 m_costf = lambda * 3.5;
2381 vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
2382 if (slice_type == HEVC_SLICE_P) {
2383 m_costf = lambda * 2.5;
2385 vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
2386 m_costf = lambda * 4;
2388 vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
2389 m_costf = lambda * 1.5;
2391 vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
2392 m_costf = lambda * 3;
2394 vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f);
2395 m_costf = lambda * 5;
2397 vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
2398 /* BWD is not used in P-frame */
2399 vme_state_message[MODE_INTER_BWD] = 0;
2401 m_costf = lambda * 2.5;
2403 vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
2404 m_costf = lambda * 5.5;
2406 vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
2407 m_costf = lambda * 3.5;
2409 vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
2410 m_costf = lambda * 5.0;
2412 vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f);
2413 m_costf = lambda * 6.5;
2415 vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
2416 m_costf = lambda * 1.5;
2418 vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f);