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Restrict the max MV number in MV prediction
[android-x86/hardware-intel-common-vaapi.git] / src / gen6_vme.h
1 /*
2  * Copyright © 2009 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWAR
23  *
24  * Authors:
25  *    Zhou Chang <chang.zhou@intel.com>
26  *
27  */
28
29 #ifndef _GEN6_VME_H_
30 #define _GEN6_VME_H_
31
32 #include <xf86drm.h>
33 #include <drm.h>
34 #include <i915_drm.h>
35 #include <intel_bufmgr.h>
36
37 #include "i965_gpe_utils.h"
38
39 #define INTRA_VME_OUTPUT_IN_BYTES       16      /* in bytes */
40 #define INTRA_VME_OUTPUT_IN_DWS         (INTRA_VME_OUTPUT_IN_BYTES / 4)
41 #define INTER_VME_OUTPUT_IN_BYTES       160     /* the first 128 bytes for MVs and the last 32 bytes for other info */
42 #define INTER_VME_OUTPUT_IN_DWS         (INTER_VME_OUTPUT_IN_BYTES / 4)
43
44 #define MAX_INTERFACE_DESC_GEN6      MAX_GPE_KERNELS
45 #define MAX_MEDIA_SURFACES_GEN6      34
46
47 #define GEN6_VME_KERNEL_NUMBER          3
48
49 struct encode_state;
50 struct intel_encoder_context;
51
52 struct gen6_vme_context
53 {
54     struct i965_gpe_context gpe_context;
55
56     struct {
57         dri_bo *bo;
58     } vme_state;
59
60     struct i965_buffer_surface vme_output;
61     struct i965_buffer_surface vme_batchbuffer;
62
63
64     void (*vme_surface2_setup)(VADriverContextP ctx,
65                                 struct i965_gpe_context *gpe_context,
66                                 struct object_surface *obj_surface,
67                                 unsigned long binding_table_offset,
68                                 unsigned long surface_state_offset);
69     void (*vme_media_rw_surface_setup)(VADriverContextP ctx,
70                                             struct i965_gpe_context *gpe_context,
71                                             struct object_surface *obj_surface,
72                                             unsigned long binding_table_offset,
73                                             unsigned long surface_state_offset);
74     void (*vme_buffer_suface_setup)(VADriverContextP ctx,
75                                     struct i965_gpe_context *gpe_context,
76                                     struct i965_buffer_surface *buffer_surface,
77                                     unsigned long binding_table_offset,
78                                     unsigned long surface_state_offset);
79     void (*vme_media_chroma_surface_setup)(VADriverContextP ctx,
80                                             struct i965_gpe_context *gpe_context,
81                                             struct object_surface *obj_surface,
82                                             unsigned long binding_table_offset,
83                                             unsigned long surface_state_offset);
84     void *vme_state_message;
85     unsigned int h264_level;
86 };
87
88 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
89 #endif /* _GEN6_VME_H_ */