2 * Copyright © 2010-2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Zhao Yakui <yakui.zhao@intel.com>
35 #include "intel_batchbuffer.h"
36 #include "intel_driver.h"
38 #include "i965_defines.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
43 #ifdef SURFACE_STATE_PADDED_SIZE
44 #undef SURFACE_STATE_PADDED_SIZE
47 #define VME_MSG_LENGTH 32
49 #define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN7
50 #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index)
51 #define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
53 #define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */
54 #define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
55 #define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
57 enum VIDEO_CODING_TYPE{
63 enum AVC_VME_KERNEL_TYPE{
64 AVC_VME_INTRA_SHADER = 0,
67 AVC_VME_BINTER_SHADER,
71 enum MPEG2_VME_KERNEL_TYPE{
72 MPEG2_VME_INTER_SHADER = 0,
73 MPEG2_VME_BATCHBUFFER,
78 static const uint32_t gen7_vme_intra_frame[][4] = {
79 #include "shaders/vme/intra_frame_ivb.g7b"
82 static const uint32_t gen7_vme_inter_frame[][4] = {
83 #include "shaders/vme/inter_frame_ivb.g7b"
86 static const uint32_t gen7_vme_batchbuffer[][4] = {
87 #include "shaders/vme/batchbuffer.g7b"
90 static const uint32_t gen7_vme_binter_frame[][4] = {
91 #include "shaders/vme/inter_bframe_ivb.g7b"
94 static struct i965_kernel gen7_vme_kernels[] = {
96 "AVC VME Intra Frame",
97 AVC_VME_INTRA_SHADER, /*index*/
99 sizeof(gen7_vme_intra_frame),
103 "AVC VME inter Frame",
104 AVC_VME_INTER_SHADER,
105 gen7_vme_inter_frame,
106 sizeof(gen7_vme_inter_frame),
110 "AVC VME BATCHBUFFER",
112 gen7_vme_batchbuffer,
113 sizeof(gen7_vme_batchbuffer),
117 "AVC VME binter Frame",
118 AVC_VME_BINTER_SHADER,
119 gen7_vme_binter_frame,
120 sizeof(gen7_vme_binter_frame),
125 static const uint32_t gen7_vme_mpeg2_inter_frame[][4] = {
126 #include "shaders/vme/mpeg2_inter_ivb.g7b"
129 static const uint32_t gen7_vme_mpeg2_batchbuffer[][4] = {
130 #include "shaders/vme/batchbuffer.g7b"
133 static struct i965_kernel gen7_vme_mpeg2_kernels[] = {
135 "MPEG2 VME inter Frame",
136 MPEG2_VME_INTER_SHADER,
137 gen7_vme_mpeg2_inter_frame,
138 sizeof(gen7_vme_mpeg2_inter_frame),
142 "MPEG2 VME BATCHBUFFER",
143 MPEG2_VME_BATCHBUFFER,
144 gen7_vme_mpeg2_batchbuffer,
145 sizeof(gen7_vme_mpeg2_batchbuffer),
150 /* only used for VME source surface state */
152 gen7_vme_source_surface_state(VADriverContextP ctx,
154 struct object_surface *obj_surface,
155 struct intel_encoder_context *encoder_context)
157 struct gen6_vme_context *vme_context = encoder_context->vme_context;
159 vme_context->vme_surface2_setup(ctx,
160 &vme_context->gpe_context,
162 BINDING_TABLE_OFFSET(index),
163 SURFACE_STATE_OFFSET(index));
167 gen7_vme_media_source_surface_state(VADriverContextP ctx,
169 struct object_surface *obj_surface,
170 struct intel_encoder_context *encoder_context)
172 struct gen6_vme_context *vme_context = encoder_context->vme_context;
174 vme_context->vme_media_rw_surface_setup(ctx,
175 &vme_context->gpe_context,
177 BINDING_TABLE_OFFSET(index),
178 SURFACE_STATE_OFFSET(index));
182 gen7_vme_output_buffer_setup(VADriverContextP ctx,
183 struct encode_state *encode_state,
185 struct intel_encoder_context *encoder_context)
188 struct i965_driver_data *i965 = i965_driver_data(ctx);
189 struct gen6_vme_context *vme_context = encoder_context->vme_context;
190 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
191 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
192 int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
193 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
194 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
196 vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
197 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
200 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES;
202 vme_context->vme_output.size_block = INTER_VME_OUTPUT_IN_BYTES;
204 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
206 vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
208 assert(vme_context->vme_output.bo);
209 vme_context->vme_buffer_suface_setup(ctx,
210 &vme_context->gpe_context,
211 &vme_context->vme_output,
212 BINDING_TABLE_OFFSET(index),
213 SURFACE_STATE_OFFSET(index));
217 gen7_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
218 struct encode_state *encode_state,
220 struct intel_encoder_context *encoder_context)
223 struct i965_driver_data *i965 = i965_driver_data(ctx);
224 struct gen6_vme_context *vme_context = encoder_context->vme_context;
225 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
226 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
227 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
229 vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
230 vme_context->vme_batchbuffer.size_block = 32; /* 2 OWORDs */
231 vme_context->vme_batchbuffer.pitch = 16;
232 vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
234 vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
236 vme_context->vme_buffer_suface_setup(ctx,
237 &vme_context->gpe_context,
238 &vme_context->vme_batchbuffer,
239 BINDING_TABLE_OFFSET(index),
240 SURFACE_STATE_OFFSET(index));
244 gen7_vme_surface_setup(VADriverContextP ctx,
245 struct encode_state *encode_state,
247 struct intel_encoder_context *encoder_context)
249 struct object_surface *obj_surface;
251 /*Setup surfaces state*/
252 /* current picture for encoding */
253 obj_surface = encode_state->input_yuv_object;
254 gen7_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
255 gen7_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
258 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
261 slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
262 assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI);
264 intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen7_vme_source_surface_state);
266 if (slice_type == SLICE_TYPE_B)
267 intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen7_vme_source_surface_state);
271 gen7_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
272 gen7_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
274 return VA_STATUS_SUCCESS;
277 static VAStatus gen7_vme_interface_setup(VADriverContextP ctx,
278 struct encode_state *encode_state,
279 struct intel_encoder_context *encoder_context)
281 struct gen6_vme_context *vme_context = encoder_context->vme_context;
282 struct gen6_interface_descriptor_data *desc;
286 bo = vme_context->gpe_context.idrt.bo;
291 for (i = 0; i < vme_context->vme_kernel_sum; i++) {
292 struct i965_kernel *kernel;
293 kernel = &vme_context->gpe_context.kernels[i];
294 assert(sizeof(*desc) == 32);
295 /*Setup the descritor table*/
296 memset(desc, 0, sizeof(*desc));
297 desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
298 desc->desc2.sampler_count = 1; /* FIXME: */
299 desc->desc2.sampler_state_pointer = (vme_context->vme_state.bo->offset >> 5);
300 desc->desc3.binding_table_entry_count = 1; /* FIXME: */
301 desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
302 desc->desc4.constant_urb_entry_read_offset = 0;
303 desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
306 dri_bo_emit_reloc(bo,
307 I915_GEM_DOMAIN_INSTRUCTION, 0,
309 i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
311 /*Sampler State(VME state pointer)*/
312 dri_bo_emit_reloc(bo,
313 I915_GEM_DOMAIN_INSTRUCTION, 0,
315 i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc2),
316 vme_context->vme_state.bo);
321 return VA_STATUS_SUCCESS;
324 static VAStatus gen7_vme_constant_setup(VADriverContextP ctx,
325 struct encode_state *encode_state,
326 struct intel_encoder_context *encoder_context)
328 struct gen6_vme_context *vme_context = encoder_context->vme_context;
329 unsigned char *constant_buffer;
330 unsigned int *vme_state_message;
333 vme_state_message = (unsigned int *)vme_context->vme_state_message;
336 if (encoder_context->codec == CODEC_H264) {
337 if (vme_context->h264_level >= 30) {
340 if (vme_context->h264_level >= 31)
343 } else if (encoder_context->codec == CODEC_MPEG2) {
348 vme_state_message[31] = mv_num;
350 dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
351 assert(vme_context->gpe_context.curbe.bo->virtual);
352 constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
354 /* Pass the required constant info into the constant buffer */
355 memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
357 dri_bo_unmap( vme_context->gpe_context.curbe.bo);
359 return VA_STATUS_SUCCESS;
363 static VAStatus gen7_vme_avc_state_setup(VADriverContextP ctx,
364 struct encode_state *encode_state,
366 struct intel_encoder_context *encoder_context)
368 struct gen6_vme_context *vme_context = encoder_context->vme_context;
369 unsigned int *vme_state_message;
370 unsigned int *mb_cost_table;
372 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
373 unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY);
375 mb_cost_table = (unsigned int *)vme_context->vme_state_message;
376 //building VME state message
377 dri_bo_map(vme_context->vme_state.bo, 1);
378 assert(vme_context->vme_state.bo->virtual);
379 vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual;
381 if (((slice_param->slice_type == SLICE_TYPE_P) ||
382 (slice_param->slice_type == SLICE_TYPE_SP) &&
384 vme_state_message[0] = 0x01010101;
385 vme_state_message[1] = 0x10010101;
386 vme_state_message[2] = 0x0F0F0F0F;
387 vme_state_message[3] = 0x100F0F0F;
388 vme_state_message[4] = 0x01010101;
389 vme_state_message[5] = 0x10010101;
390 vme_state_message[6] = 0x0F0F0F0F;
391 vme_state_message[7] = 0x100F0F0F;
392 vme_state_message[8] = 0x01010101;
393 vme_state_message[9] = 0x10010101;
394 vme_state_message[10] = 0x0F0F0F0F;
395 vme_state_message[11] = 0x000F0F0F;
396 vme_state_message[12] = 0x00;
397 vme_state_message[13] = 0x00;
399 vme_state_message[0] = 0x10010101;
400 vme_state_message[1] = 0x100F0F0F;
401 vme_state_message[2] = 0x10010101;
402 vme_state_message[3] = 0x000F0F0F;
403 vme_state_message[4] = 0;
404 vme_state_message[5] = 0;
405 vme_state_message[6] = 0;
406 vme_state_message[7] = 0;
407 vme_state_message[8] = 0;
408 vme_state_message[9] = 0;
409 vme_state_message[10] = 0;
410 vme_state_message[11] = 0;
411 vme_state_message[12] = 0;
412 vme_state_message[13] = 0;
415 vme_state_message[14] = (mb_cost_table[2] & 0xFFFF);
416 vme_state_message[15] = 0;
417 vme_state_message[16] = mb_cost_table[0];
418 vme_state_message[17] = mb_cost_table[1];
419 vme_state_message[18] = mb_cost_table[3];
420 vme_state_message[19] = mb_cost_table[4];
422 for(i = 20; i < 32; i++) {
423 vme_state_message[i] = 0;
426 dri_bo_unmap( vme_context->vme_state.bo);
427 return VA_STATUS_SUCCESS;
430 static VAStatus gen7_vme_mpeg2_state_setup(VADriverContextP ctx,
431 struct encode_state *encode_state,
433 struct intel_encoder_context *encoder_context)
435 struct gen6_vme_context *vme_context = encoder_context->vme_context;
436 unsigned int *vme_state_message;
438 unsigned int *mb_cost_table;
440 mb_cost_table = (unsigned int *)vme_context->vme_state_message;
442 //building VME state message
443 dri_bo_map(vme_context->vme_state.bo, 1);
444 assert(vme_context->vme_state.bo->virtual);
445 vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual;
447 vme_state_message[0] = 0x01010101;
448 vme_state_message[1] = 0x10010101;
449 vme_state_message[2] = 0x0F0F0F0F;
450 vme_state_message[3] = 0x100F0F0F;
451 vme_state_message[4] = 0x01010101;
452 vme_state_message[5] = 0x10010101;
453 vme_state_message[6] = 0x0F0F0F0F;
454 vme_state_message[7] = 0x100F0F0F;
455 vme_state_message[8] = 0x01010101;
456 vme_state_message[9] = 0x10010101;
457 vme_state_message[10] = 0x0F0F0F0F;
458 vme_state_message[11] = 0x000F0F0F;
459 vme_state_message[12] = 0x00;
460 vme_state_message[13] = 0x00;
462 vme_state_message[14] = (mb_cost_table[2] & 0xFFFF);
463 vme_state_message[15] = 0;
464 vme_state_message[16] = mb_cost_table[0];
465 vme_state_message[17] = 0;
466 vme_state_message[18] = mb_cost_table[3];
467 vme_state_message[19] = mb_cost_table[4];
469 for(i = 20; i < 32; i++) {
470 vme_state_message[i] = 0;
472 //vme_state_message[16] = 0x42424242; //cost function LUT set 0 for Intra
474 dri_bo_unmap( vme_context->vme_state.bo);
475 return VA_STATUS_SUCCESS;
479 gen7_vme_fill_vme_batchbuffer(VADriverContextP ctx,
480 struct encode_state *encode_state,
481 int mb_width, int mb_height,
483 int transform_8x8_mode_flag,
484 struct intel_encoder_context *encoder_context)
486 struct gen6_vme_context *vme_context = encoder_context->vme_context;
487 int mb_x = 0, mb_y = 0;
489 unsigned int *command_ptr;
492 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
493 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
495 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
496 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
498 for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
499 int slice_mb_begin = slice_param->macroblock_address;
500 int slice_mb_number = slice_param->num_macroblocks;
501 unsigned int mb_intra_ub;
502 int slice_mb_x = slice_param->macroblock_address % mb_width;
504 for (i = 0; i < slice_mb_number;) {
505 int mb_count = i + slice_mb_begin;
507 mb_x = mb_count % mb_width;
508 mb_y = mb_count / mb_width;
512 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
516 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
519 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
521 if (mb_x != (mb_width -1))
522 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
527 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
529 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
531 if ((i == (mb_width - 1)) && slice_mb_x) {
532 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
536 if ((i == mb_width) && slice_mb_x) {
537 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
540 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
541 *command_ptr++ = kernel;
548 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
549 *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
559 *command_ptr++ = MI_BATCH_BUFFER_END;
561 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
565 static void gen7_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
567 struct i965_driver_data *i965 = i965_driver_data(ctx);
568 struct gen6_vme_context *vme_context = encoder_context->vme_context;
571 i965_gpe_context_init(ctx, &vme_context->gpe_context);
573 /* VME output buffer */
574 dri_bo_unreference(vme_context->vme_output.bo);
575 vme_context->vme_output.bo = NULL;
577 dri_bo_unreference(vme_context->vme_batchbuffer.bo);
578 vme_context->vme_batchbuffer.bo = NULL;
581 dri_bo_unreference(vme_context->vme_state.bo);
582 bo = dri_bo_alloc(i965->intel.bufmgr,
586 vme_context->vme_state.bo = bo;
589 static void gen7_vme_pipeline_programing(VADriverContextP ctx,
590 struct encode_state *encode_state,
591 struct intel_encoder_context *encoder_context)
593 struct gen6_vme_context *vme_context = encoder_context->vme_context;
594 struct intel_batchbuffer *batch = encoder_context->base.batch;
595 VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
596 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
597 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
598 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
599 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
601 bool allow_hwscore = true;
603 unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY);
606 allow_hwscore = false;
608 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
609 pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
610 if ((pSliceParameter->macroblock_address % width_in_mbs)) {
611 allow_hwscore = false;
617 if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
618 (pSliceParameter->slice_type == SLICE_TYPE_SI)) {
619 kernel_shader = AVC_VME_INTRA_SHADER;
620 } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
621 (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
622 kernel_shader = AVC_VME_INTER_SHADER;
624 kernel_shader = AVC_VME_BINTER_SHADER;
626 kernel_shader = AVC_VME_INTER_SHADER;
630 gen7_vme_walker_fill_vme_batchbuffer(ctx,
632 width_in_mbs, height_in_mbs,
634 pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
638 gen7_vme_fill_vme_batchbuffer(ctx,
640 width_in_mbs, height_in_mbs,
642 pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
645 intel_batchbuffer_start_atomic(batch, 0x1000);
646 gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
647 BEGIN_BATCH(batch, 2);
648 OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8));
650 vme_context->vme_batchbuffer.bo,
651 I915_GEM_DOMAIN_COMMAND, 0,
653 ADVANCE_BATCH(batch);
655 intel_batchbuffer_end_atomic(batch);
658 static VAStatus gen7_vme_prepare(VADriverContextP ctx,
659 struct encode_state *encode_state,
660 struct intel_encoder_context *encoder_context)
662 VAStatus vaStatus = VA_STATUS_SUCCESS;
663 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
664 int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
665 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
666 struct gen6_vme_context *vme_context = encoder_context->vme_context;
668 if (!vme_context->h264_level ||
669 (vme_context->h264_level != pSequenceParameter->level_idc)) {
670 vme_context->h264_level = pSequenceParameter->level_idc;
673 intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
674 /*Setup all the memory object*/
675 gen7_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
676 gen7_vme_interface_setup(ctx, encode_state, encoder_context);
677 gen7_vme_constant_setup(ctx, encode_state, encoder_context);
678 gen7_vme_avc_state_setup(ctx, encode_state, is_intra, encoder_context);
680 /*Programing media pipeline*/
681 gen7_vme_pipeline_programing(ctx, encode_state, encoder_context);
686 static VAStatus gen7_vme_run(VADriverContextP ctx,
687 struct encode_state *encode_state,
688 struct intel_encoder_context *encoder_context)
690 struct intel_batchbuffer *batch = encoder_context->base.batch;
692 intel_batchbuffer_flush(batch);
694 return VA_STATUS_SUCCESS;
697 static VAStatus gen7_vme_stop(VADriverContextP ctx,
698 struct encode_state *encode_state,
699 struct intel_encoder_context *encoder_context)
701 return VA_STATUS_SUCCESS;
705 gen7_vme_pipeline(VADriverContextP ctx,
707 struct encode_state *encode_state,
708 struct intel_encoder_context *encoder_context)
710 gen7_vme_media_init(ctx, encoder_context);
711 gen7_vme_prepare(ctx, encode_state, encoder_context);
712 gen7_vme_run(ctx, encode_state, encoder_context);
713 gen7_vme_stop(ctx, encode_state, encoder_context);
715 return VA_STATUS_SUCCESS;
719 gen7_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
720 struct encode_state *encode_state,
723 struct intel_encoder_context *encoder_context)
726 struct i965_driver_data *i965 = i965_driver_data(ctx);
727 struct gen6_vme_context *vme_context = encoder_context->vme_context;
728 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
729 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
730 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
732 vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
733 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
736 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES;
738 vme_context->vme_output.size_block = INTER_VME_OUTPUT_IN_BYTES;
740 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
742 vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
744 assert(vme_context->vme_output.bo);
745 vme_context->vme_buffer_suface_setup(ctx,
746 &vme_context->gpe_context,
747 &vme_context->vme_output,
748 BINDING_TABLE_OFFSET(index),
749 SURFACE_STATE_OFFSET(index));
753 gen7_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
754 struct encode_state *encode_state,
756 struct intel_encoder_context *encoder_context)
759 struct i965_driver_data *i965 = i965_driver_data(ctx);
760 struct gen6_vme_context *vme_context = encoder_context->vme_context;
761 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
762 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
763 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
765 vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
766 vme_context->vme_batchbuffer.size_block = 32; /* 4 OWORDs */
767 vme_context->vme_batchbuffer.pitch = 16;
768 vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
770 vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
772 vme_context->vme_buffer_suface_setup(ctx,
773 &vme_context->gpe_context,
774 &vme_context->vme_batchbuffer,
775 BINDING_TABLE_OFFSET(index),
776 SURFACE_STATE_OFFSET(index));
780 gen7_vme_mpeg2_surface_setup(VADriverContextP ctx,
781 struct encode_state *encode_state,
783 struct intel_encoder_context *encoder_context)
785 struct object_surface *obj_surface;
787 /*Setup surfaces state*/
788 /* current picture for encoding */
789 obj_surface = encode_state->input_yuv_object;
790 gen7_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
791 gen7_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
795 obj_surface = encode_state->reference_objects[0];
796 if (obj_surface->bo != NULL)
797 gen7_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
800 obj_surface = encode_state->reference_objects[1];
801 if (obj_surface && obj_surface->bo != NULL)
802 gen7_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
806 gen7_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
807 gen7_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
809 return VA_STATUS_SUCCESS;
813 gen7_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
814 struct encode_state *encode_state,
815 int mb_width, int mb_height,
817 int transform_8x8_mode_flag,
818 struct intel_encoder_context *encoder_context)
820 struct gen6_vme_context *vme_context = encoder_context->vme_context;
821 int mb_x = 0, mb_y = 0;
823 unsigned int *command_ptr;
825 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
826 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
828 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
829 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
831 for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
832 int slice_mb_begin = slice_param->macroblock_address;
833 int slice_mb_number = slice_param->num_macroblocks;
834 unsigned int mb_intra_ub;
836 for (i = 0; i < slice_mb_number;) {
837 int mb_count = i + slice_mb_begin;
839 mb_x = mb_count % mb_width;
840 mb_y = mb_count / mb_width;
844 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
848 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
851 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
853 if (mb_x != (mb_width -1))
854 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
859 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
860 *command_ptr++ = kernel;
867 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
868 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
878 *command_ptr++ = MI_BATCH_BUFFER_END;
880 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
884 gen7_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
885 struct encode_state *encode_state,
887 struct intel_encoder_context *encoder_context)
889 struct gen6_vme_context *vme_context = encoder_context->vme_context;
890 struct intel_batchbuffer *batch = encoder_context->base.batch;
891 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
892 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
893 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
895 bool allow_hwscore = true;
898 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
900 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
902 for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
903 if (slice_param->macroblock_address % width_in_mbs) {
904 allow_hwscore = false;
911 gen7_vme_mpeg2_walker_fill_vme_batchbuffer(ctx,
913 width_in_mbs, height_in_mbs,
914 MPEG2_VME_INTER_SHADER,
917 gen7_vme_mpeg2_fill_vme_batchbuffer(ctx,
919 width_in_mbs, height_in_mbs,
920 MPEG2_VME_INTER_SHADER,
924 intel_batchbuffer_start_atomic(batch, 0x1000);
925 gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
926 BEGIN_BATCH(batch, 2);
927 OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8));
929 vme_context->vme_batchbuffer.bo,
930 I915_GEM_DOMAIN_COMMAND, 0,
932 ADVANCE_BATCH(batch);
934 intel_batchbuffer_end_atomic(batch);
938 gen7_vme_mpeg2_prepare(VADriverContextP ctx,
939 struct encode_state *encode_state,
940 struct intel_encoder_context *encoder_context)
942 VAStatus vaStatus = VA_STATUS_SUCCESS;
943 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
944 struct gen6_vme_context *vme_context = encoder_context->vme_context;
946 if ((!vme_context->mpeg2_level) ||
947 (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) {
948 vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK;
951 /*Setup all the memory object*/
953 intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context);
954 gen7_vme_mpeg2_surface_setup(ctx, encode_state, 0, encoder_context);
955 gen7_vme_interface_setup(ctx, encode_state, encoder_context);
956 gen7_vme_constant_setup(ctx, encode_state, encoder_context);
957 gen7_vme_mpeg2_state_setup(ctx, encode_state, 0, encoder_context);
959 /*Programing media pipeline*/
960 gen7_vme_mpeg2_pipeline_programing(ctx, encode_state, 0, encoder_context);
966 gen7_vme_mpeg2_pipeline(VADriverContextP ctx,
968 struct encode_state *encode_state,
969 struct intel_encoder_context *encoder_context)
971 struct i965_driver_data *i965 = i965_driver_data(ctx);
972 struct gen6_vme_context *vme_context = encoder_context->vme_context;
973 VAEncSliceParameterBufferMPEG2 *slice_param =
974 (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
975 VAEncSequenceParameterBufferMPEG2 *seq_param =
976 (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
978 /*No need of to exec VME for Intra slice */
979 if (slice_param->is_intra_slice) {
980 if(!vme_context->vme_output.bo) {
981 int w_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
982 int h_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
984 vme_context->vme_output.num_blocks = w_in_mbs * h_in_mbs;
985 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
986 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES;
987 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
988 "MPEG2 VME output buffer",
989 vme_context->vme_output.num_blocks
990 * vme_context->vme_output.size_block,
994 return VA_STATUS_SUCCESS;
997 gen7_vme_media_init(ctx, encoder_context);
998 gen7_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
999 gen7_vme_run(ctx, encode_state, encoder_context);
1000 gen7_vme_stop(ctx, encode_state, encoder_context);
1002 return VA_STATUS_SUCCESS;
1006 gen7_vme_context_destroy(void *context)
1008 struct gen6_vme_context *vme_context = context;
1010 i965_gpe_context_destroy(&vme_context->gpe_context);
1012 dri_bo_unreference(vme_context->vme_output.bo);
1013 vme_context->vme_output.bo = NULL;
1015 dri_bo_unreference(vme_context->vme_state.bo);
1016 vme_context->vme_state.bo = NULL;
1018 dri_bo_unreference(vme_context->vme_batchbuffer.bo);
1019 vme_context->vme_batchbuffer.bo = NULL;
1021 if (vme_context->vme_state_message) {
1022 free(vme_context->vme_state_message);
1023 vme_context->vme_state_message = NULL;
1029 Bool gen7_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
1031 struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
1032 struct i965_kernel *vme_kernel_list = NULL;
1034 assert(vme_context);
1035 vme_context->gpe_context.surface_state_binding_table.length =
1036 (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1038 vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1039 vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1040 vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1042 vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1043 vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1044 vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1045 vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1046 vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1048 gen7_vme_scoreboard_init(ctx, vme_context);
1050 if (encoder_context->codec == CODEC_H264) {
1051 vme_kernel_list = gen7_vme_kernels;
1052 vme_context->video_coding_type = VIDEO_CODING_AVC;
1053 vme_context->vme_kernel_sum = AVC_VME_KERNEL_SUM;
1054 encoder_context->vme_pipeline = gen7_vme_pipeline;
1055 } else if (encoder_context->codec == CODEC_MPEG2) {
1056 vme_kernel_list = gen7_vme_mpeg2_kernels;
1057 vme_context->video_coding_type = VIDEO_CODING_MPEG2;
1058 vme_context->vme_kernel_sum = MPEG2_VME_KERNEL_SUM;
1059 encoder_context->vme_pipeline = gen7_vme_mpeg2_pipeline;
1061 /* Unsupported codec */
1065 i965_gpe_load_kernels(ctx,
1066 &vme_context->gpe_context,
1068 vme_context->vme_kernel_sum);
1070 vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1071 vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1072 vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1074 encoder_context->vme_context = vme_context;
1075 encoder_context->vme_context_destroy = gen7_vme_context_destroy;
1076 vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));