2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * Zhao, Yakui <yakui.zhao@intel.com>
29 #ifndef GEN9_VP9_ENCODER_H
30 #define GEN9_VP9_ENCODER_H
34 #include <intel_bufmgr.h>
37 #include "i965_gpe_utils.h"
39 #include "vp9_probs.h"
42 struct intel_encoder_context;
47 #define INTEL_BRC_NONE 0
48 #define INTEL_BRC_CBR 1
49 #define INTEL_BRC_VBR 2
50 #define INTEL_BRC_CQP 3
52 typedef enum _VP9_MEDIA_STATE_TYPE {
53 VP9_MEDIA_STATE_ENC_I_FRAME_DIST = 0,
54 VP9_MEDIA_STATE_32X_SCALING ,
55 VP9_MEDIA_STATE_16X_SCALING ,
56 VP9_MEDIA_STATE_4X_SCALING ,
57 VP9_MEDIA_STATE_32X_ME ,
58 VP9_MEDIA_STATE_16X_ME ,
59 VP9_MEDIA_STATE_4X_ME ,
60 VP9_MEDIA_STATE_BRC_INIT_RESET ,
61 VP9_MEDIA_STATE_BRC_UPDATE ,
62 VP9_MEDIA_STATE_MBENC_I_32x32 ,
63 VP9_MEDIA_STATE_MBENC_I_16x16 ,
64 VP9_MEDIA_STATE_MBENC_P ,
65 VP9_MEDIA_STATE_MBENC_TX ,
68 } VP9_MEDIA_STATE_TYPE;
71 enum vp9_walker_degree {
77 struct vp9_encoder_kernel_parameter {
78 unsigned int curbe_size;
79 unsigned int inline_data_size;
80 unsigned int sampler_size;
83 struct vp9_encoder_scoreboard_parameter {
87 unsigned int walkpat_flag;
90 typedef enum _INTEL_VP9_ENC_OPERATION {
91 INTEL_VP9_ENC_SCALING4X = 0,
92 INTEL_VP9_ENC_SCALING2X,
97 } INTEL_VP9_ENC_OPERATION;
99 struct gen9_surface_vp9 {
100 VADriverContextP ctx;
101 VASurfaceID scaled_4x_surface_id;
102 struct object_surface *scaled_4x_surface_obj;
103 VASurfaceID scaled_16x_surface_id;
104 struct object_surface *scaled_16x_surface_obj;
106 VASurfaceID dys_surface_id;
107 struct object_surface *dys_surface_obj;
108 VASurfaceID dys_4x_surface_id;
109 struct object_surface *dys_4x_surface_obj;
110 VASurfaceID dys_16x_surface_id;
111 struct object_surface *dys_16x_surface_obj;
113 int dys_frame_height;
116 unsigned int qp_value;
117 uint8_t dys_hme_flag;
120 /* The definition for Scaling */
121 enum vp9_binding_table_offset_scaling {
122 VP9_BTI_SCALING_FRAME_SRC_Y = 0,
123 VP9_BTI_SCALING_FRAME_DST_Y = 1,
124 VP9_BTI_SCALING_FRAME_MBVPROCSTATS_DST_CM = 6,
125 VP9_BTI_SCALING_NUM_SURFACES = 8
129 typedef struct _vp9_scaling4x_curbe_data_cm {
131 uint32_t input_picture_width : 16;
132 uint32_t input_picture_height : 16;
136 uint32_t input_y_bti;
140 uint32_t output_y_bti;
156 uint32_t reserved0 : 1;
157 uint32_t enable_mb_variance_output : 1;
158 uint32_t enable_mb_pixel_average_output : 1;
159 uint32_t enable_blk8x8_stat_output : 1;
160 uint32_t reserved1 : 28;
176 uint32_t mbv_proc_stat_bti;
182 } vp9_scaling4x_curbe_data_cm;
184 typedef struct _vp9_scaling2x_curbe_data_cm {
186 uint32_t input_picture_width : 16;
187 uint32_t input_picture_height : 16;
191 uint32_t reserved1[7];
194 uint32_t input_y_bti;
198 uint32_t output_y_bti;
201 uint32_t reserved2[2];
202 } vp9_scaling2x_curbe_data_cm;
204 typedef struct _vp9_scaling4x_inline_data_cm {
206 uint32_t dstblk_hori_origin : 16;
207 uint32_t dstblk_vert_origin : 16;
211 uint32_t horiblk_compmask_layer0 : 16;
212 uint32_t vertblk_compmask_layer0 : 16;
216 uint32_t horiblk_compmask_layer1 : 16;
217 uint32_t vertblk_compmask_layer1 : 16;
221 uint32_t horiblk_compmask_layer2 : 16;
222 uint32_t vertblk_compmask_layer2 : 16;
226 float video_xscaling_step;
230 float video_step_delta;
235 uint32_t vert_blk_num : 17;
236 uint32_t area_interest : 1;
237 uint32_t reserved : 14;
245 uint32_t horiblk_compmask_layer3 : 16;
246 uint32_t vertblk_compmask_layer3 : 16;
250 uint32_t horiblk_compmask_layer4 : 16;
251 uint32_t vertblk_compmask_layer4 : 16;
255 uint32_t horiblk_compmask_layer5 : 16;
256 uint32_t vertblk_compmask_layer5 : 16;
260 uint32_t horiblk_compmask_layer6 : 16;
261 uint32_t vertblk_compmask_layer6 : 16;
265 uint32_t horiblk_compmask_layer7 : 16;
266 uint32_t vertblk_compmask_layer7 : 16;
280 } vp9_scaling4x_inline_data_cm;
282 #define VP9_SCALING_4X 0
283 #define VP9_SCALING_2X 1
284 #define NUM_VP9_SCALING 2
286 typedef struct _vp9_bti_scaling_offset {
287 uint32_t scaling_frame_src_y;
288 uint32_t scaling_frame_dst_y;
290 uint32_t scaling_frame_mbv_proc_stat_dst;
291 } vp9_bti_scaling_offset;
293 struct vp9_scaling_context {
294 struct i965_gpe_context gpe_contexts[NUM_VP9_SCALING];
295 vp9_bti_scaling_offset scaling_4x_bti;
296 vp9_bti_scaling_offset scaling_2x_bti;
299 struct gen9_search_path_delta {
300 char search_path_delta_x: 4;
301 char search_path_delta_y: 4;
304 struct vp9_binding_table_me {
305 uint32_t memv_data_surface_offset;
306 uint32_t memv16x_data_surface_offset;
307 uint32_t me_dist_offset;
308 uint32_t me_brc_dist_offset;
309 uint32_t me_curr_picl0_offset;
310 uint32_t me_curr_picl1_offset;
313 enum vp9_binding_table_offset_me {
314 VP9_BTI_ME_MV_DATA_SURFACE = 0,
315 VP9_BTI_16XME_MV_DATA_SURFACE = 1,
316 VP9_BTI_ME_DISTORTION_SURFACE = 2,
317 VP9_BTI_ME_BRC_DISTORTION_SURFACE = 3,
318 VP9_BTI_ME_CURR_PIC_L0 = 4,
319 VP9_BTI_ME_CURR_PIC_L1 = VP9_BTI_ME_CURR_PIC_L0 + 17,
320 VP9_BTI_ME_NUM_SURFACES = VP9_BTI_ME_CURR_PIC_L1 + 5
323 enum VP9_ENC_ME_MODES {
324 VP9_ENC_ME16X_BEFORE_ME4X = 0,
325 VP9_ENC_ME16X_ONLY = 1,
326 VP9_ENC_ME4X_ONLY = 2,
327 VP9_ENC_ME4X_AFTER_ME16X = 3
330 typedef struct _vp9_me_curbe_data {
332 uint32_t skip_mode_enable: 1;
333 uint32_t adaptive_enable: 1;
334 uint32_t bi_mix_dis: 1;
335 uint32_t reserved0: 2;
336 uint32_t early_ime_success_enable: 1;
337 uint32_t reserved1: 1;
338 uint32_t t8x8_flag_for_inter_enable: 1;
339 uint32_t reserved2: 16;
340 uint32_t early_ime_stop: 8;
344 uint32_t max_num_mvs: 6;
345 uint32_t reserved0: 10;
346 uint32_t bi_weight: 6;
347 uint32_t reserved1: 6;
348 uint32_t uni_mix_disable: 1;
349 uint32_t reserved2: 3;
353 uint32_t max_len_sp: 8;
354 uint32_t max_num_su: 8;
355 uint32_t reserved0: 16;
359 uint32_t src_size: 2;
360 uint32_t reserved0: 2;
361 uint32_t mb_type_remap: 2;
362 uint32_t src_Access: 1;
363 uint32_t ref_access: 1;
364 uint32_t search_ctrl: 3;
365 uint32_t dual_search_path_option: 1;
366 uint32_t sub_pel_mode: 2;
367 uint32_t skip_type: 1;
368 uint32_t disable_field_cache_allocation: 1;
369 uint32_t inter_chroma_mode: 1;
370 uint32_t ft_enable: 1;
371 uint32_t bme_disable_fbr: 1;
372 uint32_t block_based_skip_enable: 1;
373 uint32_t inter_sad: 2;
374 uint32_t intra_sad: 2;
375 uint32_t sub_mb_part_mask: 7;
376 uint32_t reserved1: 1;
380 uint32_t reserved0: 8;
381 uint32_t picture_height_minus1: 8;
382 uint32_t picture_width: 8;
383 uint32_t reserved1: 8;
387 uint32_t reserved0: 8;
388 uint32_t qp_prime_y: 8;
389 uint32_t ref_width: 8;
390 uint32_t ref_height: 8;
394 uint32_t reserved0: 3;
395 uint32_t write_distortions: 1;
396 uint32_t use_mv_from_prev_step: 1;
397 uint32_t reserved1: 3;
398 uint32_t super_combine_dist: 8;
399 uint32_t max_vmvr: 16;
403 uint32_t reserved0: 16;
404 uint32_t mv_cost_scale_factor: 2;
405 uint32_t bilinear_enable: 1;
406 uint32_t src_field_polarity: 1;
407 uint32_t weightedsad_harr: 1;
408 uint32_t ac_only_haar: 1;
409 uint32_t ref_id_cost_mode: 1;
410 uint32_t reserved1: 1;
411 uint32_t skip_center_mask: 8;
415 uint32_t mode_0_cost: 8;
416 uint32_t mode_1_cost: 8;
417 uint32_t mode_2_cost: 8;
418 uint32_t mode_3_cost: 8;
422 uint32_t mode_4_cost: 8;
423 uint32_t mode_5_cost: 8;
424 uint32_t mode_6_cost: 8;
425 uint32_t mode_7_cost: 8;
429 uint32_t mode_8_cost: 8;
430 uint32_t mode_9_cost: 8;
431 uint32_t ref_id_cost: 8;
432 uint32_t chroma_intra_mode_cost: 8;
436 uint32_t mv_0_cost: 8;
437 uint32_t mv_1_cost: 8;
438 uint32_t mv_2_cost: 8;
439 uint32_t mv_3_cost: 8;
443 uint32_t mv_4_cost: 8;
444 uint32_t mv_5_cost: 8;
445 uint32_t mv_6_cost: 8;
446 uint32_t mv_7_cost: 8;
450 uint32_t num_ref_idx_l0_minus1: 8;
451 uint32_t num_ref_idx_l1_minus1: 8;
452 uint32_t actual_mb_width: 8;
453 uint32_t actual_mb_height: 8;
457 uint32_t l0_ref_pic_polarity_bits: 8;
458 uint32_t l1_ref_pic_polarity_bits: 2;
459 uint32_t reserved: 22;
463 uint32_t prev_mv_read_pos_factor : 8;
464 uint32_t mv_shift_factor : 8;
465 uint32_t reserved: 16;
469 struct gen9_search_path_delta sp_delta_0;
470 struct gen9_search_path_delta sp_delta_1;
471 struct gen9_search_path_delta sp_delta_2;
472 struct gen9_search_path_delta sp_delta_3;
476 struct gen9_search_path_delta sp_delta_4;
477 struct gen9_search_path_delta sp_delta_5;
478 struct gen9_search_path_delta sp_delta_6;
479 struct gen9_search_path_delta sp_delta_7;
483 struct gen9_search_path_delta sp_delta_8;
484 struct gen9_search_path_delta sp_delta_9;
485 struct gen9_search_path_delta sp_delta_10;
486 struct gen9_search_path_delta sp_delta_11;
490 struct gen9_search_path_delta sp_delta_12;
491 struct gen9_search_path_delta sp_delta_13;
492 struct gen9_search_path_delta sp_delta_14;
493 struct gen9_search_path_delta sp_delta_15;
497 struct gen9_search_path_delta sp_delta_16;
498 struct gen9_search_path_delta sp_delta_17;
499 struct gen9_search_path_delta sp_delta_18;
500 struct gen9_search_path_delta sp_delta_19;
504 struct gen9_search_path_delta sp_delta_20;
505 struct gen9_search_path_delta sp_delta_21;
506 struct gen9_search_path_delta sp_delta_22;
507 struct gen9_search_path_delta sp_delta_23;
511 struct gen9_search_path_delta sp_delta_24;
512 struct gen9_search_path_delta sp_delta_25;
513 struct gen9_search_path_delta sp_delta_26;
514 struct gen9_search_path_delta sp_delta_27;
518 struct gen9_search_path_delta sp_delta_28;
519 struct gen9_search_path_delta sp_delta_29;
520 struct gen9_search_path_delta sp_delta_30;
521 struct gen9_search_path_delta sp_delta_31;
525 struct gen9_search_path_delta sp_delta_32;
526 struct gen9_search_path_delta sp_delta_33;
527 struct gen9_search_path_delta sp_delta_34;
528 struct gen9_search_path_delta sp_delta_35;
532 struct gen9_search_path_delta sp_delta_36;
533 struct gen9_search_path_delta sp_delta_37;
534 struct gen9_search_path_delta sp_delta_38;
535 struct gen9_search_path_delta sp_delta_39;
539 struct gen9_search_path_delta sp_delta_40;
540 struct gen9_search_path_delta sp_delta_41;
541 struct gen9_search_path_delta sp_delta_42;
542 struct gen9_search_path_delta sp_delta_43;
546 struct gen9_search_path_delta sp_delta_44;
547 struct gen9_search_path_delta sp_delta_45;
548 struct gen9_search_path_delta sp_delta_46;
549 struct gen9_search_path_delta sp_delta_47;
553 struct gen9_search_path_delta sp_delta_48;
554 struct gen9_search_path_delta sp_delta_49;
555 struct gen9_search_path_delta sp_delta_50;
556 struct gen9_search_path_delta sp_delta_51;
560 struct gen9_search_path_delta sp_delta_52;
561 struct gen9_search_path_delta sp_delta_53;
562 struct gen9_search_path_delta sp_delta_54;
563 struct gen9_search_path_delta sp_delta_55;
575 uint32_t _4x_memv_output_data_surf_index;
579 uint32_t _16x_32x_memv_input_data_surf_index;
583 uint32_t _4x_me_output_dist_surf_index;
587 uint32_t _4x_me_output_brc_dist_surf_index;
591 uint32_t vme_fwd_inter_pred_surf_index;
595 uint32_t vme_bdw_inter_pred_surf_index;
604 struct vp9_me_context {
605 struct i965_gpe_context gpe_context;
606 struct vp9_binding_table_me vp9_me_bti;
610 enum vp9_binding_table_offset_mbenc {
611 VP9_BTI_MBENC_CURR_Y_G9 = 0,
612 VP9_BTI_MBENC_CURR_UV_G9 = 1,
613 VP9_BTI_MBENC_CURR_NV12_G9 = 2,
614 VP9_BTI_MBENC_LAST_NV12_G9 = 3,
615 VP9_BTI_MBENC_GOLD_NV12_G9 = 5,
616 VP9_BTI_MBENC_ALTREF_NV12_G9 = 7,
617 VP9_BTI_MBENC_SEGMENTATION_MAP_G9 = 8,
618 VP9_BTI_MBENC_TX_CURBE_G9 = 9,
619 VP9_BTI_MBENC_HME_MV_DATA_G9 = 10,
620 VP9_BTI_MBENC_HME_DISTORTION_G9 = 11,
621 VP9_BTI_MBENC_MODE_DECISION_PREV_G9 = 12,
622 VP9_BTI_MBENC_MODE_DECISION_G9 = 13,
623 VP9_BTI_MBENC_OUT_16x16_INTER_MODES_G9 = 14,
624 VP9_BTI_MBENC_CU_RECORDS_G9 = 15,
625 VP9_BTI_MBENC_PAK_DATA_G9 = 16,
626 VP9_BTI_MBENC_NUM_SURFACES_G9 = 17,
629 struct vp9_binding_table_mbenc_i32 {
630 uint32_t mbenc_curr_y;
631 uint32_t mbenc_curr_uv;
632 uint32_t mbenc_segmentation_map;
633 uint32_t mbenc_mode_decision;
636 struct vp9_binding_table_mbenc_i16 {
637 uint32_t mbenc_curr_y;
638 uint32_t mbenc_curr_uv;
639 uint32_t mbenc_curr_nv12;
640 uint32_t mbenc_segmentation_map;
641 uint32_t mbenc_tx_curbe;
642 uint32_t mbenc_mode_decision;
645 struct vp9_binding_table_mbenc_p {
646 uint32_t mbenc_curr_y;
647 uint32_t mbenc_curr_uv;
648 uint32_t mbenc_curr_nv12;
649 uint32_t mbenc_lastref_pic;
650 uint32_t mbenc_goldref_pic;
651 uint32_t mbenc_altref_pic;
652 uint32_t mbenc_hme_mvdata;
653 uint32_t mbenc_hme_distortion;
654 uint32_t mbenc_segmentation_map;
655 uint32_t mbenc_tx_curbe;
656 uint32_t mbenc_mode_decision_prev;
657 uint32_t mbenc_mode_decision;
658 uint32_t mbenc_output_intermodes16x16;
661 struct vp9_binding_table_mbenc_tx {
662 uint32_t mbenc_curr_y;
663 uint32_t mbenc_curr_uv;
664 uint32_t mbenc_segmentation_map;
665 uint32_t mbenc_mode_decision;
666 uint32_t mbenc_cu_records;
667 uint32_t mbenc_pak_data;
670 typedef struct _vp9_mbenc_curbe_data {
672 uint32_t frame_width: 16;
673 uint32_t frame_height: 16;
677 uint32_t frame_type : 8;
678 uint32_t segmentation_enable : 8;
679 uint32_t ref_frame_flags : 8;
680 uint32_t min_16for32_check : 8;
684 uint32_t multi_pred : 8;
686 uint32_t search_x : 8;
687 uint32_t search_y : 8;
691 uint32_t hme_enabled : 8;
692 uint32_t multi_ref_qp_check : 8;
693 uint32_t disable_temp_pred : 8;
694 uint32_t min_ref_for32_check : 8;
698 uint32_t skip16_threshold : 16;
699 uint32_t disable_mr_threshold : 16;
703 uint32_t enable_mbrc : 8;
704 uint32_t inter_round : 8;
705 uint32_t intra_round : 8;
706 uint32_t frame_qpindex : 8;
718 uint32_t last_ref_qp : 16;
719 uint32_t golden_ref_qp : 16;
723 uint32_t alt_ref_qp : 16;
724 uint32_t reserved : 16;
728 uint32_t sum_intra_dist;
732 uint32_t sum_inter_dist;
740 uint32_t num_lastref;
744 uint32_t num_goldref;
752 uint32_t ime_search_path_delta03;
756 uint32_t ime_search_path_delta47;
760 uint32_t ime_search_path_delta811;
764 uint32_t ime_search_path_delta1215;
768 uint32_t ime_search_path_delta1619;
772 uint32_t ime_search_path_delta2023;
776 uint32_t ime_search_path_delta2427;
780 uint32_t ime_search_path_delta2831;
784 uint32_t ime_search_path_delta3235;
788 uint32_t ime_search_path_delta3639;
792 uint32_t ime_search_path_delta4043;
796 uint32_t ime_search_path_delta4447;
800 uint32_t ime_search_path_delta4851;
804 uint32_t ime_search_path_delta5255;
818 uint32_t segment_qpindex : 8;
819 uint32_t intra_non_dcpenalty_16x16 : 8;
820 uint32_t intra_non_dcpenalty_8x8 : 8;
821 uint32_t intra_non_dcpenalty_4x4 : 8;
825 uint32_t intra_non_dcpenalty_32x32 : 16;
826 uint32_t reserved : 16;
831 uint32_t zero_cost : 16;
832 uint32_t near_cost : 16;
836 uint32_t nearest_cost : 16;
837 uint32_t refid_cost : 16;
841 uint32_t mv_cost0 : 16;
842 uint32_t mv_cost1 : 16;
846 uint32_t mv_cost2 : 16;
847 uint32_t mv_cost3 : 16;
851 uint32_t mv_cost4 : 16;
852 uint32_t mv_cost5 : 16;
856 uint32_t mv_cost6 : 16;
857 uint32_t mv_cost7 : 16;
861 uint32_t mv_cost0 : 8;
862 uint32_t mv_cost1 : 8;
863 uint32_t mv_cost2 : 8;
864 uint32_t mv_cost3 : 8;
868 uint32_t mv_cost4 : 8;
869 uint32_t mv_cost5 : 8;
870 uint32_t mv_cost6 : 8;
871 uint32_t mv_cost7 : 8;
875 uint32_t mode_cost0 : 8;
876 uint32_t mode_cost1 : 8;
877 uint32_t mode_cost2 : 8;
878 uint32_t mode_cost3 : 8;
882 uint32_t mode_cost4 : 8;
883 uint32_t mode_cost5 : 8;
884 uint32_t mode_cost6 : 8;
885 uint32_t mode_cost7 : 8;
889 uint32_t mode_cost8 : 8;
890 uint32_t mode_cost9 : 8;
891 uint32_t refid_cost : 8;
892 uint32_t reserved : 8;
896 uint32_t mode_cost_intra32x32 : 16;
897 uint32_t mode_cost_inter32x32 : 16;
901 uint32_t mode_cost_intra32x16 : 16;
902 uint32_t reserved : 16;
906 uint32_t lambda_intra : 16;
907 uint32_t lambda_inter : 16;
912 Segment 0: dw32 - dw47
913 Segment 1 : dw48 - dw63
914 Segment 2 : dw64 - dw79
915 Segment 3 : dw80 - dw95
916 Segment 4 : dw96 - dw111
917 Segment 5 : dw112 - dw127
918 Segment 6 : dw128 - dw143
919 Segment 7 : dw144 - dw159
924 uint32_t enc_curr_y_surf_bti;
932 uint32_t enc_curr_nv12_surf_bti;
948 uint32_t segmentation_map_bti;
952 uint32_t tx_curbe_bti;
956 uint32_t hme_mvdata_bti;
960 uint32_t hme_distortion_bti;
968 uint32_t mode_decision_prev_bti;
972 uint32_t mode_decision_bti;
976 uint32_t output_16x16_inter_modes_bti;
980 uint32_t cu_record_bti;
984 uint32_t pak_data_bti;
986 } vp9_mbenc_curbe_data;
990 #define VP9_MBENC_IDX_KEY_32x32 0
991 #define VP9_MBENC_IDX_KEY_16x16 1
992 #define VP9_MBENC_IDX_INTER 2
993 #define VP9_MBENC_IDX_TX 3
994 #define NUM_VP9_MBENC 4
996 struct vp9_mbenc_context {
997 struct i965_gpe_context gpe_contexts[NUM_VP9_MBENC];
998 struct vp9_binding_table_mbenc_tx vp9_mbenc_tx_bti;
999 struct vp9_binding_table_mbenc_i32 vp9_mbenc_i32_bti;
1000 struct vp9_binding_table_mbenc_i16 vp9_mbenc_i16_bti;
1001 struct vp9_binding_table_mbenc_p vp9_mbenc_p_bti;
1002 dri_bo *mbenc_bo_dys;
1006 enum vp9_binding_table_offset_dys {
1007 VP9_BTI_DYS_INPUT_NV12 = 0,
1008 VP9_BTI_DYS_OUTPUT_Y = 1,
1009 VP9_BTI_DYS_OUTPUT_UV = 2,
1010 VP9_BTI_DYS_NUM_SURFACES = 3
1013 struct vp9_binding_table_dys {
1014 uint32_t dys_input_frame_nv12;
1015 uint32_t dys_output_frame_y;
1016 uint32_t dys_output_frame_uv;
1019 typedef struct _vp9_dys_curbe_data {
1021 uint32_t input_frame_width : 16;
1022 uint32_t input_frame_height: 16;
1026 uint32_t output_frame_width : 16;
1027 uint32_t output_frame_height: 16;
1039 uint32_t reserved[12];
1042 uint32_t input_frame_nv12_bti;
1046 uint32_t output_frame_y_bti;
1050 uint32_t avs_sample_idx;
1052 } vp9_dys_curbe_data;
1054 // DYS kernel parameters
1055 typedef struct _gen9_vp9_dys_kernel_param {
1056 uint32_t input_width;
1057 uint32_t input_height;
1058 uint32_t output_width;
1059 uint32_t output_height;
1060 struct object_surface *input_surface;
1061 struct object_surface *output_surface;
1062 } gen9_vp9_dys_kernel_param;
1064 struct vp9_dys_context {
1065 struct i965_gpe_context gpe_context;
1066 struct vp9_binding_table_dys vp9_dys_bti;
1069 enum vp9_binding_table_offset_brc {
1070 VP9_BTI_BRC_SRCY4X_G9 = 0,
1071 VP9_BTI_BRC_VME_COARSE_INTRA_G9 = 1,
1072 VP9_BTI_BRC_HISTORY_G9 = 2,
1073 VP9_BTI_BRC_CONSTANT_DATA_G9 = 3,
1074 VP9_BTI_BRC_DISTORTION_G9 = 4,
1075 VP9_BTI_BRC_MMDK_PAK_OUTPUT_G9 = 5,
1076 VP9_BTI_BRC_MBENC_CURBE_INPUT_G9 = 6,
1077 VP9_BTI_BRC_MBENC_CURBE_OUTPUT_G9 = 7,
1078 VP9_BTI_BRC_PIC_STATE_INPUT_G9 = 8,
1079 VP9_BTI_BRC_PIC_STATE_OUTPUT_G9 = 9,
1080 VP9_BTI_BRC_SEGMENT_STATE_INPUT_G9 = 10,
1081 VP9_BTI_BRC_SEGMENT_STATE_OUTPUT_G9 = 11,
1082 VP9_BTI_BRC_BITSTREAM_SIZE_G9 = 12,
1083 VP9_BTI_BRC_HFW_DATA_G9 = 13,
1084 VP9_BTI_BRC_NUM_SURFACES_G9 = 14,
1087 struct vp9_binding_table_brc_intra_dist {
1088 uint32_t intra_dist_src_y4xsurface;
1089 uint32_t brc_intra_dist_vme_coarse_intra;
1090 uint32_t brc_intra_dist_distortion_buffer;
1093 struct vp9_binding_table_brc_init {
1094 uint32_t brc_history_buffer;
1095 uint32_t brc_distortion_buffer;
1099 typedef struct _vp9_brc_curbe_data {
1101 uint32_t frame_width : 16;
1102 uint32_t frame_height : 16;
1106 uint32_t frame_type : 8;
1107 uint32_t segmentation_enable : 8;
1108 uint32_t ref_frame_flags : 8;
1109 uint32_t num_tlevels : 8;
1113 uint32_t reserved : 16;
1114 uint32_t intra_mode_disable : 8;
1115 uint32_t loop_filter_type : 8;
1119 uint32_t max_level_ratiot0 : 8;
1120 uint32_t max_level_ratiot1 : 8;
1121 uint32_t max_level_ratiot2 : 8;
1122 uint32_t max_level_ratiot3 : 8;
1126 uint32_t profile_level_max_frame;
1130 uint32_t init_buf_fullness;
1138 uint32_t target_bit_rate;
1142 uint32_t max_bit_rate;
1146 uint32_t min_bit_rate;
1150 uint32_t frame_ratem;
1154 uint32_t frame_rated;
1158 uint32_t brc_flag : 16;
1163 uint32_t init_frame_width : 16;
1164 uint32_t init_frame_height : 16;
1168 uint32_t avbr_accuracy : 16;
1169 uint32_t avbr_convergence : 16;
1173 uint32_t min_qp : 16;
1174 uint32_t max_qp : 16;
1178 uint32_t cq_level : 16;
1179 uint32_t reserved : 16;
1183 uint32_t enable_dynamic_scaling : 16;
1184 uint32_t brc_overshoot_cbr_pct : 16;
1188 uint32_t pframe_deviation_threshold0 : 8;
1189 uint32_t pframe_deviation_threshold1 : 8;
1190 uint32_t pframe_deviation_threshold2 : 8;
1191 uint32_t pframe_deviation_threshold3 : 8;
1195 uint32_t pframe_deviation_threshold4 : 8;
1196 uint32_t pframe_deviation_threshold5 : 8;
1197 uint32_t pframe_deviation_threshold6 : 8;
1198 uint32_t pframe_deviation_threshold7 : 8;
1202 uint32_t vbr_deviation_threshold0 : 8;
1203 uint32_t vbr_deviation_threshold1 : 8;
1204 uint32_t vbr_deviation_threshold2 : 8;
1205 uint32_t vbr_deviation_threshold3 : 8;
1209 uint32_t vbr_deviation_threshold4 : 8;
1210 uint32_t vbr_deviation_threshold5 : 8;
1211 uint32_t vbr_deviation_threshold6 : 8;
1212 uint32_t vbr_deviation_threshold7 : 8;
1216 uint32_t kframe_deviation_threshold0 : 8;
1217 uint32_t kframe_deviation_threshold1 : 8;
1218 uint32_t kframe_deviation_threshold2 : 8;
1219 uint32_t kframe_deviation_threshold3 : 8;
1223 uint32_t kframe_deviation_threshold4 : 8;
1224 uint32_t kframe_deviation_threshold5 : 8;
1225 uint32_t kframe_deviation_threshold6 : 8;
1226 uint32_t kframe_deviation_threshold7 : 8;
1230 uint32_t target_size;
1234 uint32_t frame_number;
1242 uint32_t hrd_buffer_fullness_upper_limit;
1246 uint32_t hrd_buffer_fullness_lower_limit;
1262 uint32_t seg_delta_qp0 : 8;
1263 uint32_t seg_delta_qp1 : 8;
1264 uint32_t seg_delta_qp2 : 8;
1265 uint32_t seg_delta_qp3 : 8;
1269 uint32_t seg_delta_qp4 : 8;
1270 uint32_t seg_delta_qp5 : 8;
1271 uint32_t seg_delta_qp6 : 8;
1272 uint32_t seg_delta_qp7 : 8;
1276 uint32_t temporal_id : 8;
1277 uint32_t multi_ref_qp_check : 8;
1278 uint32_t reserved : 16;
1282 uint32_t max_num_pak_passes : 8;
1283 uint32_t sync_async : 8;
1284 uint32_t overflow : 8;
1289 uint32_t reserved : 16;
1290 uint32_t segmentation : 8;
1291 uint32_t reserved1 : 8;
1295 uint32_t cur_qpindex : 8;
1296 uint32_t lastref_qpindex : 8;
1297 uint32_t goldref_qpindex : 8;
1298 uint32_t altref_qpindex : 8;
1302 uint32_t qdelta_ydc : 8;
1303 uint32_t qdelta_uvac : 8;
1304 uint32_t qdelta_uvdc : 8;
1305 uint32_t reserved : 8;
1345 uint32_t brc_y4x_input_bti;
1349 uint32_t brc_vme_coarse_intra_input_bti;
1353 uint32_t brc_history_buffer_bti;
1357 uint32_t brc_const_data_input_bti;
1361 uint32_t brc_distortion_bti;
1365 uint32_t brc_mmdk_pak_output_bti;
1369 uint32_t brc_enccurbe_input_bti;
1373 uint32_t brc_enccurbe_output_bti;
1377 uint32_t brc_pic_state_input_bti;
1381 uint32_t brc_pic_state_output_bti;
1385 uint32_t brc_seg_state_input_bti;
1389 uint32_t brc_seg_state_output_bti;
1393 uint32_t brc_bitstream_size_data_bti;
1397 uint32_t brc_hfw_data_output_bti;
1407 } vp9_brc_curbe_data;
1410 #define VP9_BRC_INTRA_DIST 0
1411 #define VP9_BRC_INIT 1
1412 #define VP9_BRC_RESET 2
1413 #define VP9_BRC_UPDATE 3
1414 #define NUM_VP9_BRC 4
1416 struct vp9_brc_context {
1417 struct i965_gpe_context gpe_contexts[NUM_VP9_BRC];
1420 struct gen9_vp9_scaling_curbe_param {
1421 uint32_t input_picture_width;
1422 uint32_t input_picture_height;
1423 bool use_16x_scaling;
1424 bool use_32x_scaling;
1425 bool mb_variance_output_enabled;
1426 bool mb_pixel_average_output_enabled;
1427 bool blk8x8_stat_enabled;
1430 struct gen9_vp9_me_curbe_param {
1431 VAEncSequenceParameterBufferVP9 *pseq_param;
1432 VAEncPictureParameterBufferVP9 *ppic_param;
1433 uint32_t frame_width;
1434 uint32_t frame_height;
1435 uint32_t ref_frame_flag;
1437 bool b16xme_enabled;
1440 struct gen9_vp9_mbenc_curbe_param {
1441 VAEncSequenceParameterBufferVP9 *pseq_param;
1442 VAEncPictureParameterBufferVP9 *ppic_param;
1443 VAEncMiscParameterTypeVP9PerSegmantParam *psegment_param;
1445 uint16_t frame_width_in_mb;
1446 uint16_t frame_height_in_mb;
1447 uint16_t frame_type;
1449 uint8_t ref_frame_flag;
1450 VP9_MEDIA_STATE_TYPE media_state_type;
1451 struct object_surface *curr_obj;
1452 struct object_surface *last_ref_obj;
1453 struct object_surface *golden_ref_obj;
1454 struct object_surface *alt_ref_obj;
1455 int picture_coding_type;
1456 bool mbenc_curbe_set_in_brc_update;
1457 bool multi_ref_qp_check;
1460 struct gen9_vp9_dys_curbe_param {
1461 uint32_t input_width;
1462 uint32_t input_height;
1463 uint32_t output_width;
1464 uint32_t output_height;
1467 struct gen9_vp9_brc_curbe_param {
1468 VAEncSequenceParameterBufferVP9 *pseq_param;
1469 VAEncPictureParameterBufferVP9 *ppic_param;
1470 VAEncMiscParameterTypeVP9PerSegmantParam *psegment_param;
1472 VASurfaceID curr_frame;
1473 uint32_t picture_coding_type;
1474 /* the unit is in bits */
1475 double *pbrc_init_current_target_buf_full_in_bits;
1476 double *pbrc_init_reset_input_bits_per_frame;
1477 uint32_t *pbrc_init_reset_buf_size_in_bits;
1478 uint32_t frame_width;
1479 uint32_t frame_height;
1480 uint32_t frame_width_in_mb;
1481 uint32_t frame_height_in_mb;
1482 uint32_t ref_frame_flag;
1487 int32_t brc_num_pak_passes;
1488 bool multi_ref_qp_check;
1489 int16_t frame_number;
1490 VP9_MEDIA_STATE_TYPE media_state_type;
1493 struct gen9_vp9_scaling_surface_param {
1494 VASurfaceID curr_pic;
1495 void *p_scaling_bti;
1496 struct object_surface *input_surface;
1497 struct object_surface *output_surface;
1498 uint32_t input_frame_width;
1499 uint32_t input_frame_height;
1500 uint32_t output_frame_width;
1501 uint32_t output_frame_height;
1502 uint32_t vert_line_stride;
1503 uint32_t vert_line_stride_offset;
1504 bool scaling_out_use_16unorm_surf_fmt;
1505 bool scaling_out_use_32unorm_surf_fmt;
1506 bool mbv_proc_stat_enabled;
1507 struct i965_gpe_resource *pres_mbv_proc_stat_buffer;
1510 struct gen9_vp9_brc_init_constant_buffer_param {
1511 struct i965_gpe_resource *pres_brc_const_data_buffer;
1512 uint16_t picture_coding_type;
1515 struct gen9_vp9_dys_surface_param {
1516 struct object_surface *input_frame;
1517 struct object_surface *output_frame;
1518 uint32_t vert_line_stride;
1519 uint32_t vert_line_stride_offset;
1522 struct gen9_vp9_me_surface_param {
1523 VASurfaceID curr_pic;
1524 struct object_surface *last_ref_pic;
1525 struct object_surface *golden_ref_pic;
1526 struct object_surface *alt_ref_pic;
1528 struct i965_gpe_resource *pres_4x_memv_data_buffer;
1529 struct i965_gpe_resource *pres_16x_memv_data_buffer;
1530 struct i965_gpe_resource *pres_me_distortion_buffer;
1531 struct i965_gpe_resource *pres_me_brc_distortion_buffer;
1532 uint32_t downscaled_width_in_mb;
1533 uint32_t downscaled_height_in_mb;
1534 uint32_t frame_width;
1535 uint32_t frame_height;
1537 bool b16xme_enabled;
1541 struct gen9_vp9_mbenc_surface_param {
1542 int media_state_type;
1543 struct object_surface *last_ref_obj;
1544 struct object_surface *golden_ref_obj;
1545 struct object_surface *alt_ref_obj;
1546 struct object_surface *curr_frame_obj;
1547 unsigned short picture_coding_type;
1548 unsigned int curr_surface_offset;
1549 struct i965_gpe_resource *ps4x_memv_data_buffer;
1550 struct i965_gpe_resource *ps4x_memv_distortion_buffer;
1551 struct i965_gpe_resource *ps_me_brc_distortion_buffer;
1552 uint32_t frame_width;
1553 uint32_t frame_height;
1554 uint32_t frame_width_in_mb;
1555 uint32_t frame_height_in_mb;
1557 bool segmentation_enabled;
1558 uint32_t mb_data_offset;
1559 struct i965_gpe_resource *pres_mb_code_surface;
1560 struct i965_gpe_resource *pres_segmentation_map;
1561 struct i965_gpe_resource *pres_mode_decision_prev;
1562 struct i965_gpe_resource *pres_mode_decision;
1563 struct i965_gpe_resource *pres_mbenc_curbe_buffer;
1564 struct i965_gpe_resource *pres_output_16x16_inter_modes;
1565 struct i965_gpe_resource *pres_mode_decision_i32;
1567 struct i965_gpe_context *gpe_context_tx;
1570 typedef struct _vp9_frame_status_ {
1571 uint16_t frame_width;
1572 uint16_t frame_height;
1575 uint8_t refresh_frame_context;
1576 uint8_t frame_context_idx;
1580 struct gen9_hcpe_pipe_mode_select_param {
1581 uint32_t codec_mode;
1582 uint32_t stream_out;
1585 typedef struct _hcp_surface_state {
1587 uint32_t surface_pitch : 17;
1588 uint32_t reserved : 11;
1589 uint32_t surface_id : 4;
1593 uint32_t y_cb_offset : 15;
1594 uint32_t reserved : 12;
1595 uint32_t surface_format : 5;
1599 uint32_t default_alpha : 16;
1600 uint32_t y_cr_offset : 16;
1604 uint32_t auxilary_index : 11;
1605 uint32_t reserved0 : 1;
1606 uint32_t memory_compression : 1;
1607 uint32_t reserved1 : 18;
1609 } hcp_surface_state;
1611 struct gen9_encoder_context_vp9 {
1612 struct vp9_scaling_context scaling_context;
1613 struct vp9_me_context me_context;
1614 struct vp9_mbenc_context mbenc_context;
1615 struct vp9_brc_context brc_context;
1616 struct vp9_dys_context dys_context;
1617 void *enc_priv_state;
1619 struct i965_gpe_resource res_brc_history_buffer;
1620 struct i965_gpe_resource res_brc_const_data_buffer;
1621 struct i965_gpe_resource res_brc_mmdk_pak_buffer;
1622 struct i965_gpe_resource res_brc_mbenc_curbe_write_buffer;
1623 struct i965_gpe_resource res_pic_state_brc_read_buffer;
1624 struct i965_gpe_resource res_pic_state_brc_write_hfw_read_buffer;
1625 struct i965_gpe_resource res_pic_state_hfw_write_buffer;
1626 struct i965_gpe_resource res_seg_state_brc_read_buffer;
1627 struct i965_gpe_resource res_seg_state_brc_write_buffer;
1628 struct i965_gpe_resource res_brc_bitstream_size_buffer;
1629 struct i965_gpe_resource res_brc_hfw_data_buffer;
1631 struct i965_gpe_resource s4x_memv_distortion_buffer;
1632 struct i965_gpe_resource mb_segment_map_surface;
1633 struct i965_gpe_resource s4x_memv_data_buffer;
1634 struct i965_gpe_resource s16x_memv_data_buffer;
1635 struct i965_gpe_resource res_mode_decision[2];
1636 struct i965_gpe_resource res_output_16x16_inter_modes;
1637 struct i965_gpe_resource res_mb_code_surface;
1640 struct i965_gpe_resource res_hvd_line_buffer;
1641 struct i965_gpe_resource res_hvd_tile_line_buffer;
1642 struct i965_gpe_resource res_deblocking_filter_line_buffer;
1643 struct i965_gpe_resource res_deblocking_filter_tile_line_buffer;
1644 struct i965_gpe_resource res_deblocking_filter_tile_col_buffer;
1646 struct i965_gpe_resource res_metadata_line_buffer;
1647 struct i965_gpe_resource res_metadata_tile_line_buffer;
1648 struct i965_gpe_resource res_metadata_tile_col_buffer;
1650 struct i965_gpe_resource res_segmentid_buffer;
1651 struct i965_gpe_resource res_prob_buffer;
1652 struct i965_gpe_resource res_prob_delta_buffer;
1653 struct i965_gpe_resource res_prob_counter_buffer;
1655 struct i965_gpe_resource res_compressed_input_buffer;
1656 struct i965_gpe_resource res_tile_record_streamout_buffer;
1657 struct i965_gpe_resource res_cu_stat_streamout_buffer;
1658 struct i965_gpe_resource res_mv_temporal_buffer[2];
1659 struct i965_gpe_resource res_pak_uncompressed_input_buffer;
1661 char *frame_header_data;
1663 unsigned int use_hw_scoreboard;
1664 unsigned int use_hw_non_stalling_scoreboard;
1665 unsigned int mb_stats_supported;
1666 unsigned int hme_supported;
1667 unsigned int b32xme_supported;
1669 void (*pfn_set_sample_state_dys)(
1670 VADriverContextP ctx,
1671 struct encode_state *encode_state,
1672 struct i965_gpe_context *gpe_context,
1673 struct intel_encoder_context *encoder_context);
1675 void (*pfn_set_curbe_mbenc)(
1676 VADriverContextP ctx,
1677 struct encode_state *encode_state,
1678 struct i965_gpe_context *gpe_context,
1679 struct intel_encoder_context *encoder_context,
1680 struct gen9_vp9_mbenc_curbe_param *param);
1682 void (*pfn_set_curbe_me)(
1683 VADriverContextP ctx,
1684 struct encode_state *encode_state,
1685 struct i965_gpe_context *gpe_context,
1686 struct intel_encoder_context *encoder_context,
1687 struct gen9_vp9_me_curbe_param *param);
1689 void (*pfn_set_curbe_scaling)(
1690 VADriverContextP ctx,
1691 struct encode_state *encode_state,
1692 struct i965_gpe_context *gpe_context,
1693 struct intel_encoder_context *encoder_context,
1694 struct gen9_vp9_scaling_curbe_param *param);
1696 void (*pfn_set_curbe_dys)(
1697 VADriverContextP ctx,
1698 struct encode_state *encode_state,
1699 struct i965_gpe_context *gpe_context,
1700 struct intel_encoder_context *encoder_context,
1701 struct gen9_vp9_dys_curbe_param *param);
1703 void (*pfn_set_curbe_brc)(
1704 VADriverContextP ctx,
1705 struct encode_state *encode_state,
1706 struct i965_gpe_context *gpe_context,
1707 struct intel_encoder_context *encoder_context,
1708 struct gen9_vp9_brc_curbe_param *param);
1710 void (*pfn_send_me_surface)(
1711 VADriverContextP ctx,
1712 struct encode_state *encode_state,
1713 struct i965_gpe_context *gpe_context,
1714 struct intel_encoder_context *encoder_context,
1715 struct gen9_vp9_me_surface_param *param);
1717 void (*pfn_send_mbenc_surface)(
1718 VADriverContextP ctx,
1719 struct encode_state *encode_state,
1720 struct i965_gpe_context *gpe_context,
1721 struct intel_encoder_context *encoder_context,
1722 struct gen9_vp9_mbenc_surface_param *mbenc_param);
1724 void (*pfn_send_scaling_surface)(
1725 VADriverContextP ctx,
1726 struct encode_state *encode_state,
1727 struct i965_gpe_context *gpe_context,
1728 struct intel_encoder_context *encoder_context,
1729 struct gen9_vp9_scaling_surface_param *param);
1731 void (*pfn_send_dys_surface)(
1732 VADriverContextP ctx,
1733 struct encode_state *encode_state,
1734 struct i965_gpe_context *gpe_context,
1735 struct intel_encoder_context *encoder_context,
1736 struct gen9_vp9_dys_surface_param *param);
1740 } reconstructed_object;
1744 } uncompressed_picture_source;
1751 } indirect_pak_bse_object;
1755 } reference_surfaces[8];
1758 enum INTEL_ENC_VP9_TU_MODE {
1759 INTEL_ENC_VP9_TU_QUALITY = 0,
1760 INTEL_ENC_VP9_TU_NORMAL,
1761 INTEL_ENC_VP9_TU_PERFORMANCE
1764 #define VP9_LAST_REF 0x01
1765 #define VP9_GOLDEN_REF 0x02
1766 #define VP9_ALT_REF 0x04
1768 struct vp9_encode_status {
1769 uint32_t bs_byte_count;
1770 uint32_t image_status_mask;
1771 uint32_t image_status_ctrl;
1772 uint32_t media_index;
1775 struct vp9_encode_status_buffer_internal {
1776 uint32_t bs_byte_count_offset;
1777 uint32_t reserved[15];
1779 uint32_t image_status_mask_offset;
1780 uint32_t image_status_ctrl_offset;
1782 uint32_t vp9_image_mask_reg_offset;
1783 uint32_t vp9_image_ctrl_reg_offset;
1784 uint32_t vp9_bs_frame_reg_offset;
1787 uint32_t media_index_offset;
1791 struct gen9_vp9_state {
1792 unsigned int brc_inited;
1793 unsigned int brc_reset;
1794 unsigned int brc_enabled;
1795 unsigned int use_hw_scoreboard;
1796 unsigned int use_hw_non_stalling_scoreborad;
1797 unsigned int hme_supported;
1798 unsigned int b16xme_supported;
1799 unsigned int hme_enabled;
1800 unsigned int b16xme_enabled;
1802 unsigned int frame_width;
1803 unsigned int frame_height;
1804 unsigned int frame_width_in_mb;
1805 unsigned int frame_height_in_mb;
1806 unsigned int frame_width_4x;
1807 unsigned int frame_height_4x;
1808 unsigned int frame_width_16x;
1809 unsigned int frame_height_16x;
1810 unsigned int downscaled_width_4x_in_mb;
1811 unsigned int downscaled_height_4x_in_mb;
1812 unsigned int downscaled_width_16x_in_mb;
1813 unsigned int downscaled_height_16x_in_mb;
1815 unsigned int res_width;
1816 unsigned int res_height;
1818 VASurfaceID curr_frame;
1819 VASurfaceID last_ref_pic;
1820 VASurfaceID alt_ref_pic;
1821 VASurfaceID golden_ref_pic;
1823 struct object_surface *input_surface_obj;
1824 struct object_surface *last_ref_obj;
1825 struct object_surface *golden_ref_obj;
1826 struct object_surface *alt_ref_obj;
1828 VAEncSequenceParameterBufferVP9 *seq_param;
1829 VAEncSequenceParameterBufferVP9 bogus_seq_param;
1830 VAEncPictureParameterBufferVP9 *pic_param;
1831 VAEncMiscParameterTypeVP9PerSegmantParam *segment_param;
1832 double brc_init_current_target_buf_full_in_bits;
1833 double brc_init_reset_input_bits_per_frame;
1834 uint32_t brc_init_reset_buf_size_in_bits;
1835 unsigned int gop_size;
1836 unsigned int target_bit_rate;
1837 unsigned int max_bit_rate;
1838 unsigned int min_bit_rate;
1839 unsigned long init_vbv_buffer_fullness_in_bit;
1840 unsigned long vbv_buffer_size_in_bit;
1842 struct intel_fraction framerate;
1843 uint8_t ref_frame_flag;
1844 uint8_t dys_ref_frame_flag;
1845 uint8_t picture_coding_type;
1846 unsigned int adaptive_transform_decision_enabled;
1847 int curr_mode_decision_index;
1849 unsigned int mb_data_offset;
1854 bool mbenc_curbe_set_in_brc_update;
1855 bool multi_ref_qp_check;
1856 bool brc_distortion_buffer_supported;
1857 bool brc_constant_buffer_supported;
1858 bool mbenc_keyframe_dist_enabled;
1859 unsigned int curr_mv_temporal_index;
1862 char *alias_insert_data;
1864 vp9_header_bitoffset frame_header;
1866 struct vp9_encode_status_buffer_internal status_buffer;
1868 /* the frame context related with VP9 encoding */
1869 FRAME_CONTEXT vp9_frame_ctx[FRAME_CONTEXTS];
1870 FRAME_CONTEXT vp9_current_fc;
1873 vp9_frame_status vp9_last_frame;
1876 struct vp9_compressed_element {
1877 uint8_t a_valid : 1;
1878 uint8_t a_probdiff_select: 1;
1879 uint8_t a_prob_select : 1;
1881 uint8_t b_valid : 1;
1882 uint8_t b_probdiff_select: 1;
1883 uint8_t b_prob_select : 1;
1887 #define VP9_BRC_HISTORY_BUFFER_SIZE 768
1888 #define VP9_BRC_CONSTANTSURFACE_SIZE 17792
1889 #define VP9_BRC_BITSTREAM_SIZE_BUFFER_SIZE 16
1890 #define VP9_BRC_MMDK_PAK_BUFFER_SIZE 64
1891 #define VP9_SEGMENT_STATE_BUFFER_SIZE 256
1892 #define VP9_HFW_BRC_DATA_BUFFER_SIZE 32
1894 #endif /* GEN9_VP9_ENCODER_H */