OSDN Git Service

Update for post processing on IVB
[android-x86/hardware-intel-common-vaapi.git] / src / i965_avc_bsd.c
1 /*
2  * Copyright © 2010 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Xiang Haihao <haihao.xiang@intel.com>
26  *
27  */
28 #include <stdio.h>
29 #include <stdlib.h>
30 #include <string.h>
31 #include <assert.h>
32
33 #include "intel_batchbuffer.h"
34 #include "intel_driver.h"
35
36 #include "i965_defines.h"
37 #include "i965_drv_video.h"
38 #include "i965_avc_bsd.h"
39 #include "i965_media_h264.h"
40 #include "i965_media.h"
41
42 static void 
43 i965_avc_bsd_free_avc_bsd_surface(void **data)
44 {
45     struct i965_avc_bsd_surface *avc_bsd_surface = *data;
46
47     if (!avc_bsd_surface)
48         return;
49
50     dri_bo_unreference(avc_bsd_surface->dmv_top);
51     avc_bsd_surface->dmv_top = NULL;
52     dri_bo_unreference(avc_bsd_surface->dmv_bottom);
53     avc_bsd_surface->dmv_bottom = NULL;
54
55     free(avc_bsd_surface);
56     *data = NULL;
57 }
58
59 static void
60 i965_avc_bsd_init_avc_bsd_surface(VADriverContextP ctx, 
61                                   struct object_surface *obj_surface,
62                                   VAPictureParameterBufferH264 *pic_param,
63                                   struct i965_h264_context *i965_h264_context)
64 {
65     struct i965_driver_data *i965 = i965_driver_data(ctx);
66     struct i965_avc_bsd_context *i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
67     struct i965_avc_bsd_surface *avc_bsd_surface = obj_surface->private_data;
68
69     obj_surface->free_private_data = i965_avc_bsd_free_avc_bsd_surface;
70
71     if (!avc_bsd_surface) {
72         avc_bsd_surface = calloc(sizeof(struct i965_avc_bsd_surface), 1);
73         assert((obj_surface->size & 0x3f) == 0);
74         obj_surface->private_data = avc_bsd_surface;
75     }
76
77     avc_bsd_surface->ctx = i965_avc_bsd_context;
78     avc_bsd_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag &&
79                                         !pic_param->seq_fields.bits.direct_8x8_inference_flag);
80
81     if (avc_bsd_surface->dmv_top == NULL) {
82         avc_bsd_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr,
83                                                 "direct mv w/r buffer",
84                                                 DMV_SIZE,
85                                                 0x1000);
86     }
87
88     if (avc_bsd_surface->dmv_bottom_flag &&
89         avc_bsd_surface->dmv_bottom == NULL) {
90         avc_bsd_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr,
91                                                    "direct mv w/r buffer",
92                                                    DMV_SIZE,
93                                                    0x1000);
94     }
95 }
96
97 static void
98 i965_bsd_ind_obj_base_address(VADriverContextP ctx,
99                               struct decode_state *decode_state,
100                               int slice,
101                               struct i965_h264_context *i965_h264_context)
102                               
103 {
104     struct intel_batchbuffer *batch = i965_h264_context->batch;
105
106     dri_bo *ind_bo = decode_state->slice_datas[slice]->bo;
107
108     BEGIN_BCS_BATCH(batch, 3);
109     OUT_BCS_BATCH(batch, CMD_BSD_IND_OBJ_BASE_ADDR | (3 - 2));
110     OUT_BCS_RELOC(batch, ind_bo,
111                   I915_GEM_DOMAIN_INSTRUCTION, 0,
112                   0);
113     OUT_BCS_BATCH(batch, 0);
114     ADVANCE_BCS_BATCH(batch);
115 }
116
117 static void
118 i965_avc_bsd_img_state(VADriverContextP ctx,
119                        struct decode_state *decode_state,
120                        struct i965_h264_context *i965_h264_context)
121 {
122     struct intel_batchbuffer *batch = i965_h264_context->batch;
123     int qm_present_flag;
124     int img_struct;
125     int mbaff_frame_flag;
126     unsigned int avc_it_command_header;
127     unsigned int width_in_mbs, height_in_mbs;
128     VAPictureParameterBufferH264 *pic_param;
129
130     if (decode_state->iq_matrix && decode_state->iq_matrix->buffer)
131         qm_present_flag = 1;
132     else
133         qm_present_flag = 0; /* built-in QM matrices */
134
135     assert(decode_state->pic_param && decode_state->pic_param->buffer);
136     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
137
138     assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID));
139
140     if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD)
141         img_struct = 1;
142     else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD)
143         img_struct = 3;
144     else
145         img_struct = 0;
146
147     if ((img_struct & 0x1) == 0x1) {
148         assert(pic_param->pic_fields.bits.field_pic_flag == 0x1);
149     } else {
150         assert(pic_param->pic_fields.bits.field_pic_flag == 0x0);
151     }
152
153     if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */
154         assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0);
155         assert(pic_param->pic_fields.bits.field_pic_flag == 0);
156     } else {
157         assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */
158     }
159
160     mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag &&
161                         !pic_param->pic_fields.bits.field_pic_flag);
162
163     width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff);
164     height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */
165                                                                                
166     assert(!((width_in_mbs * height_in_mbs) & 0x8000)); /* hardware requirement */
167
168     /* BSD unit doesn't support 4:2:2 and 4:4:4 picture */
169     assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */
170            pic_param->seq_fields.bits.chroma_format_idc == 1);  /* 4:2:0 */
171     assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */
172
173     avc_it_command_header = (CMD_MEDIA_OBJECT_EX | (12 - 2));
174
175     BEGIN_BCS_BATCH(batch, 6);
176     OUT_BCS_BATCH(batch, CMD_AVC_BSD_IMG_STATE | (6 - 2));
177     OUT_BCS_BATCH(batch, 
178                   ((width_in_mbs * height_in_mbs) & 0x7fff));
179     OUT_BCS_BATCH(batch, 
180                   (height_in_mbs << 16) | 
181                   (width_in_mbs << 0));
182     OUT_BCS_BATCH(batch, 
183                   ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) |
184                   ((pic_param->chroma_qp_index_offset & 0x1f) << 16) | 
185                   (SCAN_RASTER_ORDER << 15) | /* AVC ILDB Data */
186                   (SCAN_SPECIAL_ORDER << 14) | /* AVC IT Command */
187                   (SCAN_RASTER_ORDER << 13) | /* AVC IT Data */
188                   (1 << 12) | /* always 1, hardware requirement */
189                   (qm_present_flag << 10) |
190                   (img_struct << 8) |
191                   (16 << 0)); /* FIXME: always support 16 reference frames ??? */
192     OUT_BCS_BATCH(batch,
193                   (RESIDUAL_DATA_OFFSET << 24) | /* residual data offset */
194                   (0 << 17) | /* don't overwrite SRT */
195                   (0 << 16) | /* Un-SRT (Unsynchronized Root Thread) */
196                   (0 << 12) | /* FIXME: no 16MV ??? */
197                   (pic_param->seq_fields.bits.chroma_format_idc << 10) |
198                   (i965_h264_context->enable_avc_ildb << 8)  | /* Enable ILDB writing output */
199                   (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) |
200                   ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) |
201                   (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) |
202                   (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) |
203                   (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) |
204                   (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) |
205                   (mbaff_frame_flag << 1) |
206                   (pic_param->pic_fields.bits.field_pic_flag << 0));
207     OUT_BCS_BATCH(batch, avc_it_command_header);
208     ADVANCE_BCS_BATCH(batch);
209 }
210
211 static void
212 i965_avc_bsd_qm_state(VADriverContextP ctx,
213                       struct decode_state *decode_state,
214                       struct i965_h264_context *i965_h264_context)
215 {
216     struct intel_batchbuffer *batch = i965_h264_context->batch;
217     int cmd_len;
218     VAIQMatrixBufferH264 *iq_matrix;
219     VAPictureParameterBufferH264 *pic_param;
220
221     if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer)
222         return;
223
224     iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer;
225
226     assert(decode_state->pic_param && decode_state->pic_param->buffer);
227     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
228
229     cmd_len = 2 + 6 * 4; /* always load six 4x4 scaling matrices */
230
231     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
232         cmd_len += 2 * 16; /* load two 8x8 scaling matrices */
233
234     BEGIN_BCS_BATCH(batch, cmd_len);
235     OUT_BCS_BATCH(batch, CMD_AVC_BSD_QM_STATE | (cmd_len - 2));
236
237     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
238         OUT_BCS_BATCH(batch, 
239                       (0x0  << 8) | /* don't use default built-in matrices */
240                       (0xff << 0)); /* six 4x4 and two 8x8 scaling matrices */
241     else
242         OUT_BCS_BATCH(batch, 
243                       (0x0  << 8) | /* don't use default built-in matrices */
244                       (0x3f << 0)); /* six 4x4 scaling matrices */
245
246     intel_batchbuffer_data(batch, &iq_matrix->ScalingList4x4[0][0], 6 * 4 * 4);
247
248     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
249         intel_batchbuffer_data(batch, &iq_matrix->ScalingList8x8[0][0], 2 * 16 * 4);
250
251     ADVANCE_BCS_BATCH(batch);
252 }
253
254 static void
255 i965_avc_bsd_slice_state(VADriverContextP ctx, 
256                          VAPictureParameterBufferH264 *pic_param, 
257                          VASliceParameterBufferH264 *slice_param,
258                          struct i965_h264_context *i965_h264_context)
259 {
260     struct intel_batchbuffer *batch = i965_h264_context->batch;
261     int present_flag, cmd_len, list, j;
262     struct {
263         unsigned char bottom_idc:1;
264         unsigned char frame_store_index:4;
265         unsigned char field_picture:1;
266         unsigned char long_term:1;
267         unsigned char non_exist:1;
268     } refs[32];
269     char weightoffsets[32 * 6];
270
271     /* don't issue SLICE_STATE for intra-prediction decoding */
272     if (slice_param->slice_type == SLICE_TYPE_I ||
273         slice_param->slice_type == SLICE_TYPE_SI)
274         return;
275
276     cmd_len = 2;
277
278     if (slice_param->slice_type == SLICE_TYPE_P ||
279         slice_param->slice_type == SLICE_TYPE_SP) {
280         present_flag = PRESENT_REF_LIST0;
281         cmd_len += 8;
282     } else { 
283         present_flag = PRESENT_REF_LIST0 | PRESENT_REF_LIST1;
284         cmd_len += 16;
285     }
286
287     if ((slice_param->slice_type == SLICE_TYPE_P ||
288          slice_param->slice_type == SLICE_TYPE_SP) && 
289         (pic_param->pic_fields.bits.weighted_pred_flag == 1)) {
290         present_flag |= PRESENT_WEIGHT_OFFSET_L0;
291         cmd_len += 48;
292     }
293
294     if ((slice_param->slice_type == SLICE_TYPE_B) &&
295         (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) {
296         present_flag |= PRESENT_WEIGHT_OFFSET_L0 | PRESENT_WEIGHT_OFFSET_L1;
297         cmd_len += 96;
298     }
299
300     BEGIN_BCS_BATCH(batch, cmd_len);
301     OUT_BCS_BATCH(batch, CMD_AVC_BSD_SLICE_STATE | (cmd_len - 2));
302     OUT_BCS_BATCH(batch, present_flag);
303
304     for (list = 0; list < 2; list++) {
305         int flag;
306         VAPictureH264 *va_pic;
307
308         if (list == 0) {
309             flag = PRESENT_REF_LIST0;
310             va_pic = slice_param->RefPicList0;
311         } else {
312             flag = PRESENT_REF_LIST1;
313             va_pic = slice_param->RefPicList1;
314         }
315
316         if (!(present_flag & flag))
317             continue;
318
319         for (j = 0; j < 32; j++) {
320             if (va_pic->flags & VA_PICTURE_H264_INVALID) {
321                 refs[j].non_exist = 1;
322                 refs[j].long_term = 1;
323                 refs[j].field_picture = 1;
324                 refs[j].frame_store_index = 0xf;
325                 refs[j].bottom_idc = 1;
326             } else {
327                 int frame_idx;
328                 
329                 for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) {
330                     if (i965_h264_context->fsid_list[frame_idx].surface_id != VA_INVALID_ID &&
331                         va_pic->picture_id == i965_h264_context->fsid_list[frame_idx].surface_id) {
332                         assert(frame_idx == i965_h264_context->fsid_list[frame_idx].frame_store_id);
333                         break;
334                     }
335                 }
336
337                 assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list));
338                 
339                 refs[j].non_exist = 0;
340                 refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE);
341                 refs[j].field_picture = !!(va_pic->flags & 
342                                            (VA_PICTURE_H264_TOP_FIELD | 
343                                             VA_PICTURE_H264_BOTTOM_FIELD));
344                 refs[j].frame_store_index = frame_idx;
345                 refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD);
346             }
347
348             va_pic++;
349         }
350         
351         intel_batchbuffer_data(batch, refs, sizeof(refs));
352     }
353
354     i965_h264_context->weight128_luma_l0 = 0;
355     i965_h264_context->weight128_luma_l1 = 0;
356     i965_h264_context->weight128_chroma_l0 = 0;
357     i965_h264_context->weight128_chroma_l1 = 0;
358
359     i965_h264_context->weight128_offset0_flag = 0;
360     i965_h264_context->weight128_offset0 = 0;
361
362     if (present_flag & PRESENT_WEIGHT_OFFSET_L0) {
363         for (j = 0; j < 32; j++) {
364             weightoffsets[j * 6 + 0] = slice_param->luma_offset_l0[j];
365             weightoffsets[j * 6 + 1] = slice_param->luma_weight_l0[j];
366             weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l0[j][0];
367             weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l0[j][0];
368             weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l0[j][1];
369             weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l0[j][1];
370
371             if (pic_param->pic_fields.bits.weighted_pred_flag == 1 ||
372                 pic_param->pic_fields.bits.weighted_bipred_idc == 1) {
373                 if (i965_h264_context->use_hw_w128) {
374                     if (slice_param->luma_weight_l0[j] == 128)
375                         i965_h264_context->weight128_luma_l0 |= (1 << j);
376
377                     if (slice_param->chroma_weight_l0[j][0] == 128 ||
378                         slice_param->chroma_weight_l0[j][1] == 128)
379                         i965_h264_context->weight128_chroma_l0 |= (1 << j);
380                 } else {
381                     /* FIXME: workaround for weight 128 */
382                     if (slice_param->luma_weight_l0[j] == 128 ||
383                         slice_param->chroma_weight_l0[j][0] == 128 ||
384                         slice_param->chroma_weight_l0[j][1] == 128)
385                         i965_h264_context->weight128_offset0_flag = 1;
386                 }
387             }
388         }
389
390         intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets));
391     }
392
393     if (present_flag & PRESENT_WEIGHT_OFFSET_L1) {
394         for (j = 0; j < 32; j++) {
395             weightoffsets[j * 6 + 0] = slice_param->luma_offset_l1[j];
396             weightoffsets[j * 6 + 1] = slice_param->luma_weight_l1[j];
397             weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l1[j][0];
398             weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l1[j][0];
399             weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l1[j][1];
400             weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l1[j][1];
401
402             if (pic_param->pic_fields.bits.weighted_bipred_idc == 1) {
403                 if (i965_h264_context->use_hw_w128) {
404                     if (slice_param->luma_weight_l1[j] == 128)
405                         i965_h264_context->weight128_luma_l1 |= (1 << j);
406
407                     if (slice_param->chroma_weight_l1[j][0] == 128 ||
408                         slice_param->chroma_weight_l1[j][1] == 128)
409                         i965_h264_context->weight128_chroma_l1 |= (1 << j);
410                 } else {
411                     if (slice_param->luma_weight_l0[j] == 128 ||
412                         slice_param->chroma_weight_l0[j][0] == 128 ||
413                         slice_param->chroma_weight_l0[j][1] == 128)
414                         i965_h264_context->weight128_offset0_flag = 1;
415                 }
416             }
417         }
418
419         intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets));
420     }
421
422     ADVANCE_BCS_BATCH(batch);
423 }
424
425 static void
426 i965_avc_bsd_buf_base_state(VADriverContextP ctx,
427                             VAPictureParameterBufferH264 *pic_param, 
428                             VASliceParameterBufferH264 *slice_param,
429                             struct i965_h264_context *i965_h264_context)
430 {
431     struct i965_driver_data *i965 = i965_driver_data(ctx);
432     struct intel_batchbuffer *batch = i965_h264_context->batch;
433     struct i965_avc_bsd_context *i965_avc_bsd_context;
434     int i, j;
435     VAPictureH264 *va_pic;
436     struct object_surface *obj_surface;
437     struct i965_avc_bsd_surface *avc_bsd_surface;
438
439     i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
440
441     BEGIN_BCS_BATCH(batch, 74);
442     OUT_BCS_BATCH(batch, CMD_AVC_BSD_BUF_BASE_STATE | (74 - 2));
443     OUT_BCS_RELOC(batch, i965_avc_bsd_context->bsd_raw_store.bo,
444                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
445                   0);
446     OUT_BCS_RELOC(batch, i965_avc_bsd_context->mpr_row_store.bo,
447                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
448                   0);
449     OUT_BCS_RELOC(batch, i965_h264_context->avc_it_command_mb_info.bo,
450                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
451                   i965_h264_context->avc_it_command_mb_info.mbs * i965_h264_context->use_avc_hw_scoreboard * MB_CMD_IN_BYTES);
452     OUT_BCS_RELOC(batch, i965_h264_context->avc_it_data.bo,
453                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
454                   (i965_h264_context->avc_it_data.write_offset << 6));
455
456     if (i965_h264_context->enable_avc_ildb)
457         OUT_BCS_RELOC(batch, i965_h264_context->avc_ildb_data.bo,
458                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
459                       0);
460     else
461         OUT_BCS_BATCH(batch, 0);
462
463     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
464         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
465             int found = 0;
466             for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
467                 va_pic = &pic_param->ReferenceFrames[j];
468                 
469                 if (va_pic->flags & VA_PICTURE_H264_INVALID)
470                     continue;
471
472                 if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
473                     found = 1;
474                     break;
475                 }
476             }
477
478             assert(found == 1);
479
480             if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
481                 obj_surface = SURFACE(va_pic->picture_id);
482                 assert(obj_surface);
483                 avc_bsd_surface = obj_surface->private_data;
484             
485                 if (avc_bsd_surface == NULL) {
486                     OUT_BCS_BATCH(batch, 0);
487                     OUT_BCS_BATCH(batch, 0);
488                 } else {
489                     OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
490                                   I915_GEM_DOMAIN_INSTRUCTION, 0,
491                                   0);
492
493                     if (avc_bsd_surface->dmv_bottom_flag == 1)
494                         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom,
495                                       I915_GEM_DOMAIN_INSTRUCTION, 0,
496                                       0);
497                     else
498                         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
499                                       I915_GEM_DOMAIN_INSTRUCTION, 0,
500                                       0);
501                 }
502             } 
503         } else {
504             OUT_BCS_BATCH(batch, 0);
505             OUT_BCS_BATCH(batch, 0);
506         }
507     }
508
509     va_pic = &pic_param->CurrPic;
510     assert(!(va_pic->flags & VA_PICTURE_H264_INVALID));
511     obj_surface = SURFACE(va_pic->picture_id);
512     assert(obj_surface);
513     obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
514     obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
515     i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'));
516     i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context);
517     avc_bsd_surface = obj_surface->private_data;
518
519     OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
520                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
521                   0);
522
523     if (avc_bsd_surface->dmv_bottom_flag == 1)
524         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom,
525                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
526                       0);
527     else
528         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
529                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
530                       0);
531
532     /* POC List */
533     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
534         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
535             int found = 0;
536             for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
537                 va_pic = &pic_param->ReferenceFrames[j];
538                 
539                 if (va_pic->flags & VA_PICTURE_H264_INVALID)
540                     continue;
541
542                 if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
543                     found = 1;
544                     break;
545                 }
546             }
547
548             assert(found == 1);
549
550             if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
551                 OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
552                 OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
553             } 
554         } else {
555             OUT_BCS_BATCH(batch, 0);
556             OUT_BCS_BATCH(batch, 0);
557         }
558     }
559
560     va_pic = &pic_param->CurrPic;
561     OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
562     OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
563
564     ADVANCE_BCS_BATCH(batch);
565 }
566
567 /*
568  * Return the bit offset to the first bit of the slice data
569  *
570  * VASliceParameterBufferH264.slice_data_bit_offset will point into the part
571  * of slice header if there are some escaped bytes in the slice header. The offset 
572  * to slice data is needed for BSD unit so that BSD unit can fetch right slice data
573  * for processing. This fixes conformance case BASQP1_Sony_C.jsv
574  */
575 static int
576 i965_avc_bsd_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset)
577 {
578     int out_slice_data_bit_offset;
579     int slice_header_size = in_slice_data_bit_offset / 8;
580     int i, j;
581
582     for (i = 0, j = 0; i < slice_header_size; i++, j++) {
583         if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) {
584             i++, j += 2;
585         }
586     }
587
588     out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8;
589
590     if (mode_flag == ENTROPY_CABAC)
591         out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8);
592
593     return out_slice_data_bit_offset;
594 }
595
596 static void
597 g4x_avc_bsd_object(VADriverContextP ctx, 
598                    struct decode_state *decode_state,
599                    VAPictureParameterBufferH264 *pic_param,
600                    VASliceParameterBufferH264 *slice_param,
601                    int slice_index,
602                    struct i965_h264_context *i965_h264_context)
603 {
604     struct intel_batchbuffer *batch = i965_h264_context->batch;
605     int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
606     int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
607
608     if (slice_param) {
609         int encrypted, counter_value, cmd_len;
610         int slice_hor_pos, slice_ver_pos;
611         int num_ref_idx_l0, num_ref_idx_l1;
612         int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag &&
613                              pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
614         int slice_data_bit_offset;
615         int weighted_pred_idc = 0;
616         int first_mb_in_slice = 0;
617         int slice_type;
618         uint8_t *slice_data = NULL;
619
620         encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */
621
622         if (encrypted) {
623             cmd_len = 9;
624             counter_value = 0; /* FIXME: ??? */
625         } else 
626             cmd_len = 8;
627
628         dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0);
629         slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset);
630         slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data,
631                                                                   pic_param->pic_fields.bits.entropy_coding_mode_flag,
632                                                                   slice_param->slice_data_bit_offset);
633         dri_bo_unmap(decode_state->slice_datas[slice_index]->bo);
634
635         if (slice_param->slice_type == SLICE_TYPE_I ||
636             slice_param->slice_type == SLICE_TYPE_SI)
637             slice_type = SLICE_TYPE_I;
638         else if (slice_param->slice_type == SLICE_TYPE_P ||
639                  slice_param->slice_type == SLICE_TYPE_SP)
640             slice_type = SLICE_TYPE_P;
641         else {
642             assert(slice_param->slice_type == SLICE_TYPE_B);
643             slice_type = SLICE_TYPE_B;
644         }
645
646         if (slice_type == SLICE_TYPE_I) {
647             assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
648             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
649             num_ref_idx_l0 = 0;
650             num_ref_idx_l1 = 0;
651         } else if (slice_type == SLICE_TYPE_P) {
652             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
653             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
654             num_ref_idx_l1 = 0;
655         } else {
656             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
657             num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
658         }
659
660         if (slice_type == SLICE_TYPE_P)
661             weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag;
662         else if (slice_type == SLICE_TYPE_B)
663             weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
664
665         first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
666         slice_hor_pos = first_mb_in_slice % width_in_mbs; 
667         slice_ver_pos = first_mb_in_slice / width_in_mbs;
668
669         BEGIN_BCS_BATCH(batch, cmd_len);
670         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (cmd_len - 2));
671         OUT_BCS_BATCH(batch, 
672                       (encrypted << 31) |
673                       ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0));
674         OUT_BCS_BATCH(batch, 
675                       (slice_param->slice_data_offset +
676                        (slice_data_bit_offset >> 3)));
677         OUT_BCS_BATCH(batch, 
678                       (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */
679                       (0 << 14) | /* ignore BSDPrematureComplete Error handling */
680                       (0 << 13) | /* FIXME: ??? */
681                       (0 << 12) | /* ignore MPR Error handling */
682                       (0 << 10) | /* ignore Entropy Error handling */
683                       (0 << 8)  | /* ignore MB Header Error handling */
684                       (slice_type << 0));
685         OUT_BCS_BATCH(batch, 
686                       (num_ref_idx_l1 << 24) |
687                       (num_ref_idx_l0 << 16) |
688                       (slice_param->chroma_log2_weight_denom << 8) |
689                       (slice_param->luma_log2_weight_denom << 0));
690         OUT_BCS_BATCH(batch, 
691                       (weighted_pred_idc << 30) |
692                       (slice_param->direct_spatial_mv_pred_flag << 29) |
693                       (slice_param->disable_deblocking_filter_idc << 27) |
694                       (slice_param->cabac_init_idc << 24) |
695                       ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) |
696                       ((slice_param->slice_beta_offset_div2 & 0xf) << 8) |
697                       ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0));
698         OUT_BCS_BATCH(batch, 
699                       (slice_ver_pos << 24) |
700                       (slice_hor_pos << 16) | 
701                       (first_mb_in_slice << 0));
702         OUT_BCS_BATCH(batch, 
703                       (0 << 7) | /* FIXME: ??? */
704                       ((0x7 - (slice_data_bit_offset & 0x7)) << 0));
705
706         if (encrypted) {
707             OUT_BCS_BATCH(batch, counter_value);
708         }
709
710         ADVANCE_BCS_BATCH(batch); 
711     } else {
712         BEGIN_BCS_BATCH(batch, 8); 
713         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (8 - 2));
714         OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */
715         OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */
716         OUT_BCS_BATCH(batch, 0);
717         OUT_BCS_BATCH(batch, 0);
718         OUT_BCS_BATCH(batch, 0);
719         OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag));
720         OUT_BCS_BATCH(batch, 0);
721         ADVANCE_BCS_BATCH(batch);
722     }
723 }
724
725 static void
726 ironlake_avc_bsd_object(VADriverContextP ctx, 
727                         struct decode_state *decode_state,
728                         VAPictureParameterBufferH264 *pic_param,
729                         VASliceParameterBufferH264 *slice_param,
730                         int slice_index,
731                         struct i965_h264_context *i965_h264_context)
732 {
733     struct intel_batchbuffer *batch = i965_h264_context->batch;
734     int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
735     int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
736
737     if (slice_param) {
738         int encrypted, counter_value;
739         int slice_hor_pos, slice_ver_pos;
740         int num_ref_idx_l0, num_ref_idx_l1;
741         int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag &&
742                              pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
743         int slice_data_bit_offset;
744         int weighted_pred_idc = 0;
745         int first_mb_in_slice;
746         int slice_type;
747         uint8_t *slice_data = NULL;
748
749         encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */
750
751         if (encrypted) {
752             counter_value = 0; /* FIXME: ??? */
753         } else 
754             counter_value = 0;
755
756         dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0);
757         slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset);
758         slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data,
759                                                                   pic_param->pic_fields.bits.entropy_coding_mode_flag,
760                                                                   slice_param->slice_data_bit_offset);
761         dri_bo_unmap(decode_state->slice_datas[slice_index]->bo);
762
763         if (slice_param->slice_type == SLICE_TYPE_I ||
764             slice_param->slice_type == SLICE_TYPE_SI)
765             slice_type = SLICE_TYPE_I;
766         else if (slice_param->slice_type == SLICE_TYPE_P ||
767                  slice_param->slice_type == SLICE_TYPE_SP)
768             slice_type = SLICE_TYPE_P;
769         else {
770             assert(slice_param->slice_type == SLICE_TYPE_B);
771             slice_type = SLICE_TYPE_B;
772         }
773
774         if (slice_type == SLICE_TYPE_I) {
775             assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
776             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
777             num_ref_idx_l0 = 0;
778             num_ref_idx_l1 = 0;
779         } else if (slice_type == SLICE_TYPE_P) {
780             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
781             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
782             num_ref_idx_l1 = 0;
783         } else {
784             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
785             num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
786         }
787
788         if (slice_type == SLICE_TYPE_P)
789             weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag;
790         else if (slice_type == SLICE_TYPE_B)
791             weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
792
793         first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
794         slice_hor_pos = first_mb_in_slice % width_in_mbs; 
795         slice_ver_pos = first_mb_in_slice / width_in_mbs;
796
797         BEGIN_BCS_BATCH(batch, 16);
798         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2));
799         OUT_BCS_BATCH(batch, 
800                       (encrypted << 31) |
801                       (0 << 30) | /* FIXME: packet based bit stream */
802                       (0 << 29) | /* FIXME: packet format */
803                       ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0));
804         OUT_BCS_BATCH(batch, 
805                       (slice_param->slice_data_offset +
806                        (slice_data_bit_offset >> 3)));
807         OUT_BCS_BATCH(batch, 
808                       (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */
809                       (0 << 14) | /* ignore BSDPrematureComplete Error handling */
810                       (0 << 13) | /* FIXME: ??? */
811                       (0 << 12) | /* ignore MPR Error handling */
812                       (0 << 10) | /* ignore Entropy Error handling */
813                       (0 << 8)  | /* ignore MB Header Error handling */
814                       (slice_type << 0));
815         OUT_BCS_BATCH(batch, 
816                       (num_ref_idx_l1 << 24) |
817                       (num_ref_idx_l0 << 16) |
818                       (slice_param->chroma_log2_weight_denom << 8) |
819                       (slice_param->luma_log2_weight_denom << 0));
820         OUT_BCS_BATCH(batch, 
821                       (weighted_pred_idc << 30) |
822                       (slice_param->direct_spatial_mv_pred_flag << 29) |
823                       (slice_param->disable_deblocking_filter_idc << 27) |
824                       (slice_param->cabac_init_idc << 24) |
825                       ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) |
826                       ((slice_param->slice_beta_offset_div2 & 0xf) << 8) |
827                       ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0));
828         OUT_BCS_BATCH(batch, 
829                       (slice_ver_pos << 24) |
830                       (slice_hor_pos << 16) | 
831                       (first_mb_in_slice << 0));
832         OUT_BCS_BATCH(batch, 
833                       (0 << 7) | /* FIXME: ??? */
834                       ((0x7 - (slice_data_bit_offset & 0x7)) << 0));
835         OUT_BCS_BATCH(batch, counter_value);
836         
837         /* FIXME: dw9-dw11 */
838         OUT_BCS_BATCH(batch, 0);
839         OUT_BCS_BATCH(batch, 0);
840         OUT_BCS_BATCH(batch, 0);
841         OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l0);
842         OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l1);
843         OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l0);
844         OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l1);
845
846         ADVANCE_BCS_BATCH(batch); 
847     } else {
848         BEGIN_BCS_BATCH(batch, 16);
849         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2));
850         OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */
851         OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */
852         OUT_BCS_BATCH(batch, 0);
853         OUT_BCS_BATCH(batch, 0);
854         OUT_BCS_BATCH(batch, 0);
855         OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag));
856         OUT_BCS_BATCH(batch, 0);
857         OUT_BCS_BATCH(batch, 0);
858         OUT_BCS_BATCH(batch, 0);
859         OUT_BCS_BATCH(batch, 0);
860         OUT_BCS_BATCH(batch, 0);
861         OUT_BCS_BATCH(batch, 0);
862         OUT_BCS_BATCH(batch, 0);
863         OUT_BCS_BATCH(batch, 0);
864         OUT_BCS_BATCH(batch, 0);
865         ADVANCE_BCS_BATCH(batch);
866     }
867 }
868
869 static void
870 i965_avc_bsd_object(VADriverContextP ctx, 
871                     struct decode_state *decode_state,
872                     VAPictureParameterBufferH264 *pic_param,
873                     VASliceParameterBufferH264 *slice_param,
874                     int slice_index,
875                     struct i965_h264_context *i965_h264_context)
876 {
877     struct i965_driver_data *i965 = i965_driver_data(ctx);
878
879     if (IS_IRONLAKE(i965->intel.device_id))
880         ironlake_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
881     else
882         g4x_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
883 }
884
885 static void
886 i965_avc_bsd_phantom_slice(VADriverContextP ctx, 
887                            struct decode_state *decode_state,
888                            VAPictureParameterBufferH264 *pic_param,
889                            struct i965_h264_context *i965_h264_context)
890 {
891     i965_avc_bsd_object(ctx, decode_state, pic_param, NULL, 0, i965_h264_context);
892 }
893
894 static void
895 i965_avc_bsd_frame_store_index(VADriverContextP ctx,
896                                VAPictureParameterBufferH264 *pic_param,
897                                struct i965_h264_context *i965_h264_context)
898 {
899     struct i965_driver_data *i965 = i965_driver_data(ctx);
900     int i, j;
901
902     assert(ARRAY_ELEMS(i965_h264_context->fsid_list) == ARRAY_ELEMS(pic_param->ReferenceFrames));
903
904     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
905         int found = 0;
906
907         if (i965_h264_context->fsid_list[i].surface_id == VA_INVALID_ID)
908             continue;
909
910         for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
911             VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j];
912             if (ref_pic->flags & VA_PICTURE_H264_INVALID)
913                 continue;
914
915             if (i965_h264_context->fsid_list[i].surface_id == ref_pic->picture_id) {
916                 found = 1;
917                 break;
918             }
919         }
920
921         if (!found) {
922             struct object_surface *obj_surface = SURFACE(i965_h264_context->fsid_list[i].surface_id);
923             obj_surface->flags &= ~SURFACE_REFERENCED;
924
925             if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) {
926                 dri_bo_unreference(obj_surface->bo);
927                 obj_surface->bo = NULL;
928                 obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
929             }
930
931             if (obj_surface->free_private_data)
932                 obj_surface->free_private_data(&obj_surface->private_data);
933
934             i965_h264_context->fsid_list[i].surface_id = VA_INVALID_ID;
935             i965_h264_context->fsid_list[i].frame_store_id = -1;
936         }
937     }
938
939     for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) {
940         VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i];
941         int found = 0;
942
943         if (ref_pic->flags & VA_PICTURE_H264_INVALID)
944             continue;
945
946         for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
947             if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
948                 continue;
949             
950             if (i965_h264_context->fsid_list[j].surface_id == ref_pic->picture_id) {
951                 found = 1;
952                 break;
953             }
954         }
955
956         if (!found) {
957             int frame_idx;
958             struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
959             assert(obj_surface);
960             i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'));
961             
962             for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) {
963                 for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
964                     if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
965                         continue;
966
967                     if (i965_h264_context->fsid_list[j].frame_store_id == frame_idx)
968                         break;
969                 }
970
971                 if (j == ARRAY_ELEMS(i965_h264_context->fsid_list))
972                     break;
973             }
974
975             assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list));
976
977             for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
978                 if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) {
979                     i965_h264_context->fsid_list[j].surface_id = ref_pic->picture_id;
980                     i965_h264_context->fsid_list[j].frame_store_id = frame_idx;
981                     break;
982                 }
983             }
984         }
985     }
986
987     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list) - 1; i++) {
988         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID &&
989             i965_h264_context->fsid_list[i].frame_store_id == i)
990             continue;
991
992         for (j = i + 1; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
993             if (i965_h264_context->fsid_list[j].surface_id != VA_INVALID_ID &&
994                 i965_h264_context->fsid_list[j].frame_store_id == i) {
995                 VASurfaceID id = i965_h264_context->fsid_list[i].surface_id;
996                 int frame_idx = i965_h264_context->fsid_list[i].frame_store_id;
997
998                 i965_h264_context->fsid_list[i].surface_id = i965_h264_context->fsid_list[j].surface_id;
999                 i965_h264_context->fsid_list[i].frame_store_id = i965_h264_context->fsid_list[j].frame_store_id;
1000                 i965_h264_context->fsid_list[j].surface_id = id;
1001                 i965_h264_context->fsid_list[j].frame_store_id = frame_idx;
1002                 break;
1003             }
1004         }
1005     }
1006 }
1007
1008 void 
1009 i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context)
1010 {
1011     struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
1012     struct intel_batchbuffer *batch = i965_h264_context->batch;
1013     VAPictureParameterBufferH264 *pic_param;
1014     VASliceParameterBufferH264 *slice_param;
1015     int i, j;
1016
1017     assert(decode_state->pic_param && decode_state->pic_param->buffer);
1018     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
1019     i965_avc_bsd_frame_store_index(ctx, pic_param, i965_h264_context);
1020
1021     i965_h264_context->enable_avc_ildb = 0;
1022     i965_h264_context->picture.i_flag = 1;
1023
1024     for (j = 0; j < decode_state->num_slice_params && i965_h264_context->enable_avc_ildb == 0; j++) {
1025         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
1026         slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
1027
1028         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
1029             assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
1030             assert((slice_param->slice_type == SLICE_TYPE_I) ||
1031                    (slice_param->slice_type == SLICE_TYPE_SI) ||
1032                    (slice_param->slice_type == SLICE_TYPE_P) ||
1033                    (slice_param->slice_type == SLICE_TYPE_SP) ||
1034                    (slice_param->slice_type == SLICE_TYPE_B));
1035
1036             if (slice_param->disable_deblocking_filter_idc != 1) {
1037                 i965_h264_context->enable_avc_ildb = 1;
1038                 break;
1039             }
1040
1041             slice_param++;
1042         }
1043     }
1044
1045     intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
1046
1047     i965_avc_bsd_img_state(ctx, decode_state, i965_h264_context);
1048     i965_avc_bsd_qm_state(ctx, decode_state, i965_h264_context);
1049
1050     for (j = 0; j < decode_state->num_slice_params; j++) {
1051         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
1052         slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
1053
1054         i965_bsd_ind_obj_base_address(ctx, decode_state, j, i965_h264_context);
1055
1056         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
1057             assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
1058             assert((slice_param->slice_type == SLICE_TYPE_I) ||
1059                    (slice_param->slice_type == SLICE_TYPE_SI) ||
1060                    (slice_param->slice_type == SLICE_TYPE_P) ||
1061                    (slice_param->slice_type == SLICE_TYPE_SP) ||
1062                    (slice_param->slice_type == SLICE_TYPE_B));
1063
1064             if (i965_h264_context->picture.i_flag && 
1065                 (slice_param->slice_type != SLICE_TYPE_I ||
1066                  slice_param->slice_type != SLICE_TYPE_SI))
1067                 i965_h264_context->picture.i_flag = 0;
1068
1069             i965_avc_bsd_slice_state(ctx, pic_param, slice_param, i965_h264_context);
1070             i965_avc_bsd_buf_base_state(ctx, pic_param, slice_param, i965_h264_context);
1071             i965_avc_bsd_object(ctx, decode_state, pic_param, slice_param, j, i965_h264_context);
1072             slice_param++;
1073         }
1074     }
1075
1076     i965_avc_bsd_phantom_slice(ctx, decode_state, pic_param, i965_h264_context);
1077     intel_batchbuffer_emit_mi_flush(batch);
1078     intel_batchbuffer_end_atomic(batch);
1079     intel_batchbuffer_flush(batch);
1080 }
1081
1082 void 
1083 i965_avc_bsd_decode_init(VADriverContextP ctx, void *h264_context)
1084 {
1085     struct i965_driver_data *i965 = i965_driver_data(ctx);
1086     struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
1087     struct i965_avc_bsd_context *i965_avc_bsd_context;
1088     dri_bo *bo;
1089
1090     assert(i965_h264_context);
1091     i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
1092
1093     dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo);
1094     bo = dri_bo_alloc(i965->intel.bufmgr,
1095                       "bsd raw store",
1096                       0x3000, /* at least 11520 bytes to support 120 MBs per row */
1097                       64);
1098     assert(bo);
1099     i965_avc_bsd_context->bsd_raw_store.bo = bo;
1100
1101     dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo);
1102     bo = dri_bo_alloc(i965->intel.bufmgr,
1103                       "mpr row store",
1104                       0x2000, /* at least 7680 bytes to support 120 MBs per row */
1105                       64);
1106     assert(bo);
1107     i965_avc_bsd_context->mpr_row_store.bo = bo;
1108 }
1109
1110 Bool 
1111 i965_avc_bsd_ternimate(struct i965_avc_bsd_context *i965_avc_bsd_context)
1112 {
1113     dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo);
1114     dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo);
1115
1116     return True;
1117 }