src/i965_decoder_utils.h

   1 /*
   2  * Copyright (C) 2006-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #ifndef I965_DECODER_UTILS_H
  25 #define I965_DECODER_UTILS_H
  26
  27 #include "i965_decoder.h"
  28 #include "intel_batchbuffer.h"
  29
  30 struct decode_state;
  31
  32 int
  33 mpeg2_wa_slice_vertical_position(
  34     struct decode_state           *decode_state,
  35     VAPictureParameterBufferMPEG2 *pic_param
  36 );
  37
  38 void
  39 mpeg2_set_reference_surfaces(
  40     VADriverContextP               ctx,
  41     GenFrameStore                  ref_frames[MAX_GEN_REFERENCE_FRAMES],
  42     struct decode_state           *decode_state,
  43     VAPictureParameterBufferMPEG2 *pic_param
  44 );
  45
  46 VAStatus
  47 avc_ensure_surface_bo(
  48     VADriverContextP                    ctx,
  49     struct decode_state                *decode_state,
  50     struct object_surface              *obj_surface,
  51     const VAPictureParameterBufferH264 *pic_param
  52 );
  53
  54 void
  55 avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix);
  56
  57 int
  58 avc_get_picture_id(struct object_surface *obj_surface);
  59
  60 VAPictureH264 *
  61 avc_find_picture(VASurfaceID id, VAPictureH264 *pic_list, int pic_list_count);
  62
  63 unsigned int
  64 avc_get_first_mb_bit_offset(
  65     dri_bo                     *slice_data_bo,
  66     VASliceParameterBufferH264 *slice_param,
  67     unsigned int                mode_flag
  68 );
  69
  70 unsigned int
  71 avc_get_first_mb_bit_offset_with_epb(
  72     dri_bo                     *slice_data_bo,
  73     VASliceParameterBufferH264 *slice_param,
  74     unsigned int                mode_flag
  75 );
  76
  77 void
  78 gen5_fill_avc_ref_idx_state(
  79     uint8_t             state[32],
  80     const VAPictureH264 ref_list[32],
  81     unsigned int        ref_list_count,
  82     const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
  83 );
  84
  85 void
  86 gen6_send_avc_ref_idx_state(
  87     struct intel_batchbuffer         *batch,
  88     const VASliceParameterBufferH264 *slice_param,
  89     const GenFrameStore               frame_store[MAX_GEN_REFERENCE_FRAMES]
  90 );
  91
  92 void
  93 gen6_mfd_avc_phantom_slice(VADriverContextP ctx,
  94                            VAPictureParameterBufferH264 *pic_param,
  95                            VASliceParameterBufferH264 *next_slice_param,
  96                            struct intel_batchbuffer *batch
  97                           );
  98
  99 VAStatus
 100 intel_decoder_sanity_check_input(VADriverContextP ctx,
 101                                  VAProfile profile,
 102                                  struct decode_state *decode_state);
 103
 104 void
 105 intel_update_avc_frame_store_index(
 106     VADriverContextP                    ctx,
 107     struct decode_state                *decode_state,
 108     VAPictureParameterBufferH264       *pic_param,
 109     GenFrameStore                       frame_store[MAX_GEN_REFERENCE_FRAMES],
 110     GenFrameStoreContext               *fs_ctx
 111 );
 112
 113 void
 114 intel_update_hevc_frame_store_index(
 115     VADriverContextP              ctx,
 116     struct decode_state          *decode_state,
 117     VAPictureParameterBufferHEVC *pic_param,
 118     GenFrameStore                 frame_store[MAX_GEN_HCP_REFERENCE_FRAMES],
 119     GenFrameStoreContext         *fs_ctx
 120 );
 121
 122 void
 123 gen75_update_avc_frame_store_index(
 124     VADriverContextP                    ctx,
 125     struct decode_state                *decode_state,
 126     VAPictureParameterBufferH264       *pic_param,
 127     GenFrameStore                       frame_store[MAX_GEN_REFERENCE_FRAMES]
 128 );
 129
 130 bool
 131 gen75_fill_avc_picid_list(
 132     uint16_t                            pic_ids[16],
 133     GenFrameStore                       frame_store[MAX_GEN_REFERENCE_FRAMES]
 134 );
 135
 136 bool
 137 gen75_send_avc_picid_state(
 138     struct intel_batchbuffer           *batch,
 139     GenFrameStore                       frame_store[MAX_GEN_REFERENCE_FRAMES]
 140 );
 141
 142 #define VC1_I_PICTURE              0
 143 #define VC1_P_PICTURE              1
 144 #define VC1_B_PICTURE              2
 145 #define VC1_BI_PICTURE             3
 146 #define VC1_SKIPPED_PICTURE        4
 147
 148 void
 149 intel_update_vc1_frame_store_index(VADriverContextP ctx,
 150                                    struct decode_state *decode_state,
 151                                    VAPictureParameterBufferVC1 *pic_param,
 152                                    GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
 153
 154 VASliceParameterBufferMPEG2 *
 155 intel_mpeg2_find_next_slice(struct decode_state *decode_state,
 156                             VAPictureParameterBufferMPEG2 *pic_param,
 157                             VASliceParameterBufferMPEG2 *slice_param,
 158                             int *group_idx,
 159                             int *element_idx);
 160
 161
 162 void
 163 intel_update_vp8_frame_store_index(VADriverContextP ctx,
 164                                    struct decode_state *decode_state,
 165                                    VAPictureParameterBufferVP8 *pic_param,
 166                                    GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
 167
 168 void
 169 intel_update_vp9_frame_store_index(VADriverContextP ctx,
 170                                    struct decode_state *decode_state,
 171                                    VADecPictureParameterBufferVP9 *pic_param,
 172                                    GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
 173
 174 bool
 175 intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf,
 176                                      unsigned int mb_width, unsigned int mb_height);
 177
 178 void
 179 hevc_gen_default_iq_matrix(VAIQMatrixBufferHEVC *iq_matrix);
 180
 181 VAStatus
 182 hevc_ensure_surface_bo(
 183     VADriverContextP                    ctx,
 184     struct decode_state                *decode_state,
 185     struct object_surface              *obj_surface,
 186     const VAPictureParameterBufferHEVC *pic_param
 187 );
 188
 189 VAStatus
 190 vp9_ensure_surface_bo(
 191     VADriverContextP                    ctx,
 192     struct decode_state                *decode_state,
 193     struct object_surface              *obj_surface,
 194     const VADecPictureParameterBufferVP9 *pic_param
 195 );
 196 #endif /* I965_DECODER_UTILS_H */