2 * Copyright (C) 2006-2012 Intel Corporation
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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24 #ifndef I965_DECODER_UTILS_H
25 #define I965_DECODER_UTILS_H
27 #include "i965_decoder.h"
28 #include "intel_batchbuffer.h"
33 mpeg2_wa_slice_vertical_position(
34 struct decode_state *decode_state,
35 VAPictureParameterBufferMPEG2 *pic_param
39 mpeg2_set_reference_surfaces(
41 GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES],
42 struct decode_state *decode_state,
43 VAPictureParameterBufferMPEG2 *pic_param
47 avc_ensure_surface_bo(
49 struct decode_state *decode_state,
50 struct object_surface *obj_surface,
51 const VAPictureParameterBufferH264 *pic_param
55 avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix);
58 avc_get_picture_id(struct object_surface *obj_surface);
61 avc_find_picture(VASurfaceID id, VAPictureH264 *pic_list, int pic_list_count);
64 avc_get_first_mb_bit_offset(
65 dri_bo *slice_data_bo,
66 VASliceParameterBufferH264 *slice_param,
67 unsigned int mode_flag
71 avc_get_first_mb_bit_offset_with_epb(
72 dri_bo *slice_data_bo,
73 VASliceParameterBufferH264 *slice_param,
74 unsigned int mode_flag
78 gen5_fill_avc_ref_idx_state(
80 const VAPictureH264 ref_list[32],
81 unsigned int ref_list_count,
82 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
86 gen6_send_avc_ref_idx_state(
87 struct intel_batchbuffer *batch,
88 const VASliceParameterBufferH264 *slice_param,
89 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
93 gen6_mfd_avc_phantom_slice(VADriverContextP ctx,
94 VAPictureParameterBufferH264 *pic_param,
95 VASliceParameterBufferH264 *next_slice_param,
96 struct intel_batchbuffer *batch
100 intel_decoder_sanity_check_input(VADriverContextP ctx,
102 struct decode_state *decode_state);
105 intel_update_avc_frame_store_index(
106 VADriverContextP ctx,
107 struct decode_state *decode_state,
108 VAPictureParameterBufferH264 *pic_param,
109 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES],
110 GenFrameStoreContext *fs_ctx
114 intel_update_hevc_frame_store_index(
115 VADriverContextP ctx,
116 struct decode_state *decode_state,
117 VAPictureParameterBufferHEVC *pic_param,
118 GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES],
119 GenFrameStoreContext *fs_ctx
123 gen75_update_avc_frame_store_index(
124 VADriverContextP ctx,
125 struct decode_state *decode_state,
126 VAPictureParameterBufferH264 *pic_param,
127 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
131 gen75_fill_avc_picid_list(
132 uint16_t pic_ids[16],
133 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
137 gen75_send_avc_picid_state(
138 struct intel_batchbuffer *batch,
139 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
142 #define VC1_I_PICTURE 0
143 #define VC1_P_PICTURE 1
144 #define VC1_B_PICTURE 2
145 #define VC1_BI_PICTURE 3
146 #define VC1_SKIPPED_PICTURE 4
149 intel_update_vc1_frame_store_index(VADriverContextP ctx,
150 struct decode_state *decode_state,
151 VAPictureParameterBufferVC1 *pic_param,
152 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
154 VASliceParameterBufferMPEG2 *
155 intel_mpeg2_find_next_slice(struct decode_state *decode_state,
156 VAPictureParameterBufferMPEG2 *pic_param,
157 VASliceParameterBufferMPEG2 *slice_param,
163 intel_update_vp8_frame_store_index(VADriverContextP ctx,
164 struct decode_state *decode_state,
165 VAPictureParameterBufferVP8 *pic_param,
166 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
169 intel_update_vp9_frame_store_index(VADriverContextP ctx,
170 struct decode_state *decode_state,
171 VADecPictureParameterBufferVP9 *pic_param,
172 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
175 intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf,
176 unsigned int mb_width, unsigned int mb_height);
179 hevc_gen_default_iq_matrix(VAIQMatrixBufferHEVC *iq_matrix);
182 hevc_ensure_surface_bo(
183 VADriverContextP ctx,
184 struct decode_state *decode_state,
185 struct object_surface *obj_surface,
186 const VAPictureParameterBufferHEVC *pic_param
190 vp9_ensure_surface_bo(
191 VADriverContextP ctx,
192 struct decode_state *decode_state,
193 struct object_surface *obj_surface,
194 const VADecPictureParameterBufferVP9 *pic_param
196 #endif /* I965_DECODER_UTILS_H */