2 * Copyright ?2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
26 * Zou Nan hai <nanhai.zou@intel.com>
30 #ifndef _I965_DRV_VIDEO_H_
31 #define _I965_DRV_VIDEO_H_
34 #include <va/va_enc_h264.h>
35 #include <va/va_enc_mpeg2.h>
36 #include <va/va_enc_hevc.h>
37 #include <va/va_enc_jpeg.h>
38 #include <va/va_enc_vp8.h>
39 #include <va/va_vpp.h>
40 #include <va/va_backend.h>
41 #include <va/va_backend_vpp.h>
42 #include <va/va_fei.h>
43 #include <va/va_fei_h264.h>
45 #include "va_backend_compat.h"
47 #include "i965_mutext.h"
48 #include "object_heap.h"
49 #include "intel_driver.h"
50 #include "i965_fourcc.h"
52 #define I965_MAX_PROFILES 20
53 #define I965_MAX_ENTRYPOINTS 7
54 #define I965_MAX_CONFIG_ATTRIBUTES 32
55 #define I965_MAX_IMAGE_FORMATS 10
56 #define I965_MAX_SUBPIC_FORMATS 6
57 #define I965_MAX_SUBPIC_SUM 4
58 #define I965_MAX_SURFACE_ATTRIBUTES 32
60 #define INTEL_STR_DRIVER_VENDOR "Intel"
61 #define INTEL_STR_DRIVER_NAME "i965"
63 #define I965_SURFACE_TYPE_IMAGE 0
64 #define I965_SURFACE_TYPE_SURFACE 1
66 #define I965_SURFACE_FLAG_FRAME 0x00000000
67 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST 0x00000001
68 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST 0x00000002
70 #define DEFAULT_BRIGHTNESS 0
71 #define DEFAULT_CONTRAST 50
73 #define DEFAULT_SATURATION 50
75 #define ENCODER_QUALITY_RANGE 2
76 #define ENCODER_QUALITY_RANGE_AVC 7
77 #define ENCODER_QUALITY_RANGE_HEVC 7
78 #define ENCODER_DEFAULT_QUALITY 1
79 #define ENCODER_DEFAULT_QUALITY_AVC 4
80 #define ENCODER_DEFAULT_QUALITY_HEVC 4
81 #define ENCODER_HIGH_QUALITY ENCODER_DEFAULT_QUALITY
82 #define ENCODER_LOW_QUALITY 2
84 #define I965_MIN_CODEC_ENC_RESOLUTION_WIDTH_HEIGHT 32
85 #define I965_MAX_NUM_ROI_REGIONS 8
86 #define I965_MAX_NUM_SLICE 32
88 #define ENCODER_LP_QUALITY_RANGE 8
90 #define STATS_MAX_NUM_PAST_REFS 1
91 #define STATS_MAX_NUM_FUTURE_REFS 1
92 #define STATS_MAX_NUM_OUTPUTS 2
93 #define STATS_INTERLACED_SUPPORT 0
95 #define HAS_MPEG2_DECODING(ctx) ((ctx)->codec_info->has_mpeg2_decoding && \
98 #define HAS_MPEG2_ENCODING(ctx) ((ctx)->codec_info->has_mpeg2_encoding && \
101 #define HAS_H264_DECODING(ctx) ((ctx)->codec_info->has_h264_decoding && \
102 (ctx)->intel.has_bsd)
104 #define HAS_H264_ENCODING(ctx) ((ctx)->codec_info->has_h264_encoding && \
105 (ctx)->intel.has_bsd)
107 #define HAS_LP_H264_ENCODING(ctx) ((ctx)->codec_info->has_lp_h264_encoding && \
108 (ctx)->intel.has_bsd)
110 #define HAS_FEI_H264_ENCODING(ctx) ((ctx)->codec_info->has_fei_h264_encoding && \
111 (ctx)->intel.has_bsd)
113 #define HAS_H264_PREENC(ctx) ((ctx)->codec_info->has_h264_preenc)
115 #define HAS_VC1_DECODING(ctx) ((ctx)->codec_info->has_vc1_decoding && \
116 (ctx)->intel.has_bsd)
118 #define HAS_JPEG_DECODING(ctx) ((ctx)->codec_info->has_jpeg_decoding && \
119 (ctx)->intel.has_bsd)
121 #define HAS_JPEG_ENCODING(ctx) ((ctx)->codec_info->has_jpeg_encoding && \
122 (ctx)->intel.has_bsd)
124 #define HAS_VPP(ctx) ((ctx)->codec_info->has_vpp)
126 #define HAS_ACCELERATED_GETIMAGE(ctx) ((ctx)->codec_info->has_accelerated_getimage)
128 #define HAS_ACCELERATED_PUTIMAGE(ctx) ((ctx)->codec_info->has_accelerated_putimage)
130 #define HAS_TILED_SURFACE(ctx) ((ctx)->codec_info->has_tiled_surface)
132 #define HAS_VP8_DECODING(ctx) ((ctx)->codec_info->has_vp8_decoding && \
133 (ctx)->intel.has_bsd)
135 #define HAS_VP8_ENCODING(ctx) ((ctx)->codec_info->has_vp8_encoding && \
136 (ctx)->intel.has_bsd)
138 #define HAS_H264_MVC_DECODING(ctx) \
139 (HAS_H264_DECODING(ctx) && (ctx)->codec_info->h264_mvc_dec_profiles)
141 #define HAS_H264_MVC_DECODING_PROFILE(ctx, profile) \
142 (HAS_H264_MVC_DECODING(ctx) && \
143 ((ctx)->codec_info->h264_mvc_dec_profiles & (1U << profile)))
145 #define HAS_H264_MVC_ENCODING(ctx) ((ctx)->codec_info->has_h264_mvc_encoding && \
146 (ctx)->intel.has_bsd)
148 #define HAS_HEVC_DECODING(ctx) ((ctx)->codec_info->has_hevc_decoding && \
149 (ctx)->intel.has_bsd)
151 #define HAS_HEVC_ENCODING(ctx) ((ctx)->codec_info->has_hevc_encoding && \
152 (ctx)->intel.has_bsd)
154 #define HAS_VP9_DECODING(ctx) ((ctx)->codec_info->has_vp9_decoding && \
155 (ctx)->intel.has_bsd)
157 #define HAS_VP9_DECODING_PROFILE(ctx, profile) \
158 (HAS_VP9_DECODING(ctx) && \
159 ((ctx)->codec_info->vp9_dec_profiles & (1U << (profile - VAProfileVP9Profile0))))
161 #define HAS_HEVC10_DECODING(ctx) ((ctx)->codec_info->has_hevc10_decoding && \
162 (ctx)->intel.has_bsd)
163 #define HAS_HEVC10_ENCODING(ctx) ((ctx)->codec_info->has_hevc10_encoding && \
164 (ctx)->intel.has_bsd)
166 #define HAS_VPP_P010(ctx) ((ctx)->codec_info->has_vpp_p010 && \
167 (ctx)->intel.has_bsd)
169 #define HAS_VP9_ENCODING(ctx) ((ctx)->codec_info->has_vp9_encoding && \
170 (ctx)->intel.has_bsd)
172 #define HAS_VP9_ENCODING_PROFILE(ctx, profile) \
173 (HAS_VP9_ENCODING(ctx) && \
174 ((ctx)->codec_info->vp9_enc_profiles & (1U << (profile - VAProfileVP9Profile0))))
176 struct i965_surface {
177 struct object_base *base;
185 const uint32_t (*bin)[4];
188 unsigned int kernel_offset;
191 struct buffer_store {
192 unsigned char *buffer;
198 struct object_config {
199 struct object_base base;
201 VAEntrypoint entrypoint;
202 VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
205 VAGenericID wrapper_config;
208 #define NUM_SLICES 10
210 struct codec_state_base {
211 uint32_t chroma_formats;
214 struct decode_state {
215 struct codec_state_base base;
216 struct buffer_store *pic_param;
217 struct buffer_store **slice_params;
218 struct buffer_store *iq_matrix;
219 struct buffer_store *bit_plane;
220 struct buffer_store *huffman_table;
221 struct buffer_store **slice_datas;
222 struct buffer_store *probability_data;
223 VASurfaceID current_render_target;
224 int max_slice_params;
226 int num_slice_params;
229 struct object_surface *render_object;
230 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
233 #define SLICE_PACKED_DATA_INDEX_TYPE 0x80000000
234 #define SLICE_PACKED_DATA_INDEX_MASK 0x00FFFFFF
236 struct encode_state {
237 struct codec_state_base base;
238 struct buffer_store *iq_matrix;
239 struct buffer_store *q_matrix;
240 struct buffer_store *huffman_table;
243 struct buffer_store *seq_param_ext;
244 struct buffer_store *pic_param_ext;
245 struct buffer_store *packed_header_param[5];
246 struct buffer_store *packed_header_data[5];
247 struct buffer_store **slice_params_ext;
248 struct buffer_store *encmb_map;
249 int max_slice_params_ext;
250 int num_slice_params_ext;
252 /* Check the user-configurable packed_header attribute.
253 * Currently it is mainly used to check whether the packed slice_header data
254 * is provided by user or the driver.
255 * TBD: It will check for the packed SPS/PPS/MISC/RAWDATA and so on.
257 unsigned int packed_header_flag;
258 /* For the packed data that needs to be inserted into video clip */
259 /* currently it is mainly to track packed raw data and packed slice_header data. */
260 struct buffer_store **packed_header_params_ext;
261 int max_packed_header_params_ext;
262 int num_packed_header_params_ext;
263 struct buffer_store **packed_header_data_ext;
264 int max_packed_header_data_ext;
265 int num_packed_header_data_ext;
267 /* the index of current vps and sps ,special for HEVC*/
268 int vps_sps_seq_index;
269 /* the index of current slice */
271 /* the array is determined by max_slice_params_ext */
273 /* This is to store the first index of packed data for one slice */
274 int *slice_rawdata_index;
275 /* This is to store the number of packed data for one slice.
276 * Both packed rawdata and slice_header data are tracked by this
277 * variable. That is to say: When one packed slice_header is parsed,
278 * this variable will also be increased.
280 int *slice_rawdata_count;
282 /* This is to store the index of packed slice header for one slice */
283 int *slice_header_index;
285 int last_packed_header_type;
289 struct buffer_store *misc_param[19][8];
291 /* To store the VAStatsStatisticsParameterBufferType buffers */
292 struct buffer_store *stat_param_ext;
294 VASurfaceID current_render_target;
295 struct object_surface *input_yuv_object;
296 struct object_surface *reconstructed_object;
297 struct object_buffer *coded_buf_object;
298 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
302 struct codec_state_base base;
303 struct buffer_store *pipeline_param;
305 VASurfaceID current_render_target;
311 #define CODEC_PREENC 3
314 struct codec_state_base base;
315 struct decode_state decode;
316 struct encode_state encode;
317 struct proc_state proc;
321 VAStatus(*run)(VADriverContextP ctx,
323 union codec_state *codec_state,
324 struct hw_context *hw_context);
325 void (*destroy)(void *);
326 VAStatus(*get_status)(VADriverContextP ctx,
327 struct hw_context *hw_context,
329 struct intel_batchbuffer *batch;
332 struct object_context {
333 struct object_base base;
334 VAContextID context_id;
335 struct object_config *obj_config;
336 VASurfaceID *render_targets; //input->encode, output->decode
337 int num_render_targets;
342 union codec_state codec_state;
343 struct hw_context *hw_context;
345 VAGenericID wrapper_context;
348 #define SURFACE_REFERENCED (1 << 0)
349 #define SURFACE_DERIVED (1 << 2)
350 #define SURFACE_ALL_MASK ((SURFACE_REFERENCED) | \
353 struct object_surface {
354 struct object_base base;
355 VASurfaceStatus status;
356 VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
357 struct object_subpic *obj_subpic[I965_MAX_SUBPIC_SUM];
358 unsigned int subpic_render_idx;
360 int width; /* the pitch of plane 0 in bytes in horizontal direction */
361 int height; /* the pitch of plane 0 in bytes in vertical direction */
363 int orig_width; /* the width of plane 0 in pixels */
364 int orig_height; /* the height of plane 0 in pixels */
368 unsigned int expected_format;
369 VAImageID locked_image_id;
370 VAImageID derived_image_id;
371 void (*free_private_data)(void **data);
373 unsigned int subsampling;
381 /* user specified attributes see: VASurfaceAttribExternalBuffers/VA_SURFACE_ATTRIB_MEM_TYPE_VA */
382 uint32_t user_disable_tiling : 1;
383 uint32_t user_h_stride_set : 1;
384 uint32_t user_v_stride_set : 1;
385 /* we need clear right and bottom border for NV12.
386 * to avoid encode run to run issue*/
387 uint32_t border_cleared : 1;
389 VAGenericID wrapper_surface;
391 int exported_primefd;
394 struct object_buffer {
395 struct object_base base;
396 struct buffer_store *buffer_store;
397 int max_num_elements;
403 unsigned int export_refcount;
404 VABufferInfo export_state;
406 VAGenericID wrapper_buffer;
407 VAContextID context_id;
410 struct object_image {
411 struct object_base base;
414 unsigned int *palette;
415 VASurfaceID derived_surface;
418 struct object_subpic {
419 struct object_base base;
421 struct object_image *obj_image;
422 VARectangle src_rect;
423 VARectangle dst_rect;
433 #define I965_RING_NULL 0
434 #define I965_RING_BSD 1
435 #define I965_RING_BLT 2
436 #define I965_RING_VEBOX 3
439 VAProcFilterType type;
443 struct i965_driver_data;
445 struct hw_codec_info {
446 struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
447 struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
448 struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
449 bool (*render_init)(VADriverContextP);
450 void (*post_processing_context_init)(VADriverContextP, void *, struct intel_batchbuffer *);
451 void (*preinit_hw_codec)(VADriverContextP, struct hw_codec_info *);
454 * Allows HW info to support per-codec max resolution. If this functor is
455 * not initialized, then @max_width and @max_height will be used as the
456 * default maximum resolution for all codecs on this HW info.
458 void (*max_resolution)(struct i965_driver_data *, struct object_config *, int *, int *);
462 int min_linear_wpitch;
463 int min_linear_hpitch;
465 unsigned int h264_mvc_dec_profiles;
466 unsigned int vp9_dec_profiles;
467 unsigned int vp9_enc_profiles;
469 unsigned int h264_dec_chroma_formats;
470 unsigned int jpeg_dec_chroma_formats;
471 unsigned int jpeg_enc_chroma_formats;
472 unsigned int hevc_dec_chroma_formats;
473 unsigned int vp9_dec_chroma_formats;
475 unsigned int has_mpeg2_decoding: 1;
476 unsigned int has_mpeg2_encoding: 1;
477 unsigned int has_h264_decoding: 1;
478 unsigned int has_h264_encoding: 1;
479 unsigned int has_vc1_decoding: 1;
480 unsigned int has_vc1_encoding: 1;
481 unsigned int has_jpeg_decoding: 1;
482 unsigned int has_jpeg_encoding: 1;
483 unsigned int has_vpp: 1;
484 unsigned int has_accelerated_getimage: 1;
485 unsigned int has_accelerated_putimage: 1;
486 unsigned int has_tiled_surface: 1;
487 unsigned int has_di_motion_adptive: 1;
488 unsigned int has_di_motion_compensated: 1;
489 unsigned int has_vp8_decoding: 1;
490 unsigned int has_vp8_encoding: 1;
491 unsigned int has_h264_mvc_encoding: 1;
492 unsigned int has_hevc_decoding: 1;
493 unsigned int has_hevc_encoding: 1;
494 unsigned int has_hevc10_encoding: 1;
495 unsigned int has_hevc10_decoding: 1;
496 unsigned int has_vp9_decoding: 1;
497 unsigned int has_vpp_p010: 1;
498 unsigned int has_lp_h264_encoding: 1;
499 unsigned int has_vp9_encoding: 1;
500 unsigned int has_fei_h264_encoding: 1;
501 unsigned int has_h264_preenc: 1;
503 unsigned int lp_h264_brc_mode;
504 unsigned int h264_brc_mode;
506 unsigned int num_filters;
507 struct i965_filter filters[VAProcFilterCount];
511 #include "i965_render.h"
512 #include "i965_gpe_utils.h"
514 struct i965_driver_data {
515 struct intel_driver_data intel;
516 struct object_heap config_heap;
517 struct object_heap context_heap;
518 struct object_heap surface_heap;
519 struct object_heap buffer_heap;
520 struct object_heap image_heap;
521 struct object_heap subpic_heap;
522 struct hw_codec_info *codec_info;
524 _I965Mutex render_mutex;
526 struct intel_batchbuffer *batch;
527 struct intel_batchbuffer *pp_batch;
528 struct i965_render_state render_state;
532 VADisplayAttribute *display_attributes;
533 unsigned int num_display_attributes;
534 VADisplayAttribute *rotation_attrib;
535 VADisplayAttribute *brightness_attrib;
536 VADisplayAttribute *contrast_attrib;
537 VADisplayAttribute *hue_attrib;
538 VADisplayAttribute *saturation_attrib;
539 VAContextID current_context_id;
541 /* VA/DRI (X11) specific data */
542 struct va_dri_output *dri_output;
544 /* VA/Wayland specific data */
545 struct va_wl_output *wl_output;
547 VADriverContextP wrapper_pdrvctx;
549 struct i965_gpe_table gpe_table;
552 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
553 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
554 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
555 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
556 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
557 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
559 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
560 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
561 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
562 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
563 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
564 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
566 #define FOURCC_IA44 0x34344149
567 #define FOURCC_AI44 0x34344941
569 #define STRIDE(w) (((w) + 0xf) & ~0xf)
570 #define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1)))
572 static INLINE struct i965_driver_data *
573 i965_driver_data(VADriverContextP ctx)
575 return (struct i965_driver_data *)(ctx->pDriverData);
579 i965_check_alloc_surface_bo(VADriverContextP ctx,
580 struct object_surface *obj_surface,
583 unsigned int subsampling);
586 va_enc_packed_type_to_idx(int packed_type);
588 /* reserve 2 byte for internal using */
590 #define CODEC_MPEG2 1
591 #define CODEC_H264_MVC 2
597 #define H264_DELIMITER0 0x00
598 #define H264_DELIMITER1 0x00
599 #define H264_DELIMITER2 0x00
600 #define H264_DELIMITER3 0x00
601 #define H264_DELIMITER4 0x00
603 #define MPEG2_DELIMITER0 0x00
604 #define MPEG2_DELIMITER1 0x00
605 #define MPEG2_DELIMITER2 0x00
606 #define MPEG2_DELIMITER3 0x00
607 #define MPEG2_DELIMITER4 0xb0
609 #define HEVC_DELIMITER0 0x00
610 #define HEVC_DELIMITER1 0x00
611 #define HEVC_DELIMITER2 0x00
612 #define HEVC_DELIMITER3 0x00
613 #define HEVC_DELIMITER4 0x00
615 struct i965_coded_buffer_segment {
617 VACodedBufferSegment base;
618 unsigned char pad0[64]; /* change the size if sizeof(VACodedBufferSegment) > 64 */
623 unsigned int status_support;
626 unsigned int codec_private_data[512]; /* Store codec private data, must be 16-bytes aligned */
629 #define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 0x1000)
631 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
632 VABufferID buf_id, /* in */
633 void **pbuf); /* out */
635 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
637 extern VAStatus i965_DestroySurfaces(VADriverContextP ctx,
638 VASurfaceID *surface_list,
641 extern VAStatus i965_CreateSurfaces(VADriverContextP ctx,
646 VASurfaceID *surfaces);
648 #define I965_SURFACE_MEM_NATIVE 0
649 #define I965_SURFACE_MEM_GEM_FLINK 1
650 #define I965_SURFACE_MEM_DRM_PRIME 2
653 i965_destroy_surface_storage(struct object_surface *obj_surface);
655 // Logging functions for errors (to be shown to users) and info (useful for developers).
656 void i965_log_error(VADriverContextP ctx, const char *format, ...);
657 void i965_log_info(VADriverContextP ctx, const char *format, ...);
659 #endif /* _I965_DRV_VIDEO_H_ */