2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
26 * Zou Nan hai <nanhai.zou@intel.com>
30 #ifndef _I965_DRV_VIDEO_H_
31 #define _I965_DRV_VIDEO_H_
34 #include <va/va_enc_h264.h>
35 #include <va/va_enc_mpeg2.h>
36 #include <va/va_vpp.h>
37 #include <va/va_backend.h>
38 #include <va/va_backend_vpp.h>
40 #include "i965_mutext.h"
41 #include "object_heap.h"
42 #include "intel_driver.h"
44 #define I965_MAX_PROFILES 20
45 #define I965_MAX_ENTRYPOINTS 5
46 #define I965_MAX_CONFIG_ATTRIBUTES 10
47 #define I965_MAX_IMAGE_FORMATS 10
48 #define I965_MAX_SUBPIC_FORMATS 6
49 #define I965_MAX_SUBPIC_SUM 4
50 #define I965_MAX_SURFACE_ATTRIBUTES 16
52 #define INTEL_STR_DRIVER_VENDOR "Intel"
53 #define INTEL_STR_DRIVER_NAME "i965"
55 #define I965_SURFACE_TYPE_IMAGE 0
56 #define I965_SURFACE_TYPE_SURFACE 1
58 #define I965_SURFACE_FLAG_FRAME 0x00000000
59 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST 0x00000001
60 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST 0x00000002
62 #define DEFAULT_BRIGHTNESS 0
63 #define DEFAULT_CONTRAST 50
65 #define DEFAULT_SATURATION 50
69 struct object_base *base;
78 const uint32_t (*bin)[4];
81 unsigned int kernel_offset;
86 unsigned char *buffer;
94 struct object_base base;
96 VAEntrypoint entrypoint;
97 VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
101 #define NUM_SLICES 10
105 struct buffer_store *pic_param;
106 struct buffer_store **slice_params;
107 struct buffer_store *iq_matrix;
108 struct buffer_store *bit_plane;
109 struct buffer_store *huffman_table;
110 struct buffer_store **slice_datas;
111 struct buffer_store *probability_data;
112 VASurfaceID current_render_target;
113 int max_slice_params;
115 int num_slice_params;
118 struct object_surface *render_object;
119 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
124 struct buffer_store *seq_param;
125 struct buffer_store *pic_param;
126 struct buffer_store *pic_control;
127 struct buffer_store *iq_matrix;
128 struct buffer_store *q_matrix;
129 struct buffer_store **slice_params;
130 int max_slice_params;
131 int num_slice_params;
134 struct buffer_store *seq_param_ext;
135 struct buffer_store *pic_param_ext;
136 struct buffer_store *packed_header_param[4];
137 struct buffer_store *packed_header_data[4];
138 struct buffer_store **slice_params_ext;
139 int max_slice_params_ext;
140 int num_slice_params_ext;
141 int last_packed_header_type;
143 struct buffer_store *misc_param[16];
145 VASurfaceID current_render_target;
146 struct object_surface *input_yuv_object;
147 struct object_surface *reconstructed_object;
148 struct object_buffer *coded_buf_object;
149 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
154 struct buffer_store *pipeline_param;
156 VASurfaceID current_render_target;
165 struct decode_state decode;
166 struct encode_state encode;
167 struct proc_state proc;
172 VAStatus (*run)(VADriverContextP ctx,
174 union codec_state *codec_state,
175 struct hw_context *hw_context);
176 void (*destroy)(void *);
177 struct intel_batchbuffer *batch;
180 struct object_context
182 struct object_base base;
183 VAContextID context_id;
184 struct object_config *obj_config;
185 VASurfaceID *render_targets; //input->encode, output->decode
186 int num_render_targets;
191 union codec_state codec_state;
192 struct hw_context *hw_context;
195 #define SURFACE_REFERENCED (1 << 0)
196 #define SURFACE_DISPLAYED (1 << 1)
197 #define SURFACE_DERIVED (1 << 2)
198 #define SURFACE_REF_DIS_MASK ((SURFACE_REFERENCED) | \
200 #define SURFACE_ALL_MASK ((SURFACE_REFERENCED) | \
201 (SURFACE_DISPLAYED) | \
204 struct object_surface
206 struct object_base base;
207 VASurfaceStatus status;
208 VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
209 struct object_subpic *obj_subpic[I965_MAX_SUBPIC_SUM];
210 unsigned int subpic_render_idx;
212 int width; /* the pitch of plane 0 in bytes in horizontal direction */
213 int height; /* the pitch of plane 0 in bytes in vertical direction */
215 int orig_width; /* the width of plane 0 in pixels */
216 int orig_height; /* the height of plane 0 in pixels */
220 VAImageID locked_image_id;
221 void (*free_private_data)(void **data);
223 unsigned int subsampling;
231 /* user specified attributes see: VASurfaceAttribExternalBuffers/VA_SURFACE_ATTRIB_MEM_TYPE_VA */
232 uint32_t user_disable_tiling : 1;
233 uint32_t user_h_stride_set : 1;
234 uint32_t user_v_stride_set : 1;
239 struct object_base base;
240 struct buffer_store *buffer_store;
241 int max_num_elements;
249 struct object_base base;
252 unsigned int *palette;
253 VASurfaceID derived_surface;
258 struct object_base base;
260 struct object_image *obj_image;
261 VARectangle src_rect;
262 VARectangle dst_rect;
272 #define I965_RING_NULL 0
273 #define I965_RING_BSD 1
274 #define I965_RING_BLT 2
275 #define I965_RING_VEBOX 3
279 VAProcFilterType type;
285 struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
286 struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
287 struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
291 unsigned int has_mpeg2_decoding:1;
292 unsigned int has_mpeg2_encoding:1;
293 unsigned int has_h264_decoding:1;
294 unsigned int has_h264_encoding:1;
295 unsigned int has_vc1_decoding:1;
296 unsigned int has_vc1_encoding:1;
297 unsigned int has_jpeg_decoding:1;
298 unsigned int has_jpeg_encoding:1;
299 unsigned int has_vpp:1;
300 unsigned int has_accelerated_getimage:1;
301 unsigned int has_accelerated_putimage:1;
302 unsigned int has_tiled_surface:1;
303 unsigned int has_di_motion_adptive:1;
304 unsigned int has_di_motion_compensated:1;
305 unsigned int has_vp8_decoding:1;
306 unsigned int has_vp8_encoding:1;
308 unsigned int num_filters;
309 struct i965_filter filters[VAProcFilterCount];
313 #include "i965_render.h"
315 struct i965_driver_data
317 struct intel_driver_data intel;
318 struct object_heap config_heap;
319 struct object_heap context_heap;
320 struct object_heap surface_heap;
321 struct object_heap buffer_heap;
322 struct object_heap image_heap;
323 struct object_heap subpic_heap;
324 struct hw_codec_info *codec_info;
326 _I965Mutex render_mutex;
328 struct intel_batchbuffer *batch;
329 struct intel_batchbuffer *pp_batch;
330 struct i965_render_state render_state;
334 VADisplayAttribute *display_attributes;
335 unsigned int num_display_attributes;
336 VADisplayAttribute *rotation_attrib;
337 VADisplayAttribute *brightness_attrib;
338 VADisplayAttribute *contrast_attrib;
339 VADisplayAttribute *hue_attrib;
340 VADisplayAttribute *saturation_attrib;
341 VAContextID current_context_id;
343 /* VA/DRI (X11) specific data */
344 struct va_dri_output *dri_output;
346 /* VA/Wayland specific data */
347 struct va_wl_output *wl_output;
350 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
351 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
352 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
353 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
354 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
355 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
357 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
358 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
359 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
360 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
361 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
362 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
364 #define FOURCC_IA44 0x34344149
365 #define FOURCC_AI44 0x34344941
367 #define STRIDE(w) (((w) + 0xf) & ~0xf)
368 #define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1)))
370 static INLINE struct i965_driver_data *
371 i965_driver_data(VADriverContextP ctx)
373 return (struct i965_driver_data *)(ctx->pDriverData);
377 i965_check_alloc_surface_bo(VADriverContextP ctx,
378 struct object_surface *obj_surface,
381 unsigned int subsampling);
384 va_enc_packed_type_to_idx(int packed_type);
386 /* reserve 2 byte for internal using */
388 #define CODEC_MPEG2 1
390 #define H264_DELIMITER0 0x00
391 #define H264_DELIMITER1 0x00
392 #define H264_DELIMITER2 0x00
393 #define H264_DELIMITER3 0x00
394 #define H264_DELIMITER4 0x00
396 #define MPEG2_DELIMITER0 0x00
397 #define MPEG2_DELIMITER1 0x00
398 #define MPEG2_DELIMITER2 0x00
399 #define MPEG2_DELIMITER3 0x00
400 #define MPEG2_DELIMITER4 0xb0
402 struct i965_coded_buffer_segment
404 VACodedBufferSegment base;
405 unsigned char mapped;
409 #define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
411 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
412 VABufferID buf_id, /* in */
413 void **pbuf); /* out */
415 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
417 extern VAStatus i965_DestroySurfaces(VADriverContextP ctx,
418 VASurfaceID *surface_list,
421 #define I965_SURFACE_MEM_NATIVE 0
422 #define I965_SURFACE_MEM_GEM_FLINK 1
423 #define I965_SURFACE_MEM_DRM_PRIME 2
425 #endif /* _I965_DRV_VIDEO_H_ */