src/i965_drv_video.h

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *    Zou Nan hai <nanhai.zou@intel.com>
  27  *
  28  */
  29
  30 #ifndef _I965_DRV_VIDEO_H_
  31 #define _I965_DRV_VIDEO_H_
  32
  33 #include <va/va.h>
  34 #include <va/va_enc_h264.h>
  35 #include <va/va_enc_mpeg2.h>
  36 #include <va/va_vpp.h>
  37 #include <va/va_backend.h>
  38 #include <va/va_backend_vpp.h>
  39
  40 #include "i965_mutext.h"
  41 #include "object_heap.h"
  42 #include "intel_driver.h"
  43 #include "i965_fourcc.h"
  44
  45 #define I965_MAX_PROFILES                       20
  46 #define I965_MAX_ENTRYPOINTS                    5
  47 #define I965_MAX_CONFIG_ATTRIBUTES              10
  48 #define I965_MAX_IMAGE_FORMATS                  10
  49 #define I965_MAX_SUBPIC_FORMATS                 6
  50 #define I965_MAX_SUBPIC_SUM                     4
  51 #define I965_MAX_SURFACE_ATTRIBUTES             16
  52
  53 #define INTEL_STR_DRIVER_VENDOR                 "Intel"
  54 #define INTEL_STR_DRIVER_NAME                   "i965"
  55
  56 #define I965_SURFACE_TYPE_IMAGE                 0
  57 #define I965_SURFACE_TYPE_SURFACE               1
  58
  59 #define I965_SURFACE_FLAG_FRAME                 0x00000000
  60 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST       0x00000001
  61 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST   0x00000002
  62
  63 #define DEFAULT_BRIGHTNESS      0
  64 #define DEFAULT_CONTRAST        50
  65 #define DEFAULT_HUE             0
  66 #define DEFAULT_SATURATION      50
  67
  68 struct i965_surface
  69 {
  70     struct object_base *base;
  71     int type;
  72     int flags;
  73 };
  74
  75 struct i965_kernel
  76 {
  77     char *name;
  78     int interface;
  79     const uint32_t (*bin)[4];
  80     int size;
  81     dri_bo *bo;
  82     unsigned int kernel_offset;
  83 };
  84
  85 struct buffer_store
  86 {
  87     unsigned char *buffer;
  88     dri_bo *bo;
  89     int ref_count;
  90     int num_elements;
  91 };
  92
  93 struct object_config
  94 {
  95     struct object_base base;
  96     VAProfile profile;
  97     VAEntrypoint entrypoint;
  98     VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
  99     int num_attribs;
 100 };
 101
 102 #define NUM_SLICES     10
 103
 104 struct decode_state
 105 {
 106     struct buffer_store *pic_param;
 107     struct buffer_store **slice_params;
 108     struct buffer_store *iq_matrix;
 109     struct buffer_store *bit_plane;
 110     struct buffer_store *huffman_table;
 111     struct buffer_store **slice_datas;
 112     struct buffer_store *probability_data;
 113     VASurfaceID current_render_target;
 114     int max_slice_params;
 115     int max_slice_datas;
 116     int num_slice_params;
 117     int num_slice_datas;
 118
 119     struct object_surface *render_object;
 120     struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
 121 };
 122
 123 struct encode_state
 124 {
 125     struct buffer_store *seq_param;
 126     struct buffer_store *pic_param;
 127     struct buffer_store *pic_control;
 128     struct buffer_store *iq_matrix;
 129     struct buffer_store *q_matrix;
 130     struct buffer_store **slice_params;
 131     int max_slice_params;
 132     int num_slice_params;
 133
 134     /* for ext */
 135     struct buffer_store *seq_param_ext;
 136     struct buffer_store *pic_param_ext;
 137     struct buffer_store *packed_header_param[4];
 138     struct buffer_store *packed_header_data[4];
 139     struct buffer_store **slice_params_ext;
 140     int max_slice_params_ext;
 141     int num_slice_params_ext;
 142     int last_packed_header_type;
 143
 144     struct buffer_store *misc_param[16];
 145
 146     VASurfaceID current_render_target;
 147     struct object_surface *input_yuv_object;
 148     struct object_surface *reconstructed_object;
 149     struct object_buffer *coded_buf_object;
 150     struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
 151 };
 152
 153 struct proc_state
 154 {
 155     struct buffer_store *pipeline_param;
 156
 157     VASurfaceID current_render_target;
 158 };
 159
 160 #define CODEC_DEC       0
 161 #define CODEC_ENC       1
 162 #define CODEC_PROC      2
 163
 164 union codec_state
 165 {
 166     struct decode_state decode;
 167     struct encode_state encode;
 168     struct proc_state proc;
 169 };
 170
 171 struct hw_context
 172 {
 173     VAStatus (*run)(VADriverContextP ctx,
 174                     VAProfile profile,
 175                     union codec_state *codec_state,
 176                     struct hw_context *hw_context);
 177     void (*destroy)(void *);
 178     struct intel_batchbuffer *batch;
 179 };
 180
 181 struct object_context
 182 {
 183     struct object_base base;
 184     VAContextID context_id;
 185     struct object_config *obj_config;
 186     VASurfaceID *render_targets;                //input->encode, output->decode
 187     int num_render_targets;
 188     int picture_width;
 189     int picture_height;
 190     int flags;
 191     int codec_type;
 192     union codec_state codec_state;
 193     struct hw_context *hw_context;
 194 };
 195
 196 #define SURFACE_REFERENCED      (1 << 0)
 197 #define SURFACE_DISPLAYED       (1 << 1)
 198 #define SURFACE_DERIVED         (1 << 2)
 199 #define SURFACE_REF_DIS_MASK    ((SURFACE_REFERENCED) | \
 200                                  (SURFACE_DISPLAYED))
 201 #define SURFACE_ALL_MASK        ((SURFACE_REFERENCED) | \
 202                                  (SURFACE_DISPLAYED) |  \
 203                                  (SURFACE_DERIVED))
 204
 205 struct object_surface
 206 {
 207     struct object_base base;
 208     VASurfaceStatus status;
 209     VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
 210     struct object_subpic *obj_subpic[I965_MAX_SUBPIC_SUM];
 211     unsigned int subpic_render_idx;
 212
 213     int width;          /* the pitch of plane 0 in bytes in horizontal direction */
 214     int height;         /* the pitch of plane 0 in bytes in vertical direction */
 215     int size;
 216     int orig_width;     /* the width of plane 0 in pixels */
 217     int orig_height;    /* the height of plane 0 in pixels */
 218     int flags;
 219     unsigned int fourcc;
 220     dri_bo *bo;
 221     VAImageID locked_image_id;
 222     void (*free_private_data)(void **data);
 223     void *private_data;
 224     unsigned int subsampling;
 225     int x_cb_offset;
 226     int y_cb_offset;
 227     int x_cr_offset;
 228     int y_cr_offset;
 229     int cb_cr_width;
 230     int cb_cr_height;
 231     int cb_cr_pitch;
 232     /* user specified attributes see: VASurfaceAttribExternalBuffers/VA_SURFACE_ATTRIB_MEM_TYPE_VA */
 233     uint32_t user_disable_tiling : 1;
 234     uint32_t user_h_stride_set   : 1;
 235     uint32_t user_v_stride_set   : 1;
 236 };
 237
 238 struct object_buffer
 239 {
 240     struct object_base base;
 241     struct buffer_store *buffer_store;
 242     int max_num_elements;
 243     int num_elements;
 244     int size_element;
 245     VABufferType type;
 246 };
 247
 248 struct object_image
 249 {
 250     struct object_base base;
 251     VAImage image;
 252     dri_bo *bo;
 253     unsigned int *palette;
 254     VASurfaceID derived_surface;
 255 };
 256
 257 struct object_subpic
 258 {
 259     struct object_base base;
 260     VAImageID image;
 261     struct object_image *obj_image;
 262     VARectangle src_rect;
 263     VARectangle dst_rect;
 264     unsigned int format;
 265     int width;
 266     int height;
 267     int pitch;
 268     float global_alpha;
 269     dri_bo *bo;
 270     unsigned int flags;
 271 };
 272
 273 #define I965_RING_NULL  0
 274 #define I965_RING_BSD   1
 275 #define I965_RING_BLT   2
 276 #define I965_RING_VEBOX 3
 277
 278 struct i965_filter
 279 {
 280     VAProcFilterType type;
 281     int ring;
 282 };
 283
 284 struct hw_codec_info
 285 {
 286     struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
 287     struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
 288     struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
 289     bool (*render_init)(VADriverContextP);
 290
 291     int max_width;
 292     int max_height;
 293
 294     unsigned int has_mpeg2_decoding:1;
 295     unsigned int has_mpeg2_encoding:1;
 296     unsigned int has_h264_decoding:1;
 297     unsigned int has_h264_encoding:1;
 298     unsigned int has_vc1_decoding:1;
 299     unsigned int has_vc1_encoding:1;
 300     unsigned int has_jpeg_decoding:1;
 301     unsigned int has_jpeg_encoding:1;
 302     unsigned int has_vpp:1;
 303     unsigned int has_accelerated_getimage:1;
 304     unsigned int has_accelerated_putimage:1;
 305     unsigned int has_tiled_surface:1;
 306     unsigned int has_di_motion_adptive:1;
 307     unsigned int has_di_motion_compensated:1;
 308     unsigned int has_vp8_decoding:1;
 309     unsigned int has_vp8_encoding:1;
 310
 311     unsigned int num_filters;
 312     struct i965_filter filters[VAProcFilterCount];
 313 };
 314
 315
 316 #include "i965_render.h"
 317
 318 struct i965_driver_data
 319 {
 320     struct intel_driver_data intel;
 321     struct object_heap config_heap;
 322     struct object_heap context_heap;
 323     struct object_heap surface_heap;
 324     struct object_heap buffer_heap;
 325     struct object_heap image_heap;
 326     struct object_heap subpic_heap;
 327     const struct hw_codec_info *codec_info;
 328
 329     _I965Mutex render_mutex;
 330     _I965Mutex pp_mutex;
 331     struct intel_batchbuffer *batch;
 332     struct intel_batchbuffer *pp_batch;
 333     struct i965_render_state render_state;
 334     void *pp_context;
 335     char va_vendor[256];
 336
 337     VADisplayAttribute *display_attributes;
 338     unsigned int num_display_attributes;
 339     VADisplayAttribute *rotation_attrib;
 340     VADisplayAttribute *brightness_attrib;
 341     VADisplayAttribute *contrast_attrib;
 342     VADisplayAttribute *hue_attrib;
 343     VADisplayAttribute *saturation_attrib;
 344     VAContextID current_context_id;
 345
 346     /* VA/DRI (X11) specific data */
 347     struct va_dri_output *dri_output;
 348
 349     /* VA/Wayland specific data */
 350     struct va_wl_output *wl_output;
 351 };
 352
 353 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
 354 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
 355 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
 356 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
 357 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
 358 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
 359
 360 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
 361 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
 362 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
 363 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
 364 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
 365 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
 366
 367 #define FOURCC_IA44 0x34344149
 368 #define FOURCC_AI44 0x34344941
 369
 370 #define STRIDE(w)               (((w) + 0xf) & ~0xf)
 371 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
 372
 373 static INLINE struct i965_driver_data *
 374 i965_driver_data(VADriverContextP ctx)
 375 {
 376     return (struct i965_driver_data *)(ctx->pDriverData);
 377 }
 378
 379 VAStatus
 380 i965_check_alloc_surface_bo(VADriverContextP ctx,
 381                             struct object_surface *obj_surface,
 382                             int tiled,
 383                             unsigned int fourcc,
 384                             unsigned int subsampling);
 385
 386 int
 387 va_enc_packed_type_to_idx(int packed_type);
 388
 389 /* reserve 2 byte for internal using */
 390 #define CODEC_H264      0
 391 #define CODEC_MPEG2     1
 392
 393 #define H264_DELIMITER0 0x00
 394 #define H264_DELIMITER1 0x00
 395 #define H264_DELIMITER2 0x00
 396 #define H264_DELIMITER3 0x00
 397 #define H264_DELIMITER4 0x00
 398
 399 #define MPEG2_DELIMITER0        0x00
 400 #define MPEG2_DELIMITER1        0x00
 401 #define MPEG2_DELIMITER2        0x00
 402 #define MPEG2_DELIMITER3        0x00
 403 #define MPEG2_DELIMITER4        0xb0
 404
 405 struct i965_coded_buffer_segment
 406 {
 407     VACodedBufferSegment base;
 408     unsigned char mapped;
 409     unsigned char codec;
 410 };
 411
 412 #define I965_CODEDBUFFER_HEADER_SIZE   ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
 413
 414 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
 415                 VABufferID buf_id,       /* in */
 416                 void **pbuf);            /* out */
 417
 418 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
 419
 420 extern VAStatus i965_DestroySurfaces(VADriverContextP ctx,
 421                      VASurfaceID *surface_list,
 422                      int num_surfaces);
 423
 424 #define I965_SURFACE_MEM_NATIVE             0
 425 #define I965_SURFACE_MEM_GEM_FLINK          1
 426 #define I965_SURFACE_MEM_DRM_PRIME          2
 427
 428 #endif /* _I965_DRV_VIDEO_H_ */