2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
29 #ifndef __I965_POST_PROCESSING_H__
30 #define __I965_POST_PROCESSING_H__
32 #define MAX_PP_SURFACES 48
34 #define I965_PP_FLAG_TOP_FIELD 1
35 #define I965_PP_FLAG_BOTTOM_FIELD 2
36 #define I965_PP_FLAG_MCDI 4
37 #define I965_PP_FLAG_AVS 8
42 PP_NV12_LOAD_SAVE_N12,
43 PP_NV12_LOAD_SAVE_PL3,
54 PP_RGBX_LOAD_SAVE_NV12,
55 PP_NV12_LOAD_SAVE_RGBX,
59 struct i965_post_processing_context;
61 struct pp_load_save_context
69 struct pp_scaling_context
71 int dest_x; /* in pixel */
72 int dest_y; /* in pixel */
75 float src_normalized_x;
76 float src_normalized_y;
81 int dest_x; /* in pixel */
82 int dest_y; /* in pixel */
85 float src_normalized_x;
86 float src_normalized_y;
91 struct pp_dndi_context
105 struct i965_kernel kernel;
108 VAStatus (*initialize)(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
109 const struct i965_surface *src_surface,
110 const VARectangle *src_rect,
111 struct i965_surface *dst_surface,
112 const VARectangle *dst_rect,
116 struct pp_static_parameter
120 float procamp_constant_c0;
122 /* Load and Same r1.1 */
123 unsigned int source_packed_y_offset:8;
124 unsigned int source_packed_u_offset:8;
125 unsigned int source_packed_v_offset:8;
126 unsigned int source_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout
129 /* Load and Save r1.2 */
131 unsigned int destination_packed_y_offset:8;
132 unsigned int destination_packed_u_offset:8;
133 unsigned int destination_packed_v_offset:8;
139 unsigned int pad0:24;
140 unsigned int destination_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout
145 float procamp_constant_c1;
148 float procamp_constant_c2;
151 unsigned int statistics_surface_picth:16; /* Devided by 2 */
152 unsigned int pad1:16;
157 unsigned int pad0:24;
158 unsigned int top_field_first:8;
161 /* AVS/Scaling r1.6 */
162 float normalized_video_y_scaling_step;
166 float procamp_constant_c5;
171 float procamp_constant_c3;
177 float wg_csc_constant_c4;
180 float wg_csc_constant_c8;
183 float procamp_constant_c4;
192 float wg_csc_constant_c9;
197 float wg_csc_constant_c0;
200 float scaling_step_ratio;
203 float normalized_alpha_y_scaling;
206 float wg_csc_constant_c4;
209 float wg_csc_constant_c1;
212 int horizontal_origin_offset:16;
213 int vertical_origin_offset:16;
218 unsigned int color_pixel;
221 float wg_csc_constant_c2;
225 float wg_csc_constant_c3;
230 float wg_csc_constant_c6;
232 /* ALL r4.1 MBZ ???*/
239 unsigned int pad1:15;
241 unsigned int pad2:16;
246 unsigned int motion_history_coefficient_m2:8;
247 unsigned int motion_history_coefficient_m1:8;
248 unsigned int pad0:16;
253 float wg_csc_constant_c7;
256 float wg_csc_constant_c10;
259 float source_video_frame_normalized_horizontal_origin;
265 float wg_csc_constant_c11;
269 struct pp_inline_parameter
273 int destination_block_horizontal_origin:16;
274 int destination_block_vertical_origin:16;
279 float source_surface_block_normalized_horizontal_origin;
283 unsigned int variance_surface_vertical_origin:16;
284 unsigned int pad0:16;
288 /* AVS/Scaling r5.2 */
289 float source_surface_block_normalized_vertical_origin;
292 float alpha_surface_block_normalized_horizontal_origin;
295 float alpha_surface_block_normalized_vertical_origin;
298 unsigned int alpha_mask_x:16;
299 unsigned int alpha_mask_y:8;
300 unsigned int block_count_x:8;
303 /* we only support M*1 or 1*N block partitation now.
304 * -- it means asm code only need update this mask from grf6 for the last block
306 unsigned int block_horizontal_mask:16;
307 unsigned int block_vertical_mask:8;
308 unsigned int number_blocks:8;
310 /* AVS/Scaling r5.7 */
311 float normalized_video_x_scaling_step;
316 float video_step_delta;
318 /* r6.1 */ // sizeof(int) == 4?
319 unsigned int block_horizontal_mask_right:16;
320 unsigned int block_vertical_mask_bottom:8;
324 unsigned int block_horizontal_mask_middle:16;
325 unsigned int pad2:16;
328 unsigned int padx[5];
332 struct gen7_pp_static_parameter
336 unsigned int padx[6];
338 unsigned int di_statistics_surface_pitch_div2:16;
339 unsigned int di_statistics_surface_height_div4:16;
341 unsigned int di_top_field_first:8;
342 unsigned int pad0:16;
343 unsigned int pointer_to_inline_parameter:8; /* value: 7 */
351 unsigned int pad2:16;
352 unsigned int save_avs_rgb_swap:1; /* 0: RGB, 1: BGR */
353 unsigned int avs_wa_enable:1; /* must enabled for GEN7 */
354 unsigned int src_avs_rgb_swap:1;
355 /* Indicates whether the rgb is swapped for the src surface
356 * 0: RGBX(MSB. X-B-G-R). 1: BGRX(MSB: X-R-G-B)
358 unsigned int avs_wa_width:13;
361 float avs_wa_one_div_256_width;
364 float avs_wa_five_div_256_width;
367 unsigned int padx[3];
370 unsigned int di_destination_packed_y_component_offset:8;
371 unsigned int di_destination_packed_u_component_offset:8;
372 unsigned int di_destination_packed_v_component_offset:8;
377 float sampler_load_horizontal_scaling_step_ratio;
378 unsigned int padx[7];
382 float sampler_load_vertical_scaling_step;
384 unsigned int di_hoffset_svf_from_dvf:16;
385 unsigned int di_voffset_svf_from_dvf:16;
386 unsigned int padx[5];
390 float sampler_load_vertical_frame_origin;
391 unsigned int padx[7];
395 float sampler_load_horizontal_frame_origin;
396 unsigned int padx[7];
400 struct gen7_pp_inline_parameter
404 unsigned int destination_block_horizontal_origin:16;
405 unsigned int destination_block_vertical_origin:16;
406 /* r7.1: 0xffffffff */
407 unsigned int constant_0;
413 float sampler_load_main_video_x_scaling_step;
416 /* r7.6: must be zero */
417 unsigned int avs_vertical_block_number;
419 unsigned int group_id_number;
423 unsigned int padx[8];
427 struct i965_post_processing_context
430 struct pp_module pp_modules[NUM_PP_MODULES];
431 void *pp_static_parameter;
432 void *pp_inline_parameter;
436 } surface_state_binding_table;
444 int num_interface_descriptors;
455 } sampler_state_table;
460 unsigned int vfe_start;
461 unsigned int cs_start;
463 unsigned int num_vfe_entries;
464 unsigned int num_cs_entries;
466 unsigned int size_vfe_entry;
467 unsigned int size_cs_entry;
475 struct pp_load_save_context pp_load_save_context;
476 struct pp_scaling_context pp_scaling_context;
477 struct pp_avs_context pp_avs_context;
478 struct pp_dndi_context pp_dndi_context;
479 struct pp_dn_context pp_dn_context;
482 int (*pp_x_steps)(void *private_context);
483 int (*pp_y_steps)(void *private_context);
484 int (*pp_set_block_parameter)(struct i965_post_processing_context *pp_context, int x, int y);
486 struct intel_batchbuffer *batch;
488 unsigned int block_horizontal_mask_left:16;
489 unsigned int block_horizontal_mask_right:16;
490 unsigned int block_vertical_mask_bottom:8;
493 struct i965_proc_context
495 struct hw_context base;
496 struct i965_post_processing_context pp_context;
500 i965_post_processing(
501 VADriverContextP ctx,
503 const VARectangle *src_rect,
504 const VARectangle *dst_rect,
506 int *has_done_scaling
510 i965_scaling_processing(
511 VADriverContextP ctx,
512 VASurfaceID src_surface_id,
513 const VARectangle *src_rect,
514 VASurfaceID dst_surface_id,
515 const VARectangle *dst_rect,
520 i965_image_processing(VADriverContextP ctx,
521 const struct i965_surface *src_surface,
522 const VARectangle *src_rect,
523 struct i965_surface *dst_surface,
524 const VARectangle *dst_rect);
527 i965_post_processing_terminate(VADriverContextP ctx);
529 i965_post_processing_init(VADriverContextP ctx);
531 #endif /* __I965_POST_PROCESSING_H__ */