2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
29 #ifndef __I965_POST_PROCESSING_H__
30 #define __I965_POST_PROCESSING_H__
32 #define MAX_PP_SURFACES 48
34 #define I965_PP_FLAG_TOP_FIELD 1
35 #define I965_PP_FLAG_BOTTOM_FIELD 2
36 #define I965_PP_FLAG_MCDI 4
37 #define I965_PP_FLAG_AVS 8
42 PP_NV12_LOAD_SAVE_N12,
43 PP_NV12_LOAD_SAVE_PL3,
54 PP_RGBX_LOAD_SAVE_NV12,
55 PP_NV12_LOAD_SAVE_RGBX,
59 struct i965_post_processing_context;
61 struct pp_load_save_context
69 struct pp_scaling_context
71 int dest_x; /* in pixel */
72 int dest_y; /* in pixel */
75 float src_normalized_x;
76 float src_normalized_y;
81 int dest_x; /* in pixel */
82 int dest_y; /* in pixel */
85 float src_normalized_x;
86 float src_normalized_y;
92 struct pp_dndi_context
106 struct i965_kernel kernel;
109 VAStatus (*initialize)(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
110 const struct i965_surface *src_surface,
111 const VARectangle *src_rect,
112 struct i965_surface *dst_surface,
113 const VARectangle *dst_rect,
117 struct pp_static_parameter
121 float procamp_constant_c0;
123 /* Load and Same r1.1 */
124 unsigned int source_packed_y_offset:8;
125 unsigned int source_packed_u_offset:8;
126 unsigned int source_packed_v_offset:8;
127 unsigned int source_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout
130 /* Load and Save r1.2 */
132 unsigned int destination_packed_y_offset:8;
133 unsigned int destination_packed_u_offset:8;
134 unsigned int destination_packed_v_offset:8;
140 unsigned int pad0:24;
141 unsigned int destination_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout
146 float procamp_constant_c1;
149 float procamp_constant_c2;
152 unsigned int statistics_surface_picth:16; /* Devided by 2 */
153 unsigned int pad1:16;
158 unsigned int pad0:24;
159 unsigned int top_field_first:8;
162 /* AVS/Scaling r1.6 */
163 float normalized_video_y_scaling_step;
167 float procamp_constant_c5;
172 float procamp_constant_c3;
178 float wg_csc_constant_c4;
181 float wg_csc_constant_c8;
184 float procamp_constant_c4;
193 float wg_csc_constant_c9;
198 float wg_csc_constant_c0;
201 float scaling_step_ratio;
204 float normalized_alpha_y_scaling;
207 float wg_csc_constant_c4;
210 float wg_csc_constant_c1;
213 int horizontal_origin_offset:16;
214 int vertical_origin_offset:16;
219 unsigned int color_pixel;
222 float wg_csc_constant_c2;
226 float wg_csc_constant_c3;
231 float wg_csc_constant_c6;
233 /* ALL r4.1 MBZ ???*/
240 unsigned int pad1:15;
242 unsigned int pad2:16;
247 unsigned int motion_history_coefficient_m2:8;
248 unsigned int motion_history_coefficient_m1:8;
249 unsigned int pad0:16;
254 float wg_csc_constant_c7;
257 float wg_csc_constant_c10;
260 float source_video_frame_normalized_horizontal_origin;
266 float wg_csc_constant_c11;
270 struct pp_inline_parameter
274 int destination_block_horizontal_origin:16;
275 int destination_block_vertical_origin:16;
280 float source_surface_block_normalized_horizontal_origin;
284 unsigned int variance_surface_vertical_origin:16;
285 unsigned int pad0:16;
289 /* AVS/Scaling r5.2 */
290 float source_surface_block_normalized_vertical_origin;
293 float alpha_surface_block_normalized_horizontal_origin;
296 float alpha_surface_block_normalized_vertical_origin;
299 unsigned int alpha_mask_x:16;
300 unsigned int alpha_mask_y:8;
301 unsigned int block_count_x:8;
304 /* we only support M*1 or 1*N block partitation now.
305 * -- it means asm code only need update this mask from grf6 for the last block
307 unsigned int block_horizontal_mask:16;
308 unsigned int block_vertical_mask:8;
309 unsigned int number_blocks:8;
311 /* AVS/Scaling r5.7 */
312 float normalized_video_x_scaling_step;
317 float video_step_delta;
319 /* r6.1 */ // sizeof(int) == 4?
320 unsigned int block_horizontal_mask_right:16;
321 unsigned int block_vertical_mask_bottom:8;
325 unsigned int block_horizontal_mask_middle:16;
326 unsigned int pad2:16;
329 unsigned int padx[5];
333 struct gen7_pp_static_parameter
337 unsigned int padx[6];
339 unsigned int di_statistics_surface_pitch_div2:16;
340 unsigned int di_statistics_surface_height_div4:16;
342 unsigned int di_top_field_first:8;
343 unsigned int pad0:16;
344 unsigned int pointer_to_inline_parameter:8; /* value: 7 */
352 unsigned int pad2:16;
353 unsigned int save_avs_rgb_swap:1; /* 0: RGB, 1: BGR */
354 unsigned int avs_wa_enable:1; /* must enabled for GEN7 */
355 unsigned int src_avs_rgb_swap:1;
356 /* Indicates whether the rgb is swapped for the src surface
357 * 0: RGBX(MSB. X-B-G-R). 1: BGRX(MSB: X-R-G-B)
359 unsigned int avs_wa_width:13;
362 float avs_wa_one_div_256_width;
365 float avs_wa_five_div_256_width;
368 unsigned int padx[3];
371 unsigned int di_destination_packed_y_component_offset:8;
372 unsigned int di_destination_packed_u_component_offset:8;
373 unsigned int di_destination_packed_v_component_offset:8;
378 float sampler_load_horizontal_scaling_step_ratio;
379 unsigned int padx[7];
383 float sampler_load_vertical_scaling_step;
385 unsigned int di_hoffset_svf_from_dvf:16;
386 unsigned int di_voffset_svf_from_dvf:16;
387 unsigned int padx[5];
391 float sampler_load_vertical_frame_origin;
392 unsigned int padx[7];
396 float sampler_load_horizontal_frame_origin;
397 unsigned int padx[7];
401 struct gen7_pp_inline_parameter
405 unsigned int destination_block_horizontal_origin:16;
406 unsigned int destination_block_vertical_origin:16;
407 /* r7.1: 0xffffffff */
408 unsigned int constant_0;
414 float sampler_load_main_video_x_scaling_step;
417 /* r7.6: must be zero */
418 unsigned int avs_vertical_block_number;
420 unsigned int group_id_number;
424 unsigned int padx[8];
428 struct i965_post_processing_context
431 struct pp_module pp_modules[NUM_PP_MODULES];
432 void *pp_static_parameter;
433 void *pp_inline_parameter;
437 } surface_state_binding_table;
445 int num_interface_descriptors;
456 } sampler_state_table;
461 unsigned int vfe_start;
462 unsigned int cs_start;
464 unsigned int num_vfe_entries;
465 unsigned int num_cs_entries;
467 unsigned int size_vfe_entry;
468 unsigned int size_cs_entry;
476 struct pp_load_save_context pp_load_save_context;
477 struct pp_scaling_context pp_scaling_context;
478 struct pp_avs_context pp_avs_context;
479 struct pp_dndi_context pp_dndi_context;
480 struct pp_dn_context pp_dn_context;
483 int (*pp_x_steps)(void *private_context);
484 int (*pp_y_steps)(void *private_context);
485 int (*pp_set_block_parameter)(struct i965_post_processing_context *pp_context, int x, int y);
487 struct intel_batchbuffer *batch;
489 unsigned int block_horizontal_mask_left:16;
490 unsigned int block_horizontal_mask_right:16;
491 unsigned int block_vertical_mask_bottom:8;
494 struct i965_proc_context
496 struct hw_context base;
497 struct i965_post_processing_context pp_context;
501 i965_post_processing(
502 VADriverContextP ctx,
504 const VARectangle *src_rect,
505 const VARectangle *dst_rect,
507 int *has_done_scaling
511 i965_scaling_processing(
512 VADriverContextP ctx,
513 VASurfaceID src_surface_id,
514 const VARectangle *src_rect,
515 VASurfaceID dst_surface_id,
516 const VARectangle *dst_rect,
521 i965_image_processing(VADriverContextP ctx,
522 const struct i965_surface *src_surface,
523 const VARectangle *src_rect,
524 struct i965_surface *dst_surface,
525 const VARectangle *dst_rect);
528 i965_post_processing_terminate(VADriverContextP ctx);
530 i965_post_processing_init(VADriverContextP ctx);
532 #endif /* __I965_POST_PROCESSING_H__ */