2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
29 #ifndef __I965_POST_PROCESSING_H__
30 #define __I965_POST_PROCESSING_H__
32 #define MAX_PP_SURFACES 48
34 #define I965_PP_FLAG_TOP_FIELD 1
35 #define I965_PP_FLAG_BOTTOM_FIELD 2
36 #define I965_PP_FLAG_MCDI 4
37 #define I965_PP_FLAG_AVS 8
42 PP_NV12_LOAD_SAVE_N12,
43 PP_NV12_LOAD_SAVE_PL3,
55 PP_RGBX_LOAD_SAVE_NV12,
56 PP_NV12_LOAD_SAVE_RGBX,
60 struct i965_post_processing_context;
62 struct pp_load_save_context
70 struct pp_scaling_context
72 int dest_x; /* in pixel */
73 int dest_y; /* in pixel */
76 float src_normalized_x;
77 float src_normalized_y;
82 int dest_x; /* in pixel */
83 int dest_y; /* in pixel */
86 float src_normalized_x;
87 float src_normalized_y;
93 struct pp_dndi_context
107 struct i965_post_processing_context;
111 struct i965_kernel kernel;
114 VAStatus (*initialize)(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
115 const struct i965_surface *src_surface,
116 const VARectangle *src_rect,
117 struct i965_surface *dst_surface,
118 const VARectangle *dst_rect,
122 struct pp_static_parameter
126 float procamp_constant_c0;
128 /* Load and Same r1.1 */
129 unsigned int source_packed_y_offset:8;
130 unsigned int source_packed_u_offset:8;
131 unsigned int source_packed_v_offset:8;
132 unsigned int source_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout
135 /* Load and Save r1.2 */
137 unsigned int destination_packed_y_offset:8;
138 unsigned int destination_packed_u_offset:8;
139 unsigned int destination_packed_v_offset:8;
145 unsigned int pad0:24;
146 unsigned int destination_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout
151 float procamp_constant_c1;
154 float procamp_constant_c2;
157 unsigned int statistics_surface_picth:16; /* Devided by 2 */
158 unsigned int pad1:16;
163 unsigned int pad0:24;
164 unsigned int top_field_first:8;
167 /* AVS/Scaling r1.6 */
168 float normalized_video_y_scaling_step;
172 float procamp_constant_c5;
177 float procamp_constant_c3;
183 float wg_csc_constant_c4;
186 float wg_csc_constant_c8;
189 float procamp_constant_c4;
198 float wg_csc_constant_c9;
203 float wg_csc_constant_c0;
206 float scaling_step_ratio;
209 float normalized_alpha_y_scaling;
212 float wg_csc_constant_c4;
215 float wg_csc_constant_c1;
218 int horizontal_origin_offset:16;
219 int vertical_origin_offset:16;
224 unsigned int color_pixel;
227 float wg_csc_constant_c2;
231 float wg_csc_constant_c3;
236 float wg_csc_constant_c6;
238 /* ALL r4.1 MBZ ???*/
245 unsigned int pad1:15;
247 unsigned int pad2:16;
252 unsigned int motion_history_coefficient_m2:8;
253 unsigned int motion_history_coefficient_m1:8;
254 unsigned int pad0:16;
259 float wg_csc_constant_c7;
262 float wg_csc_constant_c10;
265 float source_video_frame_normalized_horizontal_origin;
271 float wg_csc_constant_c11;
275 struct pp_inline_parameter
279 int destination_block_horizontal_origin:16;
280 int destination_block_vertical_origin:16;
285 float source_surface_block_normalized_horizontal_origin;
289 unsigned int variance_surface_vertical_origin:16;
290 unsigned int pad0:16;
294 /* AVS/Scaling r5.2 */
295 float source_surface_block_normalized_vertical_origin;
298 float alpha_surface_block_normalized_horizontal_origin;
301 float alpha_surface_block_normalized_vertical_origin;
304 unsigned int alpha_mask_x:16;
305 unsigned int alpha_mask_y:8;
306 unsigned int block_count_x:8;
309 /* we only support M*1 or 1*N block partitation now.
310 * -- it means asm code only need update this mask from grf6 for the last block
312 unsigned int block_horizontal_mask:16;
313 unsigned int block_vertical_mask:8;
314 unsigned int number_blocks:8;
316 /* AVS/Scaling r5.7 */
317 float normalized_video_x_scaling_step;
322 float video_step_delta;
324 /* r6.1 */ // sizeof(int) == 4?
325 unsigned int block_horizontal_mask_right:16;
326 unsigned int block_vertical_mask_bottom:8;
330 unsigned int block_horizontal_mask_middle:16;
331 unsigned int pad2:16;
334 unsigned int padx[5];
338 struct gen7_pp_static_parameter
342 unsigned int padx[6];
344 unsigned int di_statistics_surface_pitch_div2:16;
345 unsigned int di_statistics_surface_height_div4:16;
347 unsigned int di_top_field_first:8;
348 unsigned int pad0:16;
349 unsigned int pointer_to_inline_parameter:8; /* value: 7 */
354 /* Indicates whether the rgb is swapped for the src surface
355 * 0: RGBX(MSB. X-B-G-R). 1: BGRX(MSB: X-R-G-B)
357 unsigned int src_avs_rgb_swap:1;
358 unsigned int pad3:31;
361 unsigned int pad2:16;
362 unsigned int save_avs_rgb_swap:1; /* 0: RGB, 1: BGR */
363 unsigned int avs_wa_enable:1; /* must enabled for GEN7 */
364 unsigned int ief_enable:1;
365 unsigned int avs_wa_width:13;
368 float avs_wa_one_div_256_width;
371 float avs_wa_five_div_256_width;
374 unsigned int padx[3];
377 unsigned int di_destination_packed_y_component_offset:8;
378 unsigned int di_destination_packed_u_component_offset:8;
379 unsigned int di_destination_packed_v_component_offset:8;
384 float sampler_load_horizontal_scaling_step_ratio;
385 unsigned int padx[7];
389 float sampler_load_vertical_scaling_step;
391 unsigned int di_hoffset_svf_from_dvf:16;
392 unsigned int di_voffset_svf_from_dvf:16;
393 unsigned int padx[5];
397 float sampler_load_vertical_frame_origin;
398 unsigned int padx[7];
402 float sampler_load_horizontal_frame_origin;
403 unsigned int padx[7];
407 struct gen7_pp_inline_parameter
411 unsigned int destination_block_horizontal_origin:16;
412 unsigned int destination_block_vertical_origin:16;
413 /* r7.1: 0xffffffff */
414 unsigned int constant_0;
420 float sampler_load_main_video_x_scaling_step;
423 /* r7.6: must be zero */
424 unsigned int avs_vertical_block_number;
426 unsigned int group_id_number;
430 unsigned int padx[8];
434 struct i965_post_processing_context
437 struct pp_module pp_modules[NUM_PP_MODULES];
438 void *pp_static_parameter;
439 void *pp_inline_parameter;
443 } surface_state_binding_table;
451 int num_interface_descriptors;
462 } sampler_state_table;
467 unsigned int vfe_start;
468 unsigned int cs_start;
470 unsigned int num_vfe_entries;
471 unsigned int num_cs_entries;
473 unsigned int size_vfe_entry;
474 unsigned int size_cs_entry;
477 struct pp_load_save_context pp_load_save_context;
478 struct pp_scaling_context pp_scaling_context;
479 struct pp_avs_context pp_avs_context;
480 struct pp_dndi_context pp_dndi_context;
481 struct pp_dn_context pp_dn_context;
482 void *private_context; /* pointer to the current private context */
484 int (*pp_x_steps)(void *private_context);
485 int (*pp_y_steps)(void *private_context);
486 int (*pp_set_block_parameter)(struct i965_post_processing_context *pp_context, int x, int y);
488 struct intel_batchbuffer *batch;
490 unsigned int block_horizontal_mask_left:16;
491 unsigned int block_horizontal_mask_right:16;
492 unsigned int block_vertical_mask_bottom:8;
495 struct i965_proc_context
497 struct hw_context base;
498 struct i965_post_processing_context pp_context;
502 i965_post_processing(
503 VADriverContextP ctx,
504 struct object_surface *obj_surface,
505 const VARectangle *src_rect,
506 const VARectangle *dst_rect,
508 int *has_done_scaling
512 i965_scaling_processing(
513 VADriverContextP ctx,
514 struct object_surface *src_surface_obj,
515 const VARectangle *src_rect,
516 struct object_surface *dst_surface_obj,
517 const VARectangle *dst_rect,
522 i965_image_processing(VADriverContextP ctx,
523 const struct i965_surface *src_surface,
524 const VARectangle *src_rect,
525 struct i965_surface *dst_surface,
526 const VARectangle *dst_rect);
529 i965_post_processing_terminate(VADriverContextP ctx);
531 i965_post_processing_init(VADriverContextP ctx);
533 #endif /* __I965_POST_PROCESSING_H__ */