2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "vk_format_info.h"
34 /** \file anv_cmd_buffer.c
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
62 .stencil_compare_mask = {
66 .stencil_write_mask = {
70 .stencil_reference = {
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
118 struct anv_cmd_state *state = &cmd_buffer->state;
120 memset(&state->descriptors, 0, sizeof(state->descriptors));
121 memset(&state->push_constants, 0, sizeof(state->push_constants));
122 memset(state->binding_tables, 0, sizeof(state->binding_tables));
123 memset(state->samplers, 0, sizeof(state->samplers));
125 /* 0 isn't a valid config. This ensures that we always configure L3$. */
126 cmd_buffer->state.current_l3_config = 0;
130 state->pending_pipe_bits = 0;
131 state->descriptors_dirty = 0;
132 state->push_constants_dirty = 0;
133 state->pipeline = NULL;
134 state->push_constant_stages = 0;
135 state->restart_index = UINT32_MAX;
136 state->dynamic = default_dynamic_state;
137 state->need_query_wa = true;
138 state->pma_fix_enabled = false;
139 state->hiz_enabled = false;
141 if (state->attachments != NULL) {
142 vk_free(&cmd_buffer->pool->alloc, state->attachments);
143 state->attachments = NULL;
146 state->gen7.index_buffer = NULL;
150 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
151 gl_shader_stage stage, uint32_t size)
153 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
156 *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
157 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
159 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
160 } else if ((*ptr)->size < size) {
161 *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
162 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
164 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
171 static VkResult anv_create_cmd_buffer(
172 struct anv_device * device,
173 struct anv_cmd_pool * pool,
174 VkCommandBufferLevel level,
175 VkCommandBuffer* pCommandBuffer)
177 struct anv_cmd_buffer *cmd_buffer;
180 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
181 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
182 if (cmd_buffer == NULL)
183 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
185 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
186 cmd_buffer->device = device;
187 cmd_buffer->pool = pool;
188 cmd_buffer->level = level;
189 cmd_buffer->state.attachments = NULL;
191 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
192 if (result != VK_SUCCESS)
195 anv_state_stream_init(&cmd_buffer->surface_state_stream,
196 &device->surface_state_block_pool);
197 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
198 &device->dynamic_state_block_pool);
200 memset(&cmd_buffer->state.push_descriptor, 0,
201 sizeof(cmd_buffer->state.push_descriptor));
204 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
206 /* Init the pool_link so we can safefly call list_del when we destroy
209 list_inithead(&cmd_buffer->pool_link);
212 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
217 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
222 VkResult anv_AllocateCommandBuffers(
224 const VkCommandBufferAllocateInfo* pAllocateInfo,
225 VkCommandBuffer* pCommandBuffers)
227 ANV_FROM_HANDLE(anv_device, device, _device);
228 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
230 VkResult result = VK_SUCCESS;
233 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
234 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
235 &pCommandBuffers[i]);
236 if (result != VK_SUCCESS)
240 if (result != VK_SUCCESS) {
241 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
243 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
244 pCommandBuffers[i] = VK_NULL_HANDLE;
251 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
253 list_del(&cmd_buffer->pool_link);
255 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
257 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
258 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
260 vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
261 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
264 void anv_FreeCommandBuffers(
266 VkCommandPool commandPool,
267 uint32_t commandBufferCount,
268 const VkCommandBuffer* pCommandBuffers)
270 for (uint32_t i = 0; i < commandBufferCount; i++) {
271 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
276 anv_cmd_buffer_destroy(cmd_buffer);
281 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
283 cmd_buffer->usage_flags = 0;
284 cmd_buffer->state.current_pipeline = UINT32_MAX;
285 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
286 anv_cmd_state_reset(cmd_buffer);
288 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
289 anv_state_stream_init(&cmd_buffer->surface_state_stream,
290 &cmd_buffer->device->surface_state_block_pool);
292 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
293 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
294 &cmd_buffer->device->dynamic_state_block_pool);
298 VkResult anv_ResetCommandBuffer(
299 VkCommandBuffer commandBuffer,
300 VkCommandBufferResetFlags flags)
302 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
303 return anv_cmd_buffer_reset(cmd_buffer);
307 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
309 switch (cmd_buffer->device->info.gen) {
311 if (cmd_buffer->device->info.is_haswell)
312 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
314 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
316 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
318 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
320 unreachable("unsupported gen\n");
324 void anv_CmdBindPipeline(
325 VkCommandBuffer commandBuffer,
326 VkPipelineBindPoint pipelineBindPoint,
327 VkPipeline _pipeline)
329 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
330 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
332 switch (pipelineBindPoint) {
333 case VK_PIPELINE_BIND_POINT_COMPUTE:
334 cmd_buffer->state.compute_pipeline = pipeline;
335 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
336 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
337 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
340 case VK_PIPELINE_BIND_POINT_GRAPHICS:
341 cmd_buffer->state.pipeline = pipeline;
342 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
343 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
344 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
345 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
347 /* Apply the dynamic state from the pipeline */
348 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
349 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
350 &pipeline->dynamic_state,
351 pipeline->dynamic_state_mask);
355 assert(!"invalid bind point");
360 void anv_CmdSetViewport(
361 VkCommandBuffer commandBuffer,
362 uint32_t firstViewport,
363 uint32_t viewportCount,
364 const VkViewport* pViewports)
366 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
368 const uint32_t total_count = firstViewport + viewportCount;
369 if (cmd_buffer->state.dynamic.viewport.count < total_count)
370 cmd_buffer->state.dynamic.viewport.count = total_count;
372 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
373 pViewports, viewportCount * sizeof(*pViewports));
375 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
378 void anv_CmdSetScissor(
379 VkCommandBuffer commandBuffer,
380 uint32_t firstScissor,
381 uint32_t scissorCount,
382 const VkRect2D* pScissors)
384 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
386 const uint32_t total_count = firstScissor + scissorCount;
387 if (cmd_buffer->state.dynamic.scissor.count < total_count)
388 cmd_buffer->state.dynamic.scissor.count = total_count;
390 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
391 pScissors, scissorCount * sizeof(*pScissors));
393 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
396 void anv_CmdSetLineWidth(
397 VkCommandBuffer commandBuffer,
400 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
402 cmd_buffer->state.dynamic.line_width = lineWidth;
403 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
406 void anv_CmdSetDepthBias(
407 VkCommandBuffer commandBuffer,
408 float depthBiasConstantFactor,
409 float depthBiasClamp,
410 float depthBiasSlopeFactor)
412 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
414 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
415 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
416 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
418 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
421 void anv_CmdSetBlendConstants(
422 VkCommandBuffer commandBuffer,
423 const float blendConstants[4])
425 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
427 memcpy(cmd_buffer->state.dynamic.blend_constants,
428 blendConstants, sizeof(float) * 4);
430 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
433 void anv_CmdSetDepthBounds(
434 VkCommandBuffer commandBuffer,
435 float minDepthBounds,
436 float maxDepthBounds)
438 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
440 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
441 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
443 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
446 void anv_CmdSetStencilCompareMask(
447 VkCommandBuffer commandBuffer,
448 VkStencilFaceFlags faceMask,
449 uint32_t compareMask)
451 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
453 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
454 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
455 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
456 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
458 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
461 void anv_CmdSetStencilWriteMask(
462 VkCommandBuffer commandBuffer,
463 VkStencilFaceFlags faceMask,
466 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
468 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
469 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
470 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
471 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
473 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
476 void anv_CmdSetStencilReference(
477 VkCommandBuffer commandBuffer,
478 VkStencilFaceFlags faceMask,
481 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
483 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
484 cmd_buffer->state.dynamic.stencil_reference.front = reference;
485 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
486 cmd_buffer->state.dynamic.stencil_reference.back = reference;
488 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
491 void anv_CmdBindDescriptorSets(
492 VkCommandBuffer commandBuffer,
493 VkPipelineBindPoint pipelineBindPoint,
494 VkPipelineLayout _layout,
496 uint32_t descriptorSetCount,
497 const VkDescriptorSet* pDescriptorSets,
498 uint32_t dynamicOffsetCount,
499 const uint32_t* pDynamicOffsets)
501 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
502 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
503 struct anv_descriptor_set_layout *set_layout;
505 assert(firstSet + descriptorSetCount < MAX_SETS);
507 for (uint32_t i = 0; i < descriptorSetCount; i++) {
508 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
509 set_layout = layout->set[firstSet + i].layout;
511 if (cmd_buffer->state.descriptors[firstSet + i] != set) {
512 cmd_buffer->state.descriptors[firstSet + i] = set;
513 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
516 if (set_layout->dynamic_offset_count > 0) {
517 anv_foreach_stage(s, set_layout->shader_stages) {
518 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, s, dynamic);
520 struct anv_push_constants *push =
521 cmd_buffer->state.push_constants[s];
523 unsigned d = layout->set[firstSet + i].dynamic_offset_start;
524 const uint32_t *offsets = pDynamicOffsets;
525 struct anv_descriptor *desc = set->descriptors;
527 for (unsigned b = 0; b < set_layout->binding_count; b++) {
528 if (set_layout->binding[b].dynamic_offset_index < 0)
531 unsigned array_size = set_layout->binding[b].array_size;
532 for (unsigned j = 0; j < array_size; j++) {
533 push->dynamic[d].offset = *(offsets++);
534 push->dynamic[d].range = (desc->buffer_view) ?
535 desc->buffer_view->range : 0;
541 cmd_buffer->state.push_constants_dirty |= set_layout->shader_stages;
546 void anv_CmdBindVertexBuffers(
547 VkCommandBuffer commandBuffer,
548 uint32_t firstBinding,
549 uint32_t bindingCount,
550 const VkBuffer* pBuffers,
551 const VkDeviceSize* pOffsets)
553 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
554 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
556 /* We have to defer setting up vertex buffer since we need the buffer
557 * stride from the pipeline. */
559 assert(firstBinding + bindingCount < MAX_VBS);
560 for (uint32_t i = 0; i < bindingCount; i++) {
561 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
562 vb[firstBinding + i].offset = pOffsets[i];
563 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
568 anv_isl_format_for_descriptor_type(VkDescriptorType type)
571 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
572 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
573 return ISL_FORMAT_R32G32B32A32_FLOAT;
575 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
576 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
577 return ISL_FORMAT_RAW;
580 unreachable("Invalid descriptor type");
585 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
586 const void *data, uint32_t size, uint32_t alignment)
588 struct anv_state state;
590 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
591 memcpy(state.map, data, size);
593 anv_state_flush(cmd_buffer->device, state);
595 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
601 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
602 uint32_t *a, uint32_t *b,
603 uint32_t dwords, uint32_t alignment)
605 struct anv_state state;
608 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
609 dwords * 4, alignment);
611 for (uint32_t i = 0; i < dwords; i++)
614 anv_state_flush(cmd_buffer->device, state);
616 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
622 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
623 gl_shader_stage stage)
625 /* If we don't have this stage, bail. */
626 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
627 return (struct anv_state) { .offset = 0 };
629 struct anv_push_constants *data =
630 cmd_buffer->state.push_constants[stage];
631 const struct brw_stage_prog_data *prog_data =
632 cmd_buffer->state.pipeline->shaders[stage]->prog_data;
634 /* If we don't actually have any push constants, bail. */
635 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
636 return (struct anv_state) { .offset = 0 };
638 struct anv_state state =
639 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
640 prog_data->nr_params * sizeof(float),
641 32 /* bottom 5 bits MBZ */);
643 /* Walk through the param array and fill the buffer with data */
644 uint32_t *u32_map = state.map;
645 for (unsigned i = 0; i < prog_data->nr_params; i++) {
646 uint32_t offset = (uintptr_t)prog_data->param[i];
647 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
650 anv_state_flush(cmd_buffer->device, state);
656 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
658 struct anv_push_constants *data =
659 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
660 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
661 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
662 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
664 /* If we don't actually have any push constants, bail. */
665 if (cs_prog_data->push.total.size == 0)
666 return (struct anv_state) { .offset = 0 };
668 const unsigned push_constant_alignment =
669 cmd_buffer->device->info.gen < 8 ? 32 : 64;
670 const unsigned aligned_total_push_constants_size =
671 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
672 struct anv_state state =
673 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
674 aligned_total_push_constants_size,
675 push_constant_alignment);
677 /* Walk through the param array and fill the buffer with data */
678 uint32_t *u32_map = state.map;
680 if (cs_prog_data->push.cross_thread.size > 0) {
681 assert(cs_prog_data->thread_local_id_index < 0 ||
682 cs_prog_data->thread_local_id_index >=
683 cs_prog_data->push.cross_thread.dwords);
685 i < cs_prog_data->push.cross_thread.dwords;
687 uint32_t offset = (uintptr_t)prog_data->param[i];
688 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
692 if (cs_prog_data->push.per_thread.size > 0) {
693 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
695 8 * (cs_prog_data->push.per_thread.regs * t +
696 cs_prog_data->push.cross_thread.regs);
697 unsigned src = cs_prog_data->push.cross_thread.dwords;
698 for ( ; src < prog_data->nr_params; src++, dst++) {
699 if (src != cs_prog_data->thread_local_id_index) {
700 uint32_t offset = (uintptr_t)prog_data->param[src];
701 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
703 u32_map[dst] = t * cs_prog_data->simd_size;
709 anv_state_flush(cmd_buffer->device, state);
714 void anv_CmdPushConstants(
715 VkCommandBuffer commandBuffer,
716 VkPipelineLayout layout,
717 VkShaderStageFlags stageFlags,
722 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
724 anv_foreach_stage(stage, stageFlags) {
725 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
727 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
731 cmd_buffer->state.push_constants_dirty |= stageFlags;
734 VkResult anv_CreateCommandPool(
736 const VkCommandPoolCreateInfo* pCreateInfo,
737 const VkAllocationCallbacks* pAllocator,
738 VkCommandPool* pCmdPool)
740 ANV_FROM_HANDLE(anv_device, device, _device);
741 struct anv_cmd_pool *pool;
743 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
744 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
746 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
749 pool->alloc = *pAllocator;
751 pool->alloc = device->alloc;
753 list_inithead(&pool->cmd_buffers);
755 *pCmdPool = anv_cmd_pool_to_handle(pool);
760 void anv_DestroyCommandPool(
762 VkCommandPool commandPool,
763 const VkAllocationCallbacks* pAllocator)
765 ANV_FROM_HANDLE(anv_device, device, _device);
766 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
771 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
772 &pool->cmd_buffers, pool_link) {
773 anv_cmd_buffer_destroy(cmd_buffer);
776 vk_free2(&device->alloc, pAllocator, pool);
779 VkResult anv_ResetCommandPool(
781 VkCommandPool commandPool,
782 VkCommandPoolResetFlags flags)
784 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
786 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
787 &pool->cmd_buffers, pool_link) {
788 anv_cmd_buffer_reset(cmd_buffer);
794 void anv_TrimCommandPoolKHR(
796 VkCommandPool commandPool,
797 VkCommandPoolTrimFlagsKHR flags)
799 /* Nothing for us to do here. Our pools stay pretty tidy. */
803 * Return NULL if the current subpass has no depthstencil attachment.
805 const struct anv_image_view *
806 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
808 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
809 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
811 if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED)
814 const struct anv_image_view *iview =
815 fb->attachments[subpass->depth_stencil_attachment];
817 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
818 VK_IMAGE_ASPECT_STENCIL_BIT));
823 void anv_CmdPushDescriptorSetKHR(
824 VkCommandBuffer commandBuffer,
825 VkPipelineBindPoint pipelineBindPoint,
826 VkPipelineLayout _layout,
828 uint32_t descriptorWriteCount,
829 const VkWriteDescriptorSet* pDescriptorWrites)
831 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
832 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
834 assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
835 pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
836 assert(_set < MAX_SETS);
838 const struct anv_descriptor_set_layout *set_layout =
839 layout->set[_set].layout;
840 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
842 set->layout = set_layout;
843 set->size = anv_descriptor_set_layout_size(set_layout);
844 set->buffer_count = set_layout->buffer_count;
845 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
847 /* Go through the user supplied descriptors. */
848 for (uint32_t i = 0; i < descriptorWriteCount; i++) {
849 const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
851 switch (write->descriptorType) {
852 case VK_DESCRIPTOR_TYPE_SAMPLER:
853 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
854 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
855 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
856 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
857 for (uint32_t j = 0; j < write->descriptorCount; j++) {
858 anv_descriptor_set_write_image_view(set,
859 write->descriptorType,
860 write->pImageInfo[j].imageView,
861 write->pImageInfo[j].sampler,
863 write->dstArrayElement + j);
867 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
868 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
869 for (uint32_t j = 0; j < write->descriptorCount; j++) {
870 ANV_FROM_HANDLE(anv_buffer_view, bview,
871 write->pTexelBufferView[j]);
873 anv_descriptor_set_write_buffer_view(set,
874 write->descriptorType,
877 write->dstArrayElement + j);
881 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
882 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
883 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
884 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
885 for (uint32_t j = 0; j < write->descriptorCount; j++) {
886 assert(write->pBufferInfo[j].buffer);
887 ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
890 anv_descriptor_set_write_buffer(set,
892 &cmd_buffer->surface_state_stream,
893 write->descriptorType,
896 write->dstArrayElement + j,
897 write->pBufferInfo[j].offset,
898 write->pBufferInfo[j].range);
907 cmd_buffer->state.descriptors[_set] = set;
908 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;