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anv/cmd_buffer: Rework anv_cmd_state_reset
[android-x86/external-mesa.git] / src / intel / vulkan / anv_cmd_buffer.c
1 /*
2  * Copyright © 2015 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "vk_format_info.h"
33
34 /** \file anv_cmd_buffer.c
35  *
36  * This file contains all of the stuff for emitting commands into a command
37  * buffer.  This includes implementations of most of the vkCmd*
38  * entrypoints.  This file is concerned entirely with state emission and
39  * not with the command buffer data structure itself.  As far as this file
40  * is concerned, most of anv_cmd_buffer is magic.
41  */
42
43 /* TODO: These are taken from GLES.  We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
45    .viewport = {
46       .count = 0,
47    },
48    .scissor = {
49       .count = 0,
50    },
51    .line_width = 1.0f,
52    .depth_bias = {
53       .bias = 0.0f,
54       .clamp = 0.0f,
55       .slope = 0.0f,
56    },
57    .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
58    .depth_bounds = {
59       .min = 0.0f,
60       .max = 1.0f,
61    },
62    .stencil_compare_mask = {
63       .front = ~0u,
64       .back = ~0u,
65    },
66    .stencil_write_mask = {
67       .front = ~0u,
68       .back = ~0u,
69    },
70    .stencil_reference = {
71       .front = 0u,
72       .back = 0u,
73    },
74 };
75
76 void
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78                        const struct anv_dynamic_state *src,
79                        uint32_t copy_mask)
80 {
81    if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82       dest->viewport.count = src->viewport.count;
83       typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
84                    src->viewport.count);
85    }
86
87    if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88       dest->scissor.count = src->scissor.count;
89       typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
90                    src->scissor.count);
91    }
92
93    if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94       dest->line_width = src->line_width;
95
96    if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97       dest->depth_bias = src->depth_bias;
98
99    if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100       typed_memcpy(dest->blend_constants, src->blend_constants, 4);
101
102    if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103       dest->depth_bounds = src->depth_bounds;
104
105    if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106       dest->stencil_compare_mask = src->stencil_compare_mask;
107
108    if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109       dest->stencil_write_mask = src->stencil_write_mask;
110
111    if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112       dest->stencil_reference = src->stencil_reference;
113 }
114
115 static void
116 anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
117 {
118    struct anv_cmd_state *state = &cmd_buffer->state;
119
120    memset(state, 0, sizeof(*state));
121
122    state->restart_index = UINT32_MAX;
123    state->dynamic = default_dynamic_state;
124 }
125
126 static void
127 anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
128 {
129    struct anv_cmd_state *state = &cmd_buffer->state;
130
131    for (uint32_t i = 0; i < ARRAY_SIZE(state->push_descriptors); i++)
132       vk_free(&cmd_buffer->pool->alloc, state->push_descriptors[i]);
133
134    for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++)
135       vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
136
137    vk_free(&cmd_buffer->pool->alloc, state->attachments);
138 }
139
140 static void
141 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
142 {
143    anv_cmd_state_finish(cmd_buffer);
144    anv_cmd_state_init(cmd_buffer);
145 }
146
147 VkResult
148 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
149                                           gl_shader_stage stage, uint32_t size)
150 {
151    struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
152
153    if (*ptr == NULL) {
154       *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
155                        VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
156       if (*ptr == NULL) {
157          anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
158          return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
159       }
160    } else if ((*ptr)->size < size) {
161       *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
162                          VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
163       if (*ptr == NULL) {
164          anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
165          return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
166       }
167    }
168    (*ptr)->size = size;
169
170    return VK_SUCCESS;
171 }
172
173 static VkResult anv_create_cmd_buffer(
174     struct anv_device *                         device,
175     struct anv_cmd_pool *                       pool,
176     VkCommandBufferLevel                        level,
177     VkCommandBuffer*                            pCommandBuffer)
178 {
179    struct anv_cmd_buffer *cmd_buffer;
180    VkResult result;
181
182    cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
183                           VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
184    if (cmd_buffer == NULL)
185       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
186
187    cmd_buffer->batch.status = VK_SUCCESS;
188
189    cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
190    cmd_buffer->device = device;
191    cmd_buffer->pool = pool;
192    cmd_buffer->level = level;
193
194    result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
195    if (result != VK_SUCCESS)
196       goto fail;
197
198    anv_state_stream_init(&cmd_buffer->surface_state_stream,
199                          &device->surface_state_pool, 4096);
200    anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
201                          &device->dynamic_state_pool, 16384);
202
203    anv_cmd_state_init(cmd_buffer);
204
205    if (pool) {
206       list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
207    } else {
208       /* Init the pool_link so we can safefly call list_del when we destroy
209        * the command buffer
210        */
211       list_inithead(&cmd_buffer->pool_link);
212    }
213
214    *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
215
216    return VK_SUCCESS;
217
218  fail:
219    vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
220
221    return result;
222 }
223
224 VkResult anv_AllocateCommandBuffers(
225     VkDevice                                    _device,
226     const VkCommandBufferAllocateInfo*          pAllocateInfo,
227     VkCommandBuffer*                            pCommandBuffers)
228 {
229    ANV_FROM_HANDLE(anv_device, device, _device);
230    ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
231
232    VkResult result = VK_SUCCESS;
233    uint32_t i;
234
235    for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
236       result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
237                                      &pCommandBuffers[i]);
238       if (result != VK_SUCCESS)
239          break;
240    }
241
242    if (result != VK_SUCCESS) {
243       anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
244                              i, pCommandBuffers);
245       for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
246          pCommandBuffers[i] = VK_NULL_HANDLE;
247    }
248
249    return result;
250 }
251
252 static void
253 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
254 {
255    list_del(&cmd_buffer->pool_link);
256
257    anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
258
259    anv_state_stream_finish(&cmd_buffer->surface_state_stream);
260    anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
261
262    anv_cmd_state_finish(cmd_buffer);
263
264    vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
265 }
266
267 void anv_FreeCommandBuffers(
268     VkDevice                                    device,
269     VkCommandPool                               commandPool,
270     uint32_t                                    commandBufferCount,
271     const VkCommandBuffer*                      pCommandBuffers)
272 {
273    for (uint32_t i = 0; i < commandBufferCount; i++) {
274       ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
275
276       if (!cmd_buffer)
277          continue;
278
279       anv_cmd_buffer_destroy(cmd_buffer);
280    }
281 }
282
283 VkResult
284 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
285 {
286    cmd_buffer->usage_flags = 0;
287    cmd_buffer->state.current_pipeline = UINT32_MAX;
288    anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
289    anv_cmd_state_reset(cmd_buffer);
290
291    anv_state_stream_finish(&cmd_buffer->surface_state_stream);
292    anv_state_stream_init(&cmd_buffer->surface_state_stream,
293                          &cmd_buffer->device->surface_state_pool, 4096);
294
295    anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
296    anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
297                          &cmd_buffer->device->dynamic_state_pool, 16384);
298    return VK_SUCCESS;
299 }
300
301 VkResult anv_ResetCommandBuffer(
302     VkCommandBuffer                             commandBuffer,
303     VkCommandBufferResetFlags                   flags)
304 {
305    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
306    return anv_cmd_buffer_reset(cmd_buffer);
307 }
308
309 void
310 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
311 {
312    switch (cmd_buffer->device->info.gen) {
313    case 7:
314       if (cmd_buffer->device->info.is_haswell)
315          return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
316       else
317          return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
318    case 8:
319       return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
320    case 9:
321       return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
322    case 10:
323       return gen10_cmd_buffer_emit_state_base_address(cmd_buffer);
324    default:
325       unreachable("unsupported gen\n");
326    }
327 }
328
329 void anv_CmdBindPipeline(
330     VkCommandBuffer                             commandBuffer,
331     VkPipelineBindPoint                         pipelineBindPoint,
332     VkPipeline                                  _pipeline)
333 {
334    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
335    ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
336
337    switch (pipelineBindPoint) {
338    case VK_PIPELINE_BIND_POINT_COMPUTE:
339       cmd_buffer->state.compute_pipeline = pipeline;
340       cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
341       cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
342       cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
343       break;
344
345    case VK_PIPELINE_BIND_POINT_GRAPHICS:
346       cmd_buffer->state.pipeline = pipeline;
347       cmd_buffer->state.vb_dirty |= pipeline->vb_used;
348       cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
349       cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
350       cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
351
352       /* Apply the dynamic state from the pipeline */
353       cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
354       anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
355                              &pipeline->dynamic_state,
356                              pipeline->dynamic_state_mask);
357       break;
358
359    default:
360       assert(!"invalid bind point");
361       break;
362    }
363 }
364
365 void anv_CmdSetViewport(
366     VkCommandBuffer                             commandBuffer,
367     uint32_t                                    firstViewport,
368     uint32_t                                    viewportCount,
369     const VkViewport*                           pViewports)
370 {
371    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
372
373    const uint32_t total_count = firstViewport + viewportCount;
374    if (cmd_buffer->state.dynamic.viewport.count < total_count)
375       cmd_buffer->state.dynamic.viewport.count = total_count;
376
377    memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
378           pViewports, viewportCount * sizeof(*pViewports));
379
380    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
381 }
382
383 void anv_CmdSetScissor(
384     VkCommandBuffer                             commandBuffer,
385     uint32_t                                    firstScissor,
386     uint32_t                                    scissorCount,
387     const VkRect2D*                             pScissors)
388 {
389    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
390
391    const uint32_t total_count = firstScissor + scissorCount;
392    if (cmd_buffer->state.dynamic.scissor.count < total_count)
393       cmd_buffer->state.dynamic.scissor.count = total_count;
394
395    memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
396           pScissors, scissorCount * sizeof(*pScissors));
397
398    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
399 }
400
401 void anv_CmdSetLineWidth(
402     VkCommandBuffer                             commandBuffer,
403     float                                       lineWidth)
404 {
405    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
406
407    cmd_buffer->state.dynamic.line_width = lineWidth;
408    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
409 }
410
411 void anv_CmdSetDepthBias(
412     VkCommandBuffer                             commandBuffer,
413     float                                       depthBiasConstantFactor,
414     float                                       depthBiasClamp,
415     float                                       depthBiasSlopeFactor)
416 {
417    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
418
419    cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
420    cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
421    cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
422
423    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
424 }
425
426 void anv_CmdSetBlendConstants(
427     VkCommandBuffer                             commandBuffer,
428     const float                                 blendConstants[4])
429 {
430    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
431
432    memcpy(cmd_buffer->state.dynamic.blend_constants,
433           blendConstants, sizeof(float) * 4);
434
435    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
436 }
437
438 void anv_CmdSetDepthBounds(
439     VkCommandBuffer                             commandBuffer,
440     float                                       minDepthBounds,
441     float                                       maxDepthBounds)
442 {
443    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
444
445    cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
446    cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
447
448    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
449 }
450
451 void anv_CmdSetStencilCompareMask(
452     VkCommandBuffer                             commandBuffer,
453     VkStencilFaceFlags                          faceMask,
454     uint32_t                                    compareMask)
455 {
456    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
457
458    if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
459       cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
460    if (faceMask & VK_STENCIL_FACE_BACK_BIT)
461       cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
462
463    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
464 }
465
466 void anv_CmdSetStencilWriteMask(
467     VkCommandBuffer                             commandBuffer,
468     VkStencilFaceFlags                          faceMask,
469     uint32_t                                    writeMask)
470 {
471    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
472
473    if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
474       cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
475    if (faceMask & VK_STENCIL_FACE_BACK_BIT)
476       cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
477
478    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
479 }
480
481 void anv_CmdSetStencilReference(
482     VkCommandBuffer                             commandBuffer,
483     VkStencilFaceFlags                          faceMask,
484     uint32_t                                    reference)
485 {
486    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
487
488    if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
489       cmd_buffer->state.dynamic.stencil_reference.front = reference;
490    if (faceMask & VK_STENCIL_FACE_BACK_BIT)
491       cmd_buffer->state.dynamic.stencil_reference.back = reference;
492
493    cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
494 }
495
496 void anv_CmdBindDescriptorSets(
497     VkCommandBuffer                             commandBuffer,
498     VkPipelineBindPoint                         pipelineBindPoint,
499     VkPipelineLayout                            _layout,
500     uint32_t                                    firstSet,
501     uint32_t                                    descriptorSetCount,
502     const VkDescriptorSet*                      pDescriptorSets,
503     uint32_t                                    dynamicOffsetCount,
504     const uint32_t*                             pDynamicOffsets)
505 {
506    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
507    ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
508    struct anv_descriptor_set_layout *set_layout;
509
510    assert(firstSet + descriptorSetCount < MAX_SETS);
511
512    uint32_t dynamic_slot = 0;
513    for (uint32_t i = 0; i < descriptorSetCount; i++) {
514       ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
515       set_layout = layout->set[firstSet + i].layout;
516
517       cmd_buffer->state.descriptors[firstSet + i] = set;
518
519       if (set_layout->dynamic_offset_count > 0) {
520          uint32_t dynamic_offset_start =
521             layout->set[firstSet + i].dynamic_offset_start;
522
523          /* Assert that everything is in range */
524          assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
525                 ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
526          assert(dynamic_slot + set_layout->dynamic_offset_count <=
527                 dynamicOffsetCount);
528
529          typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
530                       &pDynamicOffsets[dynamic_slot],
531                       set_layout->dynamic_offset_count);
532
533          dynamic_slot += set_layout->dynamic_offset_count;
534       }
535
536       cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
537    }
538 }
539
540 void anv_CmdBindVertexBuffers(
541     VkCommandBuffer                             commandBuffer,
542     uint32_t                                    firstBinding,
543     uint32_t                                    bindingCount,
544     const VkBuffer*                             pBuffers,
545     const VkDeviceSize*                         pOffsets)
546 {
547    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
548    struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
549
550    /* We have to defer setting up vertex buffer since we need the buffer
551     * stride from the pipeline. */
552
553    assert(firstBinding + bindingCount <= MAX_VBS);
554    for (uint32_t i = 0; i < bindingCount; i++) {
555       vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
556       vb[firstBinding + i].offset = pOffsets[i];
557       cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
558    }
559 }
560
561 enum isl_format
562 anv_isl_format_for_descriptor_type(VkDescriptorType type)
563 {
564    switch (type) {
565    case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
566    case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
567       return ISL_FORMAT_R32G32B32A32_FLOAT;
568
569    case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
570    case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
571       return ISL_FORMAT_RAW;
572
573    default:
574       unreachable("Invalid descriptor type");
575    }
576 }
577
578 struct anv_state
579 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
580                             const void *data, uint32_t size, uint32_t alignment)
581 {
582    struct anv_state state;
583
584    state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
585    memcpy(state.map, data, size);
586
587    anv_state_flush(cmd_buffer->device, state);
588
589    VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
590
591    return state;
592 }
593
594 struct anv_state
595 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
596                              uint32_t *a, uint32_t *b,
597                              uint32_t dwords, uint32_t alignment)
598 {
599    struct anv_state state;
600    uint32_t *p;
601
602    state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
603                                               dwords * 4, alignment);
604    p = state.map;
605    for (uint32_t i = 0; i < dwords; i++)
606       p[i] = a[i] | b[i];
607
608    anv_state_flush(cmd_buffer->device, state);
609
610    VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
611
612    return state;
613 }
614
615 static uint32_t
616 anv_push_constant_value(struct anv_push_constants *data, uint32_t param)
617 {
618    if (BRW_PARAM_IS_BUILTIN(param)) {
619       switch (param) {
620       case BRW_PARAM_BUILTIN_ZERO:
621          return 0;
622       default:
623          unreachable("Invalid param builtin");
624       }
625    } else {
626       uint32_t offset = ANV_PARAM_PUSH_OFFSET(param);
627       assert(offset % sizeof(uint32_t) == 0);
628       if (offset < data->size)
629          return *(uint32_t *)((uint8_t *)data + offset);
630       else
631          return 0;
632    }
633 }
634
635 struct anv_state
636 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
637                               gl_shader_stage stage)
638 {
639    /* If we don't have this stage, bail. */
640    if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
641       return (struct anv_state) { .offset = 0 };
642
643    struct anv_push_constants *data =
644       cmd_buffer->state.push_constants[stage];
645    const struct brw_stage_prog_data *prog_data =
646       cmd_buffer->state.pipeline->shaders[stage]->prog_data;
647
648    /* If we don't actually have any push constants, bail. */
649    if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
650       return (struct anv_state) { .offset = 0 };
651
652    struct anv_state state =
653       anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
654                                          prog_data->nr_params * sizeof(float),
655                                          32 /* bottom 5 bits MBZ */);
656
657    /* Walk through the param array and fill the buffer with data */
658    uint32_t *u32_map = state.map;
659    for (unsigned i = 0; i < prog_data->nr_params; i++)
660       u32_map[i] = anv_push_constant_value(data, prog_data->param[i]);
661
662    anv_state_flush(cmd_buffer->device, state);
663
664    return state;
665 }
666
667 struct anv_state
668 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
669 {
670    struct anv_push_constants *data =
671       cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
672    struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
673    const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
674    const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
675
676    /* If we don't actually have any push constants, bail. */
677    if (cs_prog_data->push.total.size == 0)
678       return (struct anv_state) { .offset = 0 };
679
680    const unsigned push_constant_alignment =
681       cmd_buffer->device->info.gen < 8 ? 32 : 64;
682    const unsigned aligned_total_push_constants_size =
683       ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
684    struct anv_state state =
685       anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
686                                          aligned_total_push_constants_size,
687                                          push_constant_alignment);
688
689    /* Walk through the param array and fill the buffer with data */
690    uint32_t *u32_map = state.map;
691
692    if (cs_prog_data->push.cross_thread.size > 0) {
693       for (unsigned i = 0;
694            i < cs_prog_data->push.cross_thread.dwords;
695            i++) {
696          assert(prog_data->param[i] != BRW_PARAM_BUILTIN_SUBGROUP_ID);
697          u32_map[i] = anv_push_constant_value(data, prog_data->param[i]);
698       }
699    }
700
701    if (cs_prog_data->push.per_thread.size > 0) {
702       for (unsigned t = 0; t < cs_prog_data->threads; t++) {
703          unsigned dst =
704             8 * (cs_prog_data->push.per_thread.regs * t +
705                  cs_prog_data->push.cross_thread.regs);
706          unsigned src = cs_prog_data->push.cross_thread.dwords;
707          for ( ; src < prog_data->nr_params; src++, dst++) {
708             if (prog_data->param[src] == BRW_PARAM_BUILTIN_SUBGROUP_ID) {
709                u32_map[dst] = t;
710             } else {
711                u32_map[dst] =
712                   anv_push_constant_value(data, prog_data->param[src]);
713             }
714          }
715       }
716    }
717
718    anv_state_flush(cmd_buffer->device, state);
719
720    return state;
721 }
722
723 void anv_CmdPushConstants(
724     VkCommandBuffer                             commandBuffer,
725     VkPipelineLayout                            layout,
726     VkShaderStageFlags                          stageFlags,
727     uint32_t                                    offset,
728     uint32_t                                    size,
729     const void*                                 pValues)
730 {
731    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
732
733    anv_foreach_stage(stage, stageFlags) {
734       VkResult result =
735          anv_cmd_buffer_ensure_push_constant_field(cmd_buffer,
736                                                    stage, client_data);
737       if (result != VK_SUCCESS)
738          return;
739
740       memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
741              pValues, size);
742    }
743
744    cmd_buffer->state.push_constants_dirty |= stageFlags;
745 }
746
747 VkResult anv_CreateCommandPool(
748     VkDevice                                    _device,
749     const VkCommandPoolCreateInfo*              pCreateInfo,
750     const VkAllocationCallbacks*                pAllocator,
751     VkCommandPool*                              pCmdPool)
752 {
753    ANV_FROM_HANDLE(anv_device, device, _device);
754    struct anv_cmd_pool *pool;
755
756    pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
757                      VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
758    if (pool == NULL)
759       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
760
761    if (pAllocator)
762       pool->alloc = *pAllocator;
763    else
764       pool->alloc = device->alloc;
765
766    list_inithead(&pool->cmd_buffers);
767
768    *pCmdPool = anv_cmd_pool_to_handle(pool);
769
770    return VK_SUCCESS;
771 }
772
773 void anv_DestroyCommandPool(
774     VkDevice                                    _device,
775     VkCommandPool                               commandPool,
776     const VkAllocationCallbacks*                pAllocator)
777 {
778    ANV_FROM_HANDLE(anv_device, device, _device);
779    ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
780
781    if (!pool)
782       return;
783
784    list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
785                             &pool->cmd_buffers, pool_link) {
786       anv_cmd_buffer_destroy(cmd_buffer);
787    }
788
789    vk_free2(&device->alloc, pAllocator, pool);
790 }
791
792 VkResult anv_ResetCommandPool(
793     VkDevice                                    device,
794     VkCommandPool                               commandPool,
795     VkCommandPoolResetFlags                     flags)
796 {
797    ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
798
799    list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
800                        &pool->cmd_buffers, pool_link) {
801       anv_cmd_buffer_reset(cmd_buffer);
802    }
803
804    return VK_SUCCESS;
805 }
806
807 void anv_TrimCommandPoolKHR(
808     VkDevice                                    device,
809     VkCommandPool                               commandPool,
810     VkCommandPoolTrimFlagsKHR                   flags)
811 {
812    /* Nothing for us to do here.  Our pools stay pretty tidy. */
813 }
814
815 /**
816  * Return NULL if the current subpass has no depthstencil attachment.
817  */
818 const struct anv_image_view *
819 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
820 {
821    const struct anv_subpass *subpass = cmd_buffer->state.subpass;
822    const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
823
824    if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED)
825       return NULL;
826
827    const struct anv_image_view *iview =
828       fb->attachments[subpass->depth_stencil_attachment.attachment];
829
830    assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
831                                 VK_IMAGE_ASPECT_STENCIL_BIT));
832
833    return iview;
834 }
835
836 static VkResult
837 anv_cmd_buffer_ensure_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
838                                           uint32_t set)
839 {
840    struct anv_push_descriptor_set **push_set =
841       &cmd_buffer->state.push_descriptors[set];
842
843    if (*push_set == NULL) {
844       *push_set = vk_alloc(&cmd_buffer->pool->alloc,
845                            sizeof(struct anv_push_descriptor_set), 8,
846                            VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
847       if (*push_set == NULL) {
848          anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
849          return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
850       }
851    }
852
853    return VK_SUCCESS;
854 }
855
856 void anv_CmdPushDescriptorSetKHR(
857     VkCommandBuffer commandBuffer,
858     VkPipelineBindPoint pipelineBindPoint,
859     VkPipelineLayout _layout,
860     uint32_t _set,
861     uint32_t descriptorWriteCount,
862     const VkWriteDescriptorSet* pDescriptorWrites)
863 {
864    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
865    ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
866
867    assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
868           pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
869    assert(_set < MAX_SETS);
870
871    const struct anv_descriptor_set_layout *set_layout =
872       layout->set[_set].layout;
873
874    if (anv_cmd_buffer_ensure_push_descriptor_set(cmd_buffer, _set) != VK_SUCCESS)
875       return;
876    struct anv_push_descriptor_set *push_set =
877       cmd_buffer->state.push_descriptors[_set];
878    struct anv_descriptor_set *set = &push_set->set;
879
880    set->layout = set_layout;
881    set->size = anv_descriptor_set_layout_size(set_layout);
882    set->buffer_count = set_layout->buffer_count;
883    set->buffer_views = push_set->buffer_views;
884
885    /* Go through the user supplied descriptors. */
886    for (uint32_t i = 0; i < descriptorWriteCount; i++) {
887       const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
888
889       switch (write->descriptorType) {
890       case VK_DESCRIPTOR_TYPE_SAMPLER:
891       case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
892       case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
893       case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
894       case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
895          for (uint32_t j = 0; j < write->descriptorCount; j++) {
896             anv_descriptor_set_write_image_view(set, &cmd_buffer->device->info,
897                                                 write->pImageInfo + j,
898                                                 write->descriptorType,
899                                                 write->dstBinding,
900                                                 write->dstArrayElement + j);
901          }
902          break;
903
904       case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
905       case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
906          for (uint32_t j = 0; j < write->descriptorCount; j++) {
907             ANV_FROM_HANDLE(anv_buffer_view, bview,
908                             write->pTexelBufferView[j]);
909
910             anv_descriptor_set_write_buffer_view(set,
911                                                  write->descriptorType,
912                                                  bview,
913                                                  write->dstBinding,
914                                                  write->dstArrayElement + j);
915          }
916          break;
917
918       case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
919       case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
920       case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
921       case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
922          for (uint32_t j = 0; j < write->descriptorCount; j++) {
923             assert(write->pBufferInfo[j].buffer);
924             ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
925             assert(buffer);
926
927             anv_descriptor_set_write_buffer(set,
928                                             cmd_buffer->device,
929                                             &cmd_buffer->surface_state_stream,
930                                             write->descriptorType,
931                                             buffer,
932                                             write->dstBinding,
933                                             write->dstArrayElement + j,
934                                             write->pBufferInfo[j].offset,
935                                             write->pBufferInfo[j].range);
936          }
937          break;
938
939       default:
940          break;
941       }
942    }
943
944    cmd_buffer->state.descriptors[_set] = set;
945    cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
946 }
947
948 void anv_CmdPushDescriptorSetWithTemplateKHR(
949     VkCommandBuffer                             commandBuffer,
950     VkDescriptorUpdateTemplateKHR               descriptorUpdateTemplate,
951     VkPipelineLayout                            _layout,
952     uint32_t                                    _set,
953     const void*                                 pData)
954 {
955    ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
956    ANV_FROM_HANDLE(anv_descriptor_update_template, template,
957                    descriptorUpdateTemplate);
958    ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
959
960    assert(_set < MAX_PUSH_DESCRIPTORS);
961
962    const struct anv_descriptor_set_layout *set_layout =
963       layout->set[_set].layout;
964
965    if (anv_cmd_buffer_ensure_push_descriptor_set(cmd_buffer, _set) != VK_SUCCESS)
966       return;
967    struct anv_push_descriptor_set *push_set =
968       cmd_buffer->state.push_descriptors[_set];
969    struct anv_descriptor_set *set = &push_set->set;
970
971    set->layout = set_layout;
972    set->size = anv_descriptor_set_layout_size(set_layout);
973    set->buffer_count = set_layout->buffer_count;
974    set->buffer_views = push_set->buffer_views;
975
976    anv_descriptor_set_write_template(set,
977                                      cmd_buffer->device,
978                                      &cmd_buffer->surface_state_stream,
979                                      template,
980                                      pData);
981
982    cmd_buffer->state.descriptors[_set] = set;
983    cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
984 }