2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "vk_format_info.h"
34 /** \file anv_cmd_buffer.c
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
62 .stencil_compare_mask = {
66 .stencil_write_mask = {
70 .stencil_reference = {
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
118 struct anv_cmd_state *state = &cmd_buffer->state;
120 memset(&state->descriptors, 0, sizeof(state->descriptors));
121 memset(&state->push_constants, 0, sizeof(state->push_constants));
122 memset(state->binding_tables, 0, sizeof(state->binding_tables));
123 memset(state->samplers, 0, sizeof(state->samplers));
125 /* 0 isn't a valid config. This ensures that we always configure L3$. */
126 cmd_buffer->state.current_l3_config = 0;
130 state->pending_pipe_bits = 0;
131 state->descriptors_dirty = 0;
132 state->push_constants_dirty = 0;
133 state->pipeline = NULL;
134 state->framebuffer = NULL;
136 state->subpass = NULL;
137 state->push_constant_stages = 0;
138 state->restart_index = UINT32_MAX;
139 state->dynamic = default_dynamic_state;
140 state->need_query_wa = true;
141 state->pma_fix_enabled = false;
142 state->hiz_enabled = false;
144 if (state->attachments != NULL) {
145 vk_free(&cmd_buffer->pool->alloc, state->attachments);
146 state->attachments = NULL;
149 state->gen7.index_buffer = NULL;
153 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
154 gl_shader_stage stage, uint32_t size)
156 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
159 *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
160 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
162 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
163 } else if ((*ptr)->size < size) {
164 *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
165 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
167 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
174 static VkResult anv_create_cmd_buffer(
175 struct anv_device * device,
176 struct anv_cmd_pool * pool,
177 VkCommandBufferLevel level,
178 VkCommandBuffer* pCommandBuffer)
180 struct anv_cmd_buffer *cmd_buffer;
183 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
184 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
185 if (cmd_buffer == NULL)
186 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
188 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
189 cmd_buffer->device = device;
190 cmd_buffer->pool = pool;
191 cmd_buffer->level = level;
192 cmd_buffer->state.attachments = NULL;
194 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
195 if (result != VK_SUCCESS)
198 anv_state_stream_init(&cmd_buffer->surface_state_stream,
199 &device->surface_state_block_pool);
200 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
201 &device->dynamic_state_block_pool);
203 memset(&cmd_buffer->state.push_descriptor, 0,
204 sizeof(cmd_buffer->state.push_descriptor));
207 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
209 /* Init the pool_link so we can safefly call list_del when we destroy
212 list_inithead(&cmd_buffer->pool_link);
215 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
220 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
225 VkResult anv_AllocateCommandBuffers(
227 const VkCommandBufferAllocateInfo* pAllocateInfo,
228 VkCommandBuffer* pCommandBuffers)
230 ANV_FROM_HANDLE(anv_device, device, _device);
231 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
233 VkResult result = VK_SUCCESS;
236 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
237 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
238 &pCommandBuffers[i]);
239 if (result != VK_SUCCESS)
243 if (result != VK_SUCCESS) {
244 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
246 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
247 pCommandBuffers[i] = VK_NULL_HANDLE;
254 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
256 list_del(&cmd_buffer->pool_link);
258 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
260 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
261 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
263 vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
264 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
267 void anv_FreeCommandBuffers(
269 VkCommandPool commandPool,
270 uint32_t commandBufferCount,
271 const VkCommandBuffer* pCommandBuffers)
273 for (uint32_t i = 0; i < commandBufferCount; i++) {
274 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
279 anv_cmd_buffer_destroy(cmd_buffer);
284 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
286 cmd_buffer->usage_flags = 0;
287 cmd_buffer->state.current_pipeline = UINT32_MAX;
288 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
289 anv_cmd_state_reset(cmd_buffer);
291 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
292 anv_state_stream_init(&cmd_buffer->surface_state_stream,
293 &cmd_buffer->device->surface_state_block_pool);
295 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
296 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
297 &cmd_buffer->device->dynamic_state_block_pool);
301 VkResult anv_ResetCommandBuffer(
302 VkCommandBuffer commandBuffer,
303 VkCommandBufferResetFlags flags)
305 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
306 return anv_cmd_buffer_reset(cmd_buffer);
310 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
312 switch (cmd_buffer->device->info.gen) {
314 if (cmd_buffer->device->info.is_haswell)
315 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
317 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
319 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
321 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
323 unreachable("unsupported gen\n");
327 void anv_CmdBindPipeline(
328 VkCommandBuffer commandBuffer,
329 VkPipelineBindPoint pipelineBindPoint,
330 VkPipeline _pipeline)
332 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
333 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
335 switch (pipelineBindPoint) {
336 case VK_PIPELINE_BIND_POINT_COMPUTE:
337 cmd_buffer->state.compute_pipeline = pipeline;
338 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
339 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
340 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
343 case VK_PIPELINE_BIND_POINT_GRAPHICS:
344 cmd_buffer->state.pipeline = pipeline;
345 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
346 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
347 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
348 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
350 /* Apply the dynamic state from the pipeline */
351 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
352 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
353 &pipeline->dynamic_state,
354 pipeline->dynamic_state_mask);
358 assert(!"invalid bind point");
363 void anv_CmdSetViewport(
364 VkCommandBuffer commandBuffer,
365 uint32_t firstViewport,
366 uint32_t viewportCount,
367 const VkViewport* pViewports)
369 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
371 const uint32_t total_count = firstViewport + viewportCount;
372 if (cmd_buffer->state.dynamic.viewport.count < total_count)
373 cmd_buffer->state.dynamic.viewport.count = total_count;
375 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
376 pViewports, viewportCount * sizeof(*pViewports));
378 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
381 void anv_CmdSetScissor(
382 VkCommandBuffer commandBuffer,
383 uint32_t firstScissor,
384 uint32_t scissorCount,
385 const VkRect2D* pScissors)
387 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
389 const uint32_t total_count = firstScissor + scissorCount;
390 if (cmd_buffer->state.dynamic.scissor.count < total_count)
391 cmd_buffer->state.dynamic.scissor.count = total_count;
393 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
394 pScissors, scissorCount * sizeof(*pScissors));
396 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
399 void anv_CmdSetLineWidth(
400 VkCommandBuffer commandBuffer,
403 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
405 cmd_buffer->state.dynamic.line_width = lineWidth;
406 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
409 void anv_CmdSetDepthBias(
410 VkCommandBuffer commandBuffer,
411 float depthBiasConstantFactor,
412 float depthBiasClamp,
413 float depthBiasSlopeFactor)
415 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
417 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
418 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
419 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
421 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
424 void anv_CmdSetBlendConstants(
425 VkCommandBuffer commandBuffer,
426 const float blendConstants[4])
428 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
430 memcpy(cmd_buffer->state.dynamic.blend_constants,
431 blendConstants, sizeof(float) * 4);
433 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
436 void anv_CmdSetDepthBounds(
437 VkCommandBuffer commandBuffer,
438 float minDepthBounds,
439 float maxDepthBounds)
441 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
443 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
444 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
446 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
449 void anv_CmdSetStencilCompareMask(
450 VkCommandBuffer commandBuffer,
451 VkStencilFaceFlags faceMask,
452 uint32_t compareMask)
454 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
456 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
457 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
458 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
459 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
461 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
464 void anv_CmdSetStencilWriteMask(
465 VkCommandBuffer commandBuffer,
466 VkStencilFaceFlags faceMask,
469 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
471 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
472 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
473 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
474 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
476 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
479 void anv_CmdSetStencilReference(
480 VkCommandBuffer commandBuffer,
481 VkStencilFaceFlags faceMask,
484 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
486 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
487 cmd_buffer->state.dynamic.stencil_reference.front = reference;
488 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
489 cmd_buffer->state.dynamic.stencil_reference.back = reference;
491 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
494 void anv_CmdBindDescriptorSets(
495 VkCommandBuffer commandBuffer,
496 VkPipelineBindPoint pipelineBindPoint,
497 VkPipelineLayout _layout,
499 uint32_t descriptorSetCount,
500 const VkDescriptorSet* pDescriptorSets,
501 uint32_t dynamicOffsetCount,
502 const uint32_t* pDynamicOffsets)
504 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
505 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
506 struct anv_descriptor_set_layout *set_layout;
508 assert(firstSet + descriptorSetCount < MAX_SETS);
510 uint32_t dynamic_slot = 0;
511 for (uint32_t i = 0; i < descriptorSetCount; i++) {
512 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
513 set_layout = layout->set[firstSet + i].layout;
515 cmd_buffer->state.descriptors[firstSet + i] = set;
517 if (set_layout->dynamic_offset_count > 0) {
518 uint32_t dynamic_offset_start =
519 layout->set[firstSet + i].dynamic_offset_start;
521 /* Assert that everything is in range */
522 assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
523 ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
524 assert(dynamic_slot + set_layout->dynamic_offset_count <=
527 typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
528 &pDynamicOffsets[dynamic_slot],
529 set_layout->dynamic_offset_count);
531 dynamic_slot += set_layout->dynamic_offset_count;
534 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
538 void anv_CmdBindVertexBuffers(
539 VkCommandBuffer commandBuffer,
540 uint32_t firstBinding,
541 uint32_t bindingCount,
542 const VkBuffer* pBuffers,
543 const VkDeviceSize* pOffsets)
545 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
546 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
548 /* We have to defer setting up vertex buffer since we need the buffer
549 * stride from the pipeline. */
551 assert(firstBinding + bindingCount < MAX_VBS);
552 for (uint32_t i = 0; i < bindingCount; i++) {
553 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
554 vb[firstBinding + i].offset = pOffsets[i];
555 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
560 anv_isl_format_for_descriptor_type(VkDescriptorType type)
563 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
564 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
565 return ISL_FORMAT_R32G32B32A32_FLOAT;
567 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
568 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
569 return ISL_FORMAT_RAW;
572 unreachable("Invalid descriptor type");
577 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
578 const void *data, uint32_t size, uint32_t alignment)
580 struct anv_state state;
582 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
583 memcpy(state.map, data, size);
585 anv_state_flush(cmd_buffer->device, state);
587 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
593 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
594 uint32_t *a, uint32_t *b,
595 uint32_t dwords, uint32_t alignment)
597 struct anv_state state;
600 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
601 dwords * 4, alignment);
603 for (uint32_t i = 0; i < dwords; i++)
606 anv_state_flush(cmd_buffer->device, state);
608 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
614 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
615 gl_shader_stage stage)
617 /* If we don't have this stage, bail. */
618 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
619 return (struct anv_state) { .offset = 0 };
621 struct anv_push_constants *data =
622 cmd_buffer->state.push_constants[stage];
623 const struct brw_stage_prog_data *prog_data =
624 cmd_buffer->state.pipeline->shaders[stage]->prog_data;
626 /* If we don't actually have any push constants, bail. */
627 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
628 return (struct anv_state) { .offset = 0 };
630 struct anv_state state =
631 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
632 prog_data->nr_params * sizeof(float),
633 32 /* bottom 5 bits MBZ */);
635 /* Walk through the param array and fill the buffer with data */
636 uint32_t *u32_map = state.map;
637 for (unsigned i = 0; i < prog_data->nr_params; i++) {
638 uint32_t offset = (uintptr_t)prog_data->param[i];
639 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
642 anv_state_flush(cmd_buffer->device, state);
648 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
650 struct anv_push_constants *data =
651 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
652 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
653 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
654 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
656 /* If we don't actually have any push constants, bail. */
657 if (cs_prog_data->push.total.size == 0)
658 return (struct anv_state) { .offset = 0 };
660 const unsigned push_constant_alignment =
661 cmd_buffer->device->info.gen < 8 ? 32 : 64;
662 const unsigned aligned_total_push_constants_size =
663 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
664 struct anv_state state =
665 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
666 aligned_total_push_constants_size,
667 push_constant_alignment);
669 /* Walk through the param array and fill the buffer with data */
670 uint32_t *u32_map = state.map;
672 if (cs_prog_data->push.cross_thread.size > 0) {
673 assert(cs_prog_data->thread_local_id_index < 0 ||
674 cs_prog_data->thread_local_id_index >=
675 cs_prog_data->push.cross_thread.dwords);
677 i < cs_prog_data->push.cross_thread.dwords;
679 uint32_t offset = (uintptr_t)prog_data->param[i];
680 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
684 if (cs_prog_data->push.per_thread.size > 0) {
685 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
687 8 * (cs_prog_data->push.per_thread.regs * t +
688 cs_prog_data->push.cross_thread.regs);
689 unsigned src = cs_prog_data->push.cross_thread.dwords;
690 for ( ; src < prog_data->nr_params; src++, dst++) {
691 if (src != cs_prog_data->thread_local_id_index) {
692 uint32_t offset = (uintptr_t)prog_data->param[src];
693 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
695 u32_map[dst] = t * cs_prog_data->simd_size;
701 anv_state_flush(cmd_buffer->device, state);
706 void anv_CmdPushConstants(
707 VkCommandBuffer commandBuffer,
708 VkPipelineLayout layout,
709 VkShaderStageFlags stageFlags,
714 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
716 anv_foreach_stage(stage, stageFlags) {
717 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
719 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
723 cmd_buffer->state.push_constants_dirty |= stageFlags;
726 VkResult anv_CreateCommandPool(
728 const VkCommandPoolCreateInfo* pCreateInfo,
729 const VkAllocationCallbacks* pAllocator,
730 VkCommandPool* pCmdPool)
732 ANV_FROM_HANDLE(anv_device, device, _device);
733 struct anv_cmd_pool *pool;
735 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
736 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
738 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
741 pool->alloc = *pAllocator;
743 pool->alloc = device->alloc;
745 list_inithead(&pool->cmd_buffers);
747 *pCmdPool = anv_cmd_pool_to_handle(pool);
752 void anv_DestroyCommandPool(
754 VkCommandPool commandPool,
755 const VkAllocationCallbacks* pAllocator)
757 ANV_FROM_HANDLE(anv_device, device, _device);
758 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
763 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
764 &pool->cmd_buffers, pool_link) {
765 anv_cmd_buffer_destroy(cmd_buffer);
768 vk_free2(&device->alloc, pAllocator, pool);
771 VkResult anv_ResetCommandPool(
773 VkCommandPool commandPool,
774 VkCommandPoolResetFlags flags)
776 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
778 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
779 &pool->cmd_buffers, pool_link) {
780 anv_cmd_buffer_reset(cmd_buffer);
786 void anv_TrimCommandPoolKHR(
788 VkCommandPool commandPool,
789 VkCommandPoolTrimFlagsKHR flags)
791 /* Nothing for us to do here. Our pools stay pretty tidy. */
795 * Return NULL if the current subpass has no depthstencil attachment.
797 const struct anv_image_view *
798 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
800 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
801 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
803 if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED)
806 const struct anv_image_view *iview =
807 fb->attachments[subpass->depth_stencil_attachment.attachment];
809 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
810 VK_IMAGE_ASPECT_STENCIL_BIT));
815 void anv_CmdPushDescriptorSetKHR(
816 VkCommandBuffer commandBuffer,
817 VkPipelineBindPoint pipelineBindPoint,
818 VkPipelineLayout _layout,
820 uint32_t descriptorWriteCount,
821 const VkWriteDescriptorSet* pDescriptorWrites)
823 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
824 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
826 assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
827 pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
828 assert(_set < MAX_SETS);
830 const struct anv_descriptor_set_layout *set_layout =
831 layout->set[_set].layout;
832 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
834 set->layout = set_layout;
835 set->size = anv_descriptor_set_layout_size(set_layout);
836 set->buffer_count = set_layout->buffer_count;
837 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
839 /* Go through the user supplied descriptors. */
840 for (uint32_t i = 0; i < descriptorWriteCount; i++) {
841 const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
843 switch (write->descriptorType) {
844 case VK_DESCRIPTOR_TYPE_SAMPLER:
845 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
846 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
847 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
848 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
849 for (uint32_t j = 0; j < write->descriptorCount; j++) {
850 anv_descriptor_set_write_image_view(set, &cmd_buffer->device->info,
851 write->pImageInfo + j,
852 write->descriptorType,
854 write->dstArrayElement + j);
858 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
859 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
860 for (uint32_t j = 0; j < write->descriptorCount; j++) {
861 ANV_FROM_HANDLE(anv_buffer_view, bview,
862 write->pTexelBufferView[j]);
864 anv_descriptor_set_write_buffer_view(set,
865 write->descriptorType,
868 write->dstArrayElement + j);
872 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
873 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
874 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
875 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
876 for (uint32_t j = 0; j < write->descriptorCount; j++) {
877 assert(write->pBufferInfo[j].buffer);
878 ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
881 anv_descriptor_set_write_buffer(set,
883 &cmd_buffer->surface_state_stream,
884 write->descriptorType,
887 write->dstArrayElement + j,
888 write->pBufferInfo[j].offset,
889 write->pBufferInfo[j].range);
898 cmd_buffer->state.descriptors[_set] = set;
899 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
902 void anv_CmdPushDescriptorSetWithTemplateKHR(
903 VkCommandBuffer commandBuffer,
904 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
905 VkPipelineLayout _layout,
909 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
910 ANV_FROM_HANDLE(anv_descriptor_update_template, template,
911 descriptorUpdateTemplate);
912 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
914 assert(_set < MAX_PUSH_DESCRIPTORS);
916 const struct anv_descriptor_set_layout *set_layout =
917 layout->set[_set].layout;
918 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
920 set->layout = set_layout;
921 set->size = anv_descriptor_set_layout_size(set_layout);
922 set->buffer_count = set_layout->buffer_count;
923 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
925 anv_descriptor_set_write_template(set,
927 &cmd_buffer->surface_state_stream,
931 cmd_buffer->state.descriptors[_set] = set;
932 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;