2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "vk_format_info.h"
34 /** \file anv_cmd_buffer.c
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
62 .stencil_compare_mask = {
66 .stencil_write_mask = {
70 .stencil_reference = {
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
118 struct anv_cmd_state *state = &cmd_buffer->state;
120 cmd_buffer->batch.status = VK_SUCCESS;
122 memset(&state->descriptors, 0, sizeof(state->descriptors));
123 for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
124 if (state->push_constants[i] != NULL) {
125 vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
126 state->push_constants[i] = NULL;
129 memset(state->binding_tables, 0, sizeof(state->binding_tables));
130 memset(state->samplers, 0, sizeof(state->samplers));
132 /* 0 isn't a valid config. This ensures that we always configure L3$. */
133 cmd_buffer->state.current_l3_config = 0;
137 state->pending_pipe_bits = 0;
138 state->descriptors_dirty = 0;
139 state->push_constants_dirty = 0;
140 state->pipeline = NULL;
141 state->framebuffer = NULL;
143 state->subpass = NULL;
144 state->push_constant_stages = 0;
145 state->restart_index = UINT32_MAX;
146 state->dynamic = default_dynamic_state;
147 state->need_query_wa = true;
148 state->pma_fix_enabled = false;
149 state->hiz_enabled = false;
151 if (state->attachments != NULL) {
152 vk_free(&cmd_buffer->pool->alloc, state->attachments);
153 state->attachments = NULL;
156 state->gen7.index_buffer = NULL;
160 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
161 gl_shader_stage stage, uint32_t size)
163 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
166 *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
167 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
169 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
170 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
172 } else if ((*ptr)->size < size) {
173 *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
174 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
176 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
177 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
185 static VkResult anv_create_cmd_buffer(
186 struct anv_device * device,
187 struct anv_cmd_pool * pool,
188 VkCommandBufferLevel level,
189 VkCommandBuffer* pCommandBuffer)
191 struct anv_cmd_buffer *cmd_buffer;
194 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
195 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
196 if (cmd_buffer == NULL)
197 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
199 cmd_buffer->batch.status = VK_SUCCESS;
201 for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
202 cmd_buffer->state.push_constants[i] = NULL;
204 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
205 cmd_buffer->device = device;
206 cmd_buffer->pool = pool;
207 cmd_buffer->level = level;
208 cmd_buffer->state.attachments = NULL;
210 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
211 if (result != VK_SUCCESS)
214 anv_state_stream_init(&cmd_buffer->surface_state_stream,
215 &device->surface_state_pool, 4096);
216 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
217 &device->dynamic_state_pool, 16384);
219 memset(&cmd_buffer->state.push_descriptor, 0,
220 sizeof(cmd_buffer->state.push_descriptor));
223 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
225 /* Init the pool_link so we can safefly call list_del when we destroy
228 list_inithead(&cmd_buffer->pool_link);
231 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
236 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
241 VkResult anv_AllocateCommandBuffers(
243 const VkCommandBufferAllocateInfo* pAllocateInfo,
244 VkCommandBuffer* pCommandBuffers)
246 ANV_FROM_HANDLE(anv_device, device, _device);
247 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
249 VkResult result = VK_SUCCESS;
252 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
253 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
254 &pCommandBuffers[i]);
255 if (result != VK_SUCCESS)
259 if (result != VK_SUCCESS) {
260 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
262 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
263 pCommandBuffers[i] = VK_NULL_HANDLE;
270 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
272 list_del(&cmd_buffer->pool_link);
274 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
276 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
277 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
279 vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
280 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
283 void anv_FreeCommandBuffers(
285 VkCommandPool commandPool,
286 uint32_t commandBufferCount,
287 const VkCommandBuffer* pCommandBuffers)
289 for (uint32_t i = 0; i < commandBufferCount; i++) {
290 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
295 anv_cmd_buffer_destroy(cmd_buffer);
300 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
302 cmd_buffer->usage_flags = 0;
303 cmd_buffer->state.current_pipeline = UINT32_MAX;
304 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
305 anv_cmd_state_reset(cmd_buffer);
307 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
308 anv_state_stream_init(&cmd_buffer->surface_state_stream,
309 &cmd_buffer->device->surface_state_pool, 4096);
311 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
312 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
313 &cmd_buffer->device->dynamic_state_pool, 16384);
317 VkResult anv_ResetCommandBuffer(
318 VkCommandBuffer commandBuffer,
319 VkCommandBufferResetFlags flags)
321 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
322 return anv_cmd_buffer_reset(cmd_buffer);
326 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
328 switch (cmd_buffer->device->info.gen) {
330 if (cmd_buffer->device->info.is_haswell)
331 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
333 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
335 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
337 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
339 unreachable("unsupported gen\n");
343 void anv_CmdBindPipeline(
344 VkCommandBuffer commandBuffer,
345 VkPipelineBindPoint pipelineBindPoint,
346 VkPipeline _pipeline)
348 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
349 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
351 switch (pipelineBindPoint) {
352 case VK_PIPELINE_BIND_POINT_COMPUTE:
353 cmd_buffer->state.compute_pipeline = pipeline;
354 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
355 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
356 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
359 case VK_PIPELINE_BIND_POINT_GRAPHICS:
360 cmd_buffer->state.pipeline = pipeline;
361 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
362 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
363 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
364 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
366 /* Apply the dynamic state from the pipeline */
367 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
368 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
369 &pipeline->dynamic_state,
370 pipeline->dynamic_state_mask);
374 assert(!"invalid bind point");
379 void anv_CmdSetViewport(
380 VkCommandBuffer commandBuffer,
381 uint32_t firstViewport,
382 uint32_t viewportCount,
383 const VkViewport* pViewports)
385 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
387 const uint32_t total_count = firstViewport + viewportCount;
388 if (cmd_buffer->state.dynamic.viewport.count < total_count)
389 cmd_buffer->state.dynamic.viewport.count = total_count;
391 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
392 pViewports, viewportCount * sizeof(*pViewports));
394 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
397 void anv_CmdSetScissor(
398 VkCommandBuffer commandBuffer,
399 uint32_t firstScissor,
400 uint32_t scissorCount,
401 const VkRect2D* pScissors)
403 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
405 const uint32_t total_count = firstScissor + scissorCount;
406 if (cmd_buffer->state.dynamic.scissor.count < total_count)
407 cmd_buffer->state.dynamic.scissor.count = total_count;
409 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
410 pScissors, scissorCount * sizeof(*pScissors));
412 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
415 void anv_CmdSetLineWidth(
416 VkCommandBuffer commandBuffer,
419 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
421 cmd_buffer->state.dynamic.line_width = lineWidth;
422 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
425 void anv_CmdSetDepthBias(
426 VkCommandBuffer commandBuffer,
427 float depthBiasConstantFactor,
428 float depthBiasClamp,
429 float depthBiasSlopeFactor)
431 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
433 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
434 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
435 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
437 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
440 void anv_CmdSetBlendConstants(
441 VkCommandBuffer commandBuffer,
442 const float blendConstants[4])
444 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
446 memcpy(cmd_buffer->state.dynamic.blend_constants,
447 blendConstants, sizeof(float) * 4);
449 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
452 void anv_CmdSetDepthBounds(
453 VkCommandBuffer commandBuffer,
454 float minDepthBounds,
455 float maxDepthBounds)
457 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
459 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
460 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
462 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
465 void anv_CmdSetStencilCompareMask(
466 VkCommandBuffer commandBuffer,
467 VkStencilFaceFlags faceMask,
468 uint32_t compareMask)
470 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
472 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
473 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
474 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
475 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
477 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
480 void anv_CmdSetStencilWriteMask(
481 VkCommandBuffer commandBuffer,
482 VkStencilFaceFlags faceMask,
485 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
487 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
488 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
489 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
490 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
492 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
495 void anv_CmdSetStencilReference(
496 VkCommandBuffer commandBuffer,
497 VkStencilFaceFlags faceMask,
500 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
502 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
503 cmd_buffer->state.dynamic.stencil_reference.front = reference;
504 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
505 cmd_buffer->state.dynamic.stencil_reference.back = reference;
507 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
510 void anv_CmdBindDescriptorSets(
511 VkCommandBuffer commandBuffer,
512 VkPipelineBindPoint pipelineBindPoint,
513 VkPipelineLayout _layout,
515 uint32_t descriptorSetCount,
516 const VkDescriptorSet* pDescriptorSets,
517 uint32_t dynamicOffsetCount,
518 const uint32_t* pDynamicOffsets)
520 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
521 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
522 struct anv_descriptor_set_layout *set_layout;
524 assert(firstSet + descriptorSetCount < MAX_SETS);
526 uint32_t dynamic_slot = 0;
527 for (uint32_t i = 0; i < descriptorSetCount; i++) {
528 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
529 set_layout = layout->set[firstSet + i].layout;
531 cmd_buffer->state.descriptors[firstSet + i] = set;
533 if (set_layout->dynamic_offset_count > 0) {
534 uint32_t dynamic_offset_start =
535 layout->set[firstSet + i].dynamic_offset_start;
537 /* Assert that everything is in range */
538 assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
539 ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
540 assert(dynamic_slot + set_layout->dynamic_offset_count <=
543 typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
544 &pDynamicOffsets[dynamic_slot],
545 set_layout->dynamic_offset_count);
547 dynamic_slot += set_layout->dynamic_offset_count;
550 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
554 void anv_CmdBindVertexBuffers(
555 VkCommandBuffer commandBuffer,
556 uint32_t firstBinding,
557 uint32_t bindingCount,
558 const VkBuffer* pBuffers,
559 const VkDeviceSize* pOffsets)
561 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
562 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
564 /* We have to defer setting up vertex buffer since we need the buffer
565 * stride from the pipeline. */
567 assert(firstBinding + bindingCount < MAX_VBS);
568 for (uint32_t i = 0; i < bindingCount; i++) {
569 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
570 vb[firstBinding + i].offset = pOffsets[i];
571 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
576 anv_isl_format_for_descriptor_type(VkDescriptorType type)
579 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
580 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
581 return ISL_FORMAT_R32G32B32A32_FLOAT;
583 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
584 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
585 return ISL_FORMAT_RAW;
588 unreachable("Invalid descriptor type");
593 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
594 const void *data, uint32_t size, uint32_t alignment)
596 struct anv_state state;
598 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
599 memcpy(state.map, data, size);
601 anv_state_flush(cmd_buffer->device, state);
603 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
609 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
610 uint32_t *a, uint32_t *b,
611 uint32_t dwords, uint32_t alignment)
613 struct anv_state state;
616 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
617 dwords * 4, alignment);
619 for (uint32_t i = 0; i < dwords; i++)
622 anv_state_flush(cmd_buffer->device, state);
624 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
630 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
631 gl_shader_stage stage)
633 /* If we don't have this stage, bail. */
634 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
635 return (struct anv_state) { .offset = 0 };
637 struct anv_push_constants *data =
638 cmd_buffer->state.push_constants[stage];
639 const struct brw_stage_prog_data *prog_data =
640 cmd_buffer->state.pipeline->shaders[stage]->prog_data;
642 /* If we don't actually have any push constants, bail. */
643 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
644 return (struct anv_state) { .offset = 0 };
646 struct anv_state state =
647 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
648 prog_data->nr_params * sizeof(float),
649 32 /* bottom 5 bits MBZ */);
651 /* Walk through the param array and fill the buffer with data */
652 uint32_t *u32_map = state.map;
653 for (unsigned i = 0; i < prog_data->nr_params; i++) {
654 uint32_t offset = (uintptr_t)prog_data->param[i];
655 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
658 anv_state_flush(cmd_buffer->device, state);
664 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
666 struct anv_push_constants *data =
667 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
668 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
669 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
670 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
672 /* If we don't actually have any push constants, bail. */
673 if (cs_prog_data->push.total.size == 0)
674 return (struct anv_state) { .offset = 0 };
676 const unsigned push_constant_alignment =
677 cmd_buffer->device->info.gen < 8 ? 32 : 64;
678 const unsigned aligned_total_push_constants_size =
679 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
680 struct anv_state state =
681 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
682 aligned_total_push_constants_size,
683 push_constant_alignment);
685 /* Walk through the param array and fill the buffer with data */
686 uint32_t *u32_map = state.map;
688 if (cs_prog_data->push.cross_thread.size > 0) {
689 assert(cs_prog_data->thread_local_id_index < 0 ||
690 cs_prog_data->thread_local_id_index >=
691 cs_prog_data->push.cross_thread.dwords);
693 i < cs_prog_data->push.cross_thread.dwords;
695 uint32_t offset = (uintptr_t)prog_data->param[i];
696 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
700 if (cs_prog_data->push.per_thread.size > 0) {
701 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
703 8 * (cs_prog_data->push.per_thread.regs * t +
704 cs_prog_data->push.cross_thread.regs);
705 unsigned src = cs_prog_data->push.cross_thread.dwords;
706 for ( ; src < prog_data->nr_params; src++, dst++) {
707 if (src != cs_prog_data->thread_local_id_index) {
708 uint32_t offset = (uintptr_t)prog_data->param[src];
709 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
711 u32_map[dst] = t * cs_prog_data->simd_size;
717 anv_state_flush(cmd_buffer->device, state);
722 void anv_CmdPushConstants(
723 VkCommandBuffer commandBuffer,
724 VkPipelineLayout layout,
725 VkShaderStageFlags stageFlags,
730 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
732 anv_foreach_stage(stage, stageFlags) {
734 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer,
736 if (result != VK_SUCCESS)
739 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
743 cmd_buffer->state.push_constants_dirty |= stageFlags;
746 VkResult anv_CreateCommandPool(
748 const VkCommandPoolCreateInfo* pCreateInfo,
749 const VkAllocationCallbacks* pAllocator,
750 VkCommandPool* pCmdPool)
752 ANV_FROM_HANDLE(anv_device, device, _device);
753 struct anv_cmd_pool *pool;
755 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
756 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
758 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
761 pool->alloc = *pAllocator;
763 pool->alloc = device->alloc;
765 list_inithead(&pool->cmd_buffers);
767 *pCmdPool = anv_cmd_pool_to_handle(pool);
772 void anv_DestroyCommandPool(
774 VkCommandPool commandPool,
775 const VkAllocationCallbacks* pAllocator)
777 ANV_FROM_HANDLE(anv_device, device, _device);
778 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
783 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
784 &pool->cmd_buffers, pool_link) {
785 anv_cmd_buffer_destroy(cmd_buffer);
788 vk_free2(&device->alloc, pAllocator, pool);
791 VkResult anv_ResetCommandPool(
793 VkCommandPool commandPool,
794 VkCommandPoolResetFlags flags)
796 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
798 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
799 &pool->cmd_buffers, pool_link) {
800 anv_cmd_buffer_reset(cmd_buffer);
806 void anv_TrimCommandPoolKHR(
808 VkCommandPool commandPool,
809 VkCommandPoolTrimFlagsKHR flags)
811 /* Nothing for us to do here. Our pools stay pretty tidy. */
815 * Return NULL if the current subpass has no depthstencil attachment.
817 const struct anv_image_view *
818 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
820 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
821 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
823 if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED)
826 const struct anv_image_view *iview =
827 fb->attachments[subpass->depth_stencil_attachment.attachment];
829 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
830 VK_IMAGE_ASPECT_STENCIL_BIT));
835 void anv_CmdPushDescriptorSetKHR(
836 VkCommandBuffer commandBuffer,
837 VkPipelineBindPoint pipelineBindPoint,
838 VkPipelineLayout _layout,
840 uint32_t descriptorWriteCount,
841 const VkWriteDescriptorSet* pDescriptorWrites)
843 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
844 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
846 assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
847 pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
848 assert(_set < MAX_SETS);
850 const struct anv_descriptor_set_layout *set_layout =
851 layout->set[_set].layout;
852 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
854 set->layout = set_layout;
855 set->size = anv_descriptor_set_layout_size(set_layout);
856 set->buffer_count = set_layout->buffer_count;
857 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
859 /* Go through the user supplied descriptors. */
860 for (uint32_t i = 0; i < descriptorWriteCount; i++) {
861 const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
863 switch (write->descriptorType) {
864 case VK_DESCRIPTOR_TYPE_SAMPLER:
865 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
866 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
867 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
868 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
869 for (uint32_t j = 0; j < write->descriptorCount; j++) {
870 anv_descriptor_set_write_image_view(set, &cmd_buffer->device->info,
871 write->pImageInfo + j,
872 write->descriptorType,
874 write->dstArrayElement + j);
878 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
879 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
880 for (uint32_t j = 0; j < write->descriptorCount; j++) {
881 ANV_FROM_HANDLE(anv_buffer_view, bview,
882 write->pTexelBufferView[j]);
884 anv_descriptor_set_write_buffer_view(set,
885 write->descriptorType,
888 write->dstArrayElement + j);
892 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
893 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
894 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
895 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
896 for (uint32_t j = 0; j < write->descriptorCount; j++) {
897 assert(write->pBufferInfo[j].buffer);
898 ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
901 anv_descriptor_set_write_buffer(set,
903 &cmd_buffer->surface_state_stream,
904 write->descriptorType,
907 write->dstArrayElement + j,
908 write->pBufferInfo[j].offset,
909 write->pBufferInfo[j].range);
918 cmd_buffer->state.descriptors[_set] = set;
919 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
922 void anv_CmdPushDescriptorSetWithTemplateKHR(
923 VkCommandBuffer commandBuffer,
924 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
925 VkPipelineLayout _layout,
929 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
930 ANV_FROM_HANDLE(anv_descriptor_update_template, template,
931 descriptorUpdateTemplate);
932 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
934 assert(_set < MAX_PUSH_DESCRIPTORS);
936 const struct anv_descriptor_set_layout *set_layout =
937 layout->set[_set].layout;
938 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
940 set->layout = set_layout;
941 set->size = anv_descriptor_set_layout_size(set_layout);
942 set->buffer_count = set_layout->buffer_count;
943 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
945 anv_descriptor_set_write_template(set,
947 &cmd_buffer->surface_state_stream,
951 cmd_buffer->state.descriptors[_set] = set;
952 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;