2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
43 #include "brw_device_info.h"
44 #include "brw_compiler.h"
45 #include "util/macros.h"
46 #include "util/list.h"
48 /* Pre-declarations needed for WSI entrypoints */
51 typedef struct xcb_connection_t xcb_connection_t;
52 typedef uint32_t xcb_visualid_t;
53 typedef uint32_t xcb_window_t;
55 #define VK_USE_PLATFORM_XCB_KHR
56 #define VK_USE_PLATFORM_WAYLAND_KHR
59 #include <vulkan/vulkan.h>
60 #include <vulkan/vulkan_intel.h>
61 #include <vulkan/vk_icd.h>
63 #include "anv_entrypoints.h"
64 #include "brw_context.h"
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
87 static inline uint32_t
88 align_u32(uint32_t v, uint32_t a)
90 assert(a != 0 && a == (a & -a));
91 return (v + a - 1) & ~(a - 1);
94 static inline uint64_t
95 align_u64(uint64_t v, uint64_t a)
97 assert(a != 0 && a == (a & -a));
98 return (v + a - 1) & ~(a - 1);
101 static inline int32_t
102 align_i32(int32_t v, int32_t a)
104 assert(a != 0 && a == (a & -a));
105 return (v + a - 1) & ~(a - 1);
108 /** Alignment must be a power of 2. */
110 anv_is_aligned(uintmax_t n, uintmax_t a)
112 assert(a == (a & -a));
113 return (n & (a - 1)) == 0;
116 static inline uint32_t
117 anv_minify(uint32_t n, uint32_t levels)
119 if (unlikely(n == 0))
122 return MAX(n >> levels, 1);
126 anv_clamp_f(float f, float min, float max)
139 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
141 if (*inout_mask & clear_mask) {
142 *inout_mask &= ~clear_mask;
149 #define for_each_bit(b, dword) \
150 for (uint32_t __dword = (dword); \
151 (b) = __builtin_ffs(__dword) - 1, __dword; \
152 __dword &= ~(1 << (b)))
154 #define typed_memcpy(dest, src, count) ({ \
155 static_assert(sizeof(*src) == sizeof(*dest), ""); \
156 memcpy((dest), (src), (count) * sizeof(*(src))); \
159 #define zero(x) (memset(&(x), 0, sizeof(x)))
161 /* Define no kernel as 1, since that's an illegal offset for a kernel */
165 VkStructureType sType;
169 /* Whenever we generate an error, pass it through this function. Useful for
170 * debugging, where we can break on it. Only call at error site, not when
171 * propagating errors. Might be useful to plug in a stack trace here.
174 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
177 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
178 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
180 #define vk_error(error) error
181 #define vk_errorf(error, format, ...) error
184 void __anv_finishme(const char *file, int line, const char *format, ...)
185 anv_printflike(3, 4);
186 void anv_loge(const char *format, ...) anv_printflike(1, 2);
187 void anv_loge_v(const char *format, va_list va);
190 * Print a FINISHME message, including its source location.
192 #define anv_finishme(format, ...) \
193 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
195 /* A non-fatal assert. Useful for debugging. */
197 #define anv_assert(x) ({ \
198 if (unlikely(!(x))) \
199 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
202 #define anv_assert(x)
206 * If a block of code is annotated with anv_validate, then the block runs only
210 #define anv_validate if (1)
212 #define anv_validate if (0)
215 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
216 void anv_abortfv(const char *format, va_list va) anv_noreturn;
218 #define stub_return(v) \
220 anv_finishme("stub %s", __func__); \
226 anv_finishme("stub %s", __func__); \
231 * A dynamically growable, circular buffer. Elements are added at head and
232 * removed from tail. head and tail are free-running uint32_t indices and we
233 * only compute the modulo with size when accessing the array. This way,
234 * number of bytes in the queue is always head - tail, even in case of
241 uint32_t element_size;
246 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
247 void *anv_vector_add(struct anv_vector *queue);
248 void *anv_vector_remove(struct anv_vector *queue);
251 anv_vector_length(struct anv_vector *queue)
253 return (queue->head - queue->tail) / queue->element_size;
257 anv_vector_head(struct anv_vector *vector)
259 assert(vector->tail < vector->head);
260 return (void *)((char *)vector->data +
261 ((vector->head - vector->element_size) &
262 (vector->size - 1)));
266 anv_vector_tail(struct anv_vector *vector)
268 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
272 anv_vector_finish(struct anv_vector *queue)
277 #define anv_vector_foreach(elem, queue) \
278 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
279 for (uint32_t __anv_vector_offset = (queue)->tail; \
280 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
281 __anv_vector_offset += (queue)->element_size)
286 /* Index into the current validation list. This is used by the
287 * validation list building alrogithm to track which buffers are already
288 * in the validation list so that we can ensure uniqueness.
292 /* Last known offset. This value is provided by the kernel when we
293 * execbuf and is used as the presumed offset for the next bunch of
301 /* We need to set the WRITE flag on winsys bos so GEM will know we're
302 * writing to them and synchronize uses on other rings (eg if the display
303 * server uses the blitter ring).
308 /* Represents a lock-free linked list of "free" things. This is used by
309 * both the block pool and the state pools. Unfortunately, in order to
310 * solve the ABA problem, we can't use a single uint32_t head.
312 union anv_free_list {
316 /* A simple count that is incremented every time the head changes. */
322 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
324 struct anv_block_state {
334 struct anv_block_pool {
335 struct anv_device *device;
339 /* The offset from the start of the bo to the "center" of the block
340 * pool. Pointers to allocated blocks are given by
341 * bo.map + center_bo_offset + offsets.
343 uint32_t center_bo_offset;
345 /* Current memory map of the block pool. This pointer may or may not
346 * point to the actual beginning of the block pool memory. If
347 * anv_block_pool_alloc_back has ever been called, then this pointer
348 * will point to the "center" position of the buffer and all offsets
349 * (negative or positive) given out by the block pool alloc functions
350 * will be valid relative to this pointer.
352 * In particular, map == bo.map + center_offset
358 * Array of mmaps and gem handles owned by the block pool, reclaimed when
359 * the block pool is destroyed.
361 struct anv_vector mmap_cleanups;
365 union anv_free_list free_list;
366 struct anv_block_state state;
368 union anv_free_list back_free_list;
369 struct anv_block_state back_state;
372 /* Block pools are backed by a fixed-size 2GB memfd */
373 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
375 /* The center of the block pool is also the middle of the memfd. This may
376 * change in the future if we decide differently for some reason.
378 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
380 static inline uint32_t
381 anv_block_pool_size(struct anv_block_pool *pool)
383 return pool->state.end + pool->back_state.end;
392 struct anv_fixed_size_state_pool {
394 union anv_free_list free_list;
395 struct anv_block_state block;
398 #define ANV_MIN_STATE_SIZE_LOG2 6
399 #define ANV_MAX_STATE_SIZE_LOG2 10
401 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
403 struct anv_state_pool {
404 struct anv_block_pool *block_pool;
405 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
408 struct anv_state_stream_block;
410 struct anv_state_stream {
411 struct anv_block_pool *block_pool;
413 /* The current working block */
414 struct anv_state_stream_block *block;
416 /* Offset at which the current block starts */
418 /* Offset at which to allocate the next state */
420 /* Offset at which the current block ends */
424 #define CACHELINE_SIZE 64
425 #define CACHELINE_MASK 63
428 anv_clflush_range(void *start, size_t size)
430 void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
431 void *end = start + size;
433 __builtin_ia32_mfence();
435 __builtin_ia32_clflush(p);
441 anv_state_clflush(struct anv_state state)
443 anv_clflush_range(state.map, state.alloc_size);
446 void anv_block_pool_init(struct anv_block_pool *pool,
447 struct anv_device *device, uint32_t block_size);
448 void anv_block_pool_finish(struct anv_block_pool *pool);
449 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
450 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
451 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
452 void anv_state_pool_init(struct anv_state_pool *pool,
453 struct anv_block_pool *block_pool);
454 void anv_state_pool_finish(struct anv_state_pool *pool);
455 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
456 size_t state_size, size_t alignment);
457 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
458 void anv_state_stream_init(struct anv_state_stream *stream,
459 struct anv_block_pool *block_pool);
460 void anv_state_stream_finish(struct anv_state_stream *stream);
461 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
462 uint32_t size, uint32_t alignment);
465 * Implements a pool of re-usable BOs. The interface is identical to that
466 * of block_pool except that each block is its own BO.
469 struct anv_device *device;
476 void anv_bo_pool_init(struct anv_bo_pool *pool,
477 struct anv_device *device, uint32_t block_size);
478 void anv_bo_pool_finish(struct anv_bo_pool *pool);
479 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
480 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
483 void *anv_resolve_entrypoint(uint32_t index);
485 extern struct anv_dispatch_table dtable;
487 #define ANV_CALL(func) ({ \
488 if (dtable.func == NULL) { \
489 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
490 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
496 anv_alloc(const VkAllocationCallbacks *alloc,
497 size_t size, size_t align,
498 VkSystemAllocationScope scope)
500 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
504 anv_realloc(const VkAllocationCallbacks *alloc,
505 void *ptr, size_t size, size_t align,
506 VkSystemAllocationScope scope)
508 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
512 anv_free(const VkAllocationCallbacks *alloc, void *data)
514 alloc->pfnFree(alloc->pUserData, data);
518 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
519 const VkAllocationCallbacks *alloc,
520 size_t size, size_t align,
521 VkSystemAllocationScope scope)
524 return anv_alloc(alloc, size, align, scope);
526 return anv_alloc(parent_alloc, size, align, scope);
530 anv_free2(const VkAllocationCallbacks *parent_alloc,
531 const VkAllocationCallbacks *alloc,
535 anv_free(alloc, data);
537 anv_free(parent_alloc, data);
540 struct anv_physical_device {
541 VK_LOADER_DATA _loader_data;
543 struct anv_instance * instance;
547 const struct brw_device_info * info;
548 uint64_t aperture_size;
549 struct brw_compiler * compiler;
550 struct isl_device isl_dev;
553 struct anv_wsi_interaface;
555 #define VK_ICD_WSI_PLATFORM_MAX 5
557 struct anv_instance {
558 VK_LOADER_DATA _loader_data;
560 VkAllocationCallbacks alloc;
563 int physicalDeviceCount;
564 struct anv_physical_device physicalDevice;
566 struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX];
569 VkResult anv_init_wsi(struct anv_instance *instance);
570 void anv_finish_wsi(struct anv_instance *instance);
572 struct anv_meta_state {
573 VkAllocationCallbacks alloc;
576 * Use array element `i` for images with `2^i` samples.
580 * Pipeline N is used to clear color attachment N of the current
583 * HACK: We use one pipeline per color attachment to work around the
584 * compiler's inability to dynamically set the render target index of
585 * the render target write message.
587 struct anv_pipeline *color_pipelines[MAX_RTS];
589 struct anv_pipeline *depth_only_pipeline;
590 struct anv_pipeline *stencil_only_pipeline;
591 struct anv_pipeline *depthstencil_pipeline;
592 } clear[1 + MAX_SAMPLES_LOG2];
595 VkRenderPass render_pass;
597 /** Pipeline that blits from a 1D image. */
598 VkPipeline pipeline_1d_src;
600 /** Pipeline that blits from a 2D image. */
601 VkPipeline pipeline_2d_src;
603 /** Pipeline that blits from a 3D image. */
604 VkPipeline pipeline_3d_src;
606 VkPipelineLayout pipeline_layout;
607 VkDescriptorSetLayout ds_layout;
611 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
612 VkPipeline pipelines[MAX_SAMPLES_LOG2];
615 VkPipelineLayout pipeline_layout;
616 VkDescriptorSetLayout ds_layout;
621 VK_LOADER_DATA _loader_data;
623 struct anv_device * device;
625 struct anv_state_pool * pool;
628 struct anv_pipeline_cache {
629 struct anv_device * device;
630 struct anv_state_stream program_stream;
631 pthread_mutex_t mutex;
635 uint32_t kernel_count;
639 void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
640 struct anv_device *device);
641 void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
642 uint32_t anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
643 const unsigned char *sha1, void *prog_data);
644 uint32_t anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
645 const unsigned char *sha1,
648 const void *prog_data,
649 size_t prog_data_size);
652 VK_LOADER_DATA _loader_data;
654 VkAllocationCallbacks alloc;
656 struct anv_instance * instance;
658 struct brw_device_info info;
659 struct isl_device isl_dev;
663 struct anv_bo_pool batch_bo_pool;
665 struct anv_block_pool dynamic_state_block_pool;
666 struct anv_state_pool dynamic_state_pool;
668 struct anv_block_pool instruction_block_pool;
669 struct anv_pipeline_cache default_pipeline_cache;
671 struct anv_block_pool surface_state_block_pool;
672 struct anv_state_pool surface_state_pool;
674 struct anv_bo workaround_bo;
676 struct anv_meta_state meta_state;
678 struct anv_state border_colors;
680 struct anv_queue queue;
682 struct anv_block_pool scratch_block_pool;
684 uint32_t default_mocs;
686 pthread_mutex_t mutex;
689 VkResult gen7_init_device_state(struct anv_device *device);
690 VkResult gen75_init_device_state(struct anv_device *device);
691 VkResult gen8_init_device_state(struct anv_device *device);
692 VkResult gen9_init_device_state(struct anv_device *device);
694 void anv_device_get_cache_uuid(void *uuid);
697 void* anv_gem_mmap(struct anv_device *device,
698 uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
699 void anv_gem_munmap(void *p, uint64_t size);
700 uint32_t anv_gem_create(struct anv_device *device, size_t size);
701 void anv_gem_close(struct anv_device *device, uint32_t gem_handle);
702 uint32_t anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
703 int anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns);
704 int anv_gem_execbuffer(struct anv_device *device,
705 struct drm_i915_gem_execbuffer2 *execbuf);
706 int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
707 uint32_t stride, uint32_t tiling);
708 int anv_gem_create_context(struct anv_device *device);
709 int anv_gem_destroy_context(struct anv_device *device, int context);
710 int anv_gem_get_param(int fd, uint32_t param);
711 bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
712 int anv_gem_get_aperture(int fd, uint64_t *size);
713 int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
714 uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
715 int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, uint32_t caching);
716 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
717 uint32_t read_domains, uint32_t write_domain);
719 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
721 struct anv_reloc_list {
724 struct drm_i915_gem_relocation_entry * relocs;
725 struct anv_bo ** reloc_bos;
728 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
729 const VkAllocationCallbacks *alloc);
730 void anv_reloc_list_finish(struct anv_reloc_list *list,
731 const VkAllocationCallbacks *alloc);
733 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
734 const VkAllocationCallbacks *alloc,
735 uint32_t offset, struct anv_bo *target_bo,
738 struct anv_batch_bo {
739 /* Link in the anv_cmd_buffer.owned_batch_bos list */
740 struct list_head link;
744 /* Bytes actually consumed in this batch BO */
747 /* Last seen surface state block pool bo offset */
748 uint32_t last_ss_pool_bo_offset;
750 struct anv_reloc_list relocs;
754 const VkAllocationCallbacks * alloc;
760 struct anv_reloc_list * relocs;
762 /* This callback is called (with the associated user data) in the event
763 * that the batch runs out of space.
765 VkResult (*extend_cb)(struct anv_batch *, void *);
769 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
770 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
771 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
772 void *location, struct anv_bo *bo, uint32_t offset);
773 VkResult anv_device_submit_simple_batch(struct anv_device *device,
774 struct anv_batch *batch);
781 #define __gen_address_type struct anv_address
782 #define __gen_user_data struct anv_batch
784 static inline uint64_t
785 __gen_combine_address(struct anv_batch *batch, void *location,
786 const struct anv_address address, uint32_t delta)
788 if (address.bo == NULL) {
789 return address.offset + delta;
791 assert(batch->start <= location && location < batch->end);
793 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
797 /* Wrapper macros needed to work around preprocessor argument issues. In
798 * particular, arguments don't get pre-evaluated if they are concatenated.
799 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
800 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
801 * We can work around this easily enough with these helpers.
803 #define __anv_cmd_length(cmd) cmd ## _length
804 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
805 #define __anv_cmd_header(cmd) cmd ## _header
806 #define __anv_cmd_pack(cmd) cmd ## _pack
808 #define anv_batch_emit(batch, cmd, ...) do { \
809 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
810 struct cmd __template = { \
811 __anv_cmd_header(cmd), \
814 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
815 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
818 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
819 void *__dst = anv_batch_emit_dwords(batch, n); \
820 struct cmd __template = { \
821 __anv_cmd_header(cmd), \
822 .DWordLength = n - __anv_cmd_length_bias(cmd), \
825 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
829 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
833 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
834 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
835 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
836 dw[i] = (dwords0)[i] | (dwords1)[i]; \
837 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
840 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
841 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
842 struct anv_state __state = \
843 anv_state_pool_alloc((pool), __size, align); \
844 struct cmd __template = { \
847 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
848 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
849 if (!(pool)->block_pool->device->info.has_llc) \
850 anv_state_clflush(__state); \
854 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
855 .GraphicsDataTypeGFDT = 0, \
856 .LLCCacheabilityControlLLCCC = 0, \
857 .L3CacheabilityControlL3CC = 1, \
860 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
861 .LLCeLLCCacheabilityControlLLCCC = 0, \
862 .L3CacheabilityControlL3CC = 1, \
865 #define GEN8_MOCS (struct GEN8_MEMORY_OBJECT_CONTROL_STATE) { \
866 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
867 .TargetCache = L3DefertoPATforLLCeLLCselection, \
871 /* Skylake: MOCS is now an index into an array of 62 different caching
872 * configurations programmed by the kernel.
875 #define GEN9_MOCS (struct GEN9_MEMORY_OBJECT_CONTROL_STATE) { \
876 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
877 .IndextoMOCSTables = 2 \
880 #define GEN9_MOCS_PTE { \
881 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
882 .IndextoMOCSTables = 1 \
885 struct anv_device_memory {
888 VkDeviceSize map_size;
893 * Header for Vertex URB Entry (VUE)
895 struct anv_vue_header {
897 uint32_t RTAIndex; /* RenderTargetArrayIndex */
898 uint32_t ViewportIndex;
902 struct anv_descriptor_set_binding_layout {
903 /* Number of array elements in this binding */
906 /* Index into the flattend descriptor set */
907 uint16_t descriptor_index;
909 /* Index into the dynamic state array for a dynamic buffer */
910 int16_t dynamic_offset_index;
912 /* Index into the descriptor set buffer views */
913 int16_t buffer_index;
916 /* Index into the binding table for the associated surface */
917 int16_t surface_index;
919 /* Index into the sampler table for the associated sampler */
920 int16_t sampler_index;
922 /* Index into the image table for the associated image */
924 } stage[MESA_SHADER_STAGES];
926 /* Immutable samplers (or NULL if no immutable samplers) */
927 struct anv_sampler **immutable_samplers;
930 struct anv_descriptor_set_layout {
931 /* Number of bindings in this descriptor set */
932 uint16_t binding_count;
934 /* Total size of the descriptor set with room for all array entries */
937 /* Shader stages affected by this descriptor set */
938 uint16_t shader_stages;
940 /* Number of buffers in this descriptor set */
941 uint16_t buffer_count;
943 /* Number of dynamic offsets used by this descriptor set */
944 uint16_t dynamic_offset_count;
946 /* Bindings in this descriptor set */
947 struct anv_descriptor_set_binding_layout binding[0];
950 struct anv_descriptor {
951 VkDescriptorType type;
955 struct anv_image_view *image_view;
956 struct anv_sampler *sampler;
959 struct anv_buffer_view *buffer_view;
963 struct anv_descriptor_set {
964 const struct anv_descriptor_set_layout *layout;
966 uint32_t buffer_count;
967 struct anv_buffer_view *buffer_views;
968 struct anv_descriptor descriptors[0];
971 struct anv_descriptor_pool {
976 struct anv_state_stream surface_state_stream;
977 void *surface_state_free_list;
983 anv_descriptor_set_create(struct anv_device *device,
984 struct anv_descriptor_pool *pool,
985 const struct anv_descriptor_set_layout *layout,
986 struct anv_descriptor_set **out_set);
989 anv_descriptor_set_destroy(struct anv_device *device,
990 struct anv_descriptor_pool *pool,
991 struct anv_descriptor_set *set);
993 struct anv_pipeline_binding {
994 /* The descriptor set this surface corresponds to */
997 /* Offset into the descriptor set */
1001 struct anv_pipeline_layout {
1003 struct anv_descriptor_set_layout *layout;
1004 uint32_t dynamic_offset_start;
1010 bool has_dynamic_offsets;
1011 } stage[MESA_SHADER_STAGES];
1015 struct anv_device * device;
1018 VkBufferUsageFlags usage;
1020 /* Set when bound */
1022 VkDeviceSize offset;
1025 enum anv_cmd_dirty_bits {
1026 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1027 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1028 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1029 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1030 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1031 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1032 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1033 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1034 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1035 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
1036 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
1037 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
1038 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
1040 typedef uint32_t anv_cmd_dirty_mask_t;
1042 struct anv_vertex_binding {
1043 struct anv_buffer * buffer;
1044 VkDeviceSize offset;
1047 struct anv_push_constants {
1048 /* Current allocated size of this push constants data structure.
1049 * Because a decent chunk of it may not be used (images on SKL, for
1050 * instance), we won't actually allocate the entire structure up-front.
1054 /* Push constant data provided by the client through vkPushConstants */
1055 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
1057 /* Our hardware only provides zero-based vertex and instance id so, in
1058 * order to satisfy the vulkan requirements, we may have to push one or
1059 * both of these into the shader.
1061 uint32_t base_vertex;
1062 uint32_t base_instance;
1064 /* Offsets and ranges for dynamically bound buffers */
1068 } dynamic[MAX_DYNAMIC_BUFFERS];
1070 /* Image data for image_load_store on pre-SKL */
1071 struct brw_image_param images[MAX_IMAGES];
1074 struct anv_dynamic_state {
1077 VkViewport viewports[MAX_VIEWPORTS];
1082 VkRect2D scissors[MAX_SCISSORS];
1093 float blend_constants[4];
1103 } stencil_compare_mask;
1108 } stencil_write_mask;
1113 } stencil_reference;
1116 extern const struct anv_dynamic_state default_dynamic_state;
1118 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
1119 const struct anv_dynamic_state *src,
1120 uint32_t copy_mask);
1123 * Attachment state when recording a renderpass instance.
1125 * The clear value is valid only if there exists a pending clear.
1127 struct anv_attachment_state {
1128 VkImageAspectFlags pending_clear_aspects;
1129 VkClearValue clear_value;
1132 /** State required while building cmd buffer */
1133 struct anv_cmd_state {
1134 /* PIPELINE_SELECT.PipelineSelection */
1135 uint32_t current_pipeline;
1136 uint32_t current_l3_config;
1138 anv_cmd_dirty_mask_t dirty;
1139 anv_cmd_dirty_mask_t compute_dirty;
1140 uint32_t num_workgroups_offset;
1141 struct anv_bo *num_workgroups_bo;
1142 VkShaderStageFlags descriptors_dirty;
1143 VkShaderStageFlags push_constants_dirty;
1144 uint32_t scratch_size;
1145 struct anv_pipeline * pipeline;
1146 struct anv_pipeline * compute_pipeline;
1147 struct anv_framebuffer * framebuffer;
1148 struct anv_render_pass * pass;
1149 struct anv_subpass * subpass;
1150 uint32_t restart_index;
1151 struct anv_vertex_binding vertex_bindings[MAX_VBS];
1152 struct anv_descriptor_set * descriptors[MAX_SETS];
1153 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
1154 struct anv_state binding_tables[MESA_SHADER_STAGES];
1155 struct anv_state samplers[MESA_SHADER_STAGES];
1156 struct anv_dynamic_state dynamic;
1160 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1161 * valid only when recording a render pass instance.
1163 struct anv_attachment_state * attachments;
1166 struct anv_buffer * index_buffer;
1167 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1168 uint32_t index_offset;
1172 struct anv_cmd_pool {
1173 VkAllocationCallbacks alloc;
1174 struct list_head cmd_buffers;
1177 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1179 enum anv_cmd_buffer_exec_mode {
1180 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1181 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1182 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1183 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1186 struct anv_cmd_buffer {
1187 VK_LOADER_DATA _loader_data;
1189 struct anv_device * device;
1191 struct anv_cmd_pool * pool;
1192 struct list_head pool_link;
1194 struct anv_batch batch;
1196 /* Fields required for the actual chain of anv_batch_bo's.
1198 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1200 struct list_head batch_bos;
1201 enum anv_cmd_buffer_exec_mode exec_mode;
1203 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1204 * referenced by this command buffer
1206 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1208 struct anv_vector seen_bbos;
1210 /* A vector of int32_t's for every block of binding tables.
1212 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1214 struct anv_vector bt_blocks;
1216 struct anv_reloc_list surface_relocs;
1218 /* Information needed for execbuf
1220 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1223 struct drm_i915_gem_execbuffer2 execbuf;
1225 struct drm_i915_gem_exec_object2 * objects;
1227 struct anv_bo ** bos;
1229 /* Allocated length of the 'objects' and 'bos' arrays */
1230 uint32_t array_length;
1235 /* Serial for tracking buffer completion */
1238 /* Stream objects for storing temporary data */
1239 struct anv_state_stream surface_state_stream;
1240 struct anv_state_stream dynamic_state_stream;
1242 VkCommandBufferUsageFlags usage_flags;
1243 VkCommandBufferLevel level;
1245 struct anv_cmd_state state;
1248 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1249 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1250 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1251 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1252 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1253 struct anv_cmd_buffer *secondary);
1254 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1256 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1257 unsigned stage, struct anv_state *bt_state);
1258 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1259 unsigned stage, struct anv_state *state);
1260 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1261 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer,
1264 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1265 const void *data, uint32_t size, uint32_t alignment);
1266 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1267 uint32_t *a, uint32_t *b,
1268 uint32_t dwords, uint32_t alignment);
1271 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1273 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1274 uint32_t entries, uint32_t *state_offset);
1276 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1278 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1279 uint32_t size, uint32_t alignment);
1282 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1284 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1285 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1287 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1288 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1289 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1290 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1292 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1294 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
1295 const VkRenderPassBeginInfo *info);
1297 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1298 struct anv_subpass *subpass);
1299 void gen75_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1300 struct anv_subpass *subpass);
1301 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1302 struct anv_subpass *subpass);
1303 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1304 struct anv_subpass *subpass);
1305 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1306 struct anv_subpass *subpass);
1308 void gen7_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
1309 void gen75_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
1310 void gen8_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
1311 void gen9_flush_pipeline_select_3d(struct anv_cmd_buffer *cmd_buffer);
1313 void gen7_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1314 void gen75_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1315 void gen8_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1316 void gen9_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1318 void gen7_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1319 void gen75_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1320 void gen8_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1321 void gen9_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1324 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1325 gl_shader_stage stage);
1327 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
1329 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
1330 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer);
1332 const struct anv_image_view *
1333 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1335 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1339 struct drm_i915_gem_execbuffer2 execbuf;
1340 struct drm_i915_gem_exec_object2 exec2_objects[1];
1346 struct anv_state state;
1351 struct anv_shader_module {
1352 struct nir_shader * nir;
1354 unsigned char sha1[20];
1359 void anv_hash_shader(unsigned char *hash, const void *key, size_t key_size,
1360 struct anv_shader_module *module,
1361 const char *entrypoint,
1362 const VkSpecializationInfo *spec_info);
1364 static inline gl_shader_stage
1365 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1367 assert(__builtin_popcount(vk_stage) == 1);
1368 return ffs(vk_stage) - 1;
1371 static inline VkShaderStageFlagBits
1372 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1374 return (1 << mesa_stage);
1377 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1379 #define anv_foreach_stage(stage, stage_bits) \
1380 for (gl_shader_stage stage, \
1381 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1382 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1383 __tmp &= ~(1 << (stage)))
1385 struct anv_pipeline_bind_map {
1386 uint32_t surface_count;
1387 uint32_t sampler_count;
1388 uint32_t image_count;
1390 struct anv_pipeline_binding * surface_to_descriptor;
1391 struct anv_pipeline_binding * sampler_to_descriptor;
1394 struct anv_pipeline {
1395 struct anv_device * device;
1396 struct anv_batch batch;
1397 uint32_t batch_data[512];
1398 struct anv_reloc_list batch_relocs;
1399 uint32_t dynamic_state_mask;
1400 struct anv_dynamic_state dynamic_state;
1402 struct anv_pipeline_layout * layout;
1403 struct anv_pipeline_bind_map bindings[MESA_SHADER_STAGES];
1407 struct brw_vs_prog_data vs_prog_data;
1408 struct brw_wm_prog_data wm_prog_data;
1409 struct brw_gs_prog_data gs_prog_data;
1410 struct brw_cs_prog_data cs_prog_data;
1411 bool writes_point_size;
1412 struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
1413 uint32_t scratch_start[MESA_SHADER_STAGES];
1414 uint32_t total_scratch;
1416 uint8_t push_size[MESA_SHADER_FRAGMENT + 1];
1417 uint32_t start[MESA_SHADER_GEOMETRY + 1];
1418 uint32_t size[MESA_SHADER_GEOMETRY + 1];
1419 uint32_t entries[MESA_SHADER_GEOMETRY + 1];
1422 VkShaderStageFlags active_stages;
1423 struct anv_state blend_state;
1430 uint32_t ps_grf_start0;
1431 uint32_t ps_grf_start2;
1436 uint32_t binding_stride[MAX_VBS];
1437 bool instancing_enable[MAX_VBS];
1438 bool primitive_restart;
1441 uint32_t cs_thread_width_max;
1442 uint32_t cs_right_mask;
1446 uint32_t depth_stencil_state[3];
1452 uint32_t wm_depth_stencil[3];
1456 uint32_t wm_depth_stencil[4];
1460 struct anv_graphics_pipeline_create_info {
1462 * If non-negative, overrides the color attachment count of the pipeline's
1465 int8_t color_attachment_count;
1468 bool disable_viewport;
1469 bool disable_scissor;
1475 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1476 struct anv_pipeline_cache *cache,
1477 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1478 const struct anv_graphics_pipeline_create_info *extra,
1479 const VkAllocationCallbacks *alloc);
1482 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1483 struct anv_pipeline_cache *cache,
1484 const VkComputePipelineCreateInfo *info,
1485 struct anv_shader_module *module,
1486 const char *entrypoint,
1487 const VkSpecializationInfo *spec_info);
1490 anv_graphics_pipeline_create(VkDevice device,
1491 VkPipelineCache cache,
1492 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1493 const struct anv_graphics_pipeline_create_info *extra,
1494 const VkAllocationCallbacks *alloc,
1495 VkPipeline *pPipeline);
1498 gen7_graphics_pipeline_create(VkDevice _device,
1499 struct anv_pipeline_cache *cache,
1500 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1501 const struct anv_graphics_pipeline_create_info *extra,
1502 const VkAllocationCallbacks *alloc,
1503 VkPipeline *pPipeline);
1506 gen75_graphics_pipeline_create(VkDevice _device,
1507 struct anv_pipeline_cache *cache,
1508 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1509 const struct anv_graphics_pipeline_create_info *extra,
1510 const VkAllocationCallbacks *alloc,
1511 VkPipeline *pPipeline);
1514 gen8_graphics_pipeline_create(VkDevice _device,
1515 struct anv_pipeline_cache *cache,
1516 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1517 const struct anv_graphics_pipeline_create_info *extra,
1518 const VkAllocationCallbacks *alloc,
1519 VkPipeline *pPipeline);
1521 gen9_graphics_pipeline_create(VkDevice _device,
1522 struct anv_pipeline_cache *cache,
1523 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1524 const struct anv_graphics_pipeline_create_info *extra,
1525 const VkAllocationCallbacks *alloc,
1526 VkPipeline *pPipeline);
1528 gen7_compute_pipeline_create(VkDevice _device,
1529 struct anv_pipeline_cache *cache,
1530 const VkComputePipelineCreateInfo *pCreateInfo,
1531 const VkAllocationCallbacks *alloc,
1532 VkPipeline *pPipeline);
1534 gen75_compute_pipeline_create(VkDevice _device,
1535 struct anv_pipeline_cache *cache,
1536 const VkComputePipelineCreateInfo *pCreateInfo,
1537 const VkAllocationCallbacks *alloc,
1538 VkPipeline *pPipeline);
1541 gen8_compute_pipeline_create(VkDevice _device,
1542 struct anv_pipeline_cache *cache,
1543 const VkComputePipelineCreateInfo *pCreateInfo,
1544 const VkAllocationCallbacks *alloc,
1545 VkPipeline *pPipeline);
1547 gen9_compute_pipeline_create(VkDevice _device,
1548 struct anv_pipeline_cache *cache,
1549 const VkComputePipelineCreateInfo *pCreateInfo,
1550 const VkAllocationCallbacks *alloc,
1551 VkPipeline *pPipeline);
1553 struct anv_format_swizzle {
1561 const VkFormat vk_format;
1563 enum isl_format isl_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1564 const struct isl_format_layout *isl_layout;
1565 struct anv_format_swizzle swizzle;
1570 const struct anv_format *
1571 anv_format_for_vk_format(VkFormat format);
1574 anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
1575 VkImageTiling tiling, struct anv_format_swizzle *swizzle);
1578 anv_format_is_color(const struct anv_format *format)
1580 return !format->has_depth && !format->has_stencil;
1584 anv_format_is_depth_or_stencil(const struct anv_format *format)
1586 return format->has_depth || format->has_stencil;
1590 * Subsurface of an anv_image.
1592 struct anv_surface {
1593 struct isl_surf isl;
1596 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1603 /* The original VkFormat provided by the client. This may not match any
1604 * of the actual surface formats.
1607 const struct anv_format *format;
1610 uint32_t array_size;
1611 uint32_t samples; /**< VkImageCreateInfo::samples */
1612 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1613 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1618 /* Set when bound */
1620 VkDeviceSize offset;
1625 * For each foo, anv_image::foo_surface is valid if and only if
1626 * anv_image::format has a foo aspect.
1628 * The hardware requires that the depth buffer and stencil buffer be
1629 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1630 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1631 * allocate the depth and stencil buffers as separate surfaces in the same
1635 struct anv_surface color_surface;
1638 struct anv_surface depth_surface;
1639 struct anv_surface stencil_surface;
1644 struct anv_image_view {
1645 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1647 uint32_t offset; /**< Offset into bo. */
1649 VkImageAspectFlags aspect_mask;
1651 uint32_t base_layer;
1653 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1655 /** RENDER_SURFACE_STATE when using image as a color render target. */
1656 struct anv_state color_rt_surface_state;
1658 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1659 struct anv_state sampler_surface_state;
1661 /** RENDER_SURFACE_STATE when using image as a storage image. */
1662 struct anv_state storage_surface_state;
1664 struct brw_image_param storage_image_param;
1667 struct anv_image_create_info {
1668 const VkImageCreateInfo *vk_info;
1669 isl_tiling_flags_t isl_tiling_flags;
1673 VkResult anv_image_create(VkDevice _device,
1674 const struct anv_image_create_info *info,
1675 const VkAllocationCallbacks* alloc,
1678 struct anv_surface *
1679 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1680 VkImageAspectFlags aspect_mask);
1682 void anv_image_view_init(struct anv_image_view *view,
1683 struct anv_device *device,
1684 const VkImageViewCreateInfo* pCreateInfo,
1685 struct anv_cmd_buffer *cmd_buffer,
1687 VkImageUsageFlags usage_mask);
1690 anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
1691 struct anv_image_view *iview,
1692 const VkImageViewCreateInfo *pCreateInfo,
1693 VkImageUsageFlagBits usage);
1695 gen7_fill_image_surface_state(struct anv_device *device, void *state_map,
1696 struct anv_image_view *iview,
1697 const VkImageViewCreateInfo *pCreateInfo,
1698 VkImageUsageFlagBits usage);
1700 gen75_fill_image_surface_state(struct anv_device *device, void *state_map,
1701 struct anv_image_view *iview,
1702 const VkImageViewCreateInfo *pCreateInfo,
1703 VkImageUsageFlagBits usage);
1705 gen8_fill_image_surface_state(struct anv_device *device, void *state_map,
1706 struct anv_image_view *iview,
1707 const VkImageViewCreateInfo *pCreateInfo,
1708 VkImageUsageFlagBits usage);
1710 gen9_fill_image_surface_state(struct anv_device *device, void *state_map,
1711 struct anv_image_view *iview,
1712 const VkImageViewCreateInfo *pCreateInfo,
1713 VkImageUsageFlagBits usage);
1715 struct anv_buffer_view {
1716 enum isl_format format; /**< VkBufferViewCreateInfo::format */
1718 uint32_t offset; /**< Offset into bo. */
1719 uint64_t range; /**< VkBufferViewCreateInfo::range */
1721 struct anv_state surface_state;
1722 struct anv_state storage_surface_state;
1724 struct brw_image_param storage_image_param;
1727 const struct anv_format *
1728 anv_format_for_descriptor_type(VkDescriptorType type);
1730 void anv_fill_buffer_surface_state(struct anv_device *device,
1731 struct anv_state state,
1732 enum isl_format format,
1733 uint32_t offset, uint32_t range,
1736 void gen7_fill_buffer_surface_state(void *state, enum isl_format format,
1737 uint32_t offset, uint32_t range,
1739 void gen75_fill_buffer_surface_state(void *state, enum isl_format format,
1740 uint32_t offset, uint32_t range,
1742 void gen8_fill_buffer_surface_state(void *state, enum isl_format format,
1743 uint32_t offset, uint32_t range,
1745 void gen9_fill_buffer_surface_state(void *state, enum isl_format format,
1746 uint32_t offset, uint32_t range,
1749 void anv_image_view_fill_image_param(struct anv_device *device,
1750 struct anv_image_view *view,
1751 struct brw_image_param *param);
1752 void anv_buffer_view_fill_image_param(struct anv_device *device,
1753 struct anv_buffer_view *view,
1754 struct brw_image_param *param);
1756 struct anv_sampler {
1760 struct anv_framebuffer {
1765 uint32_t attachment_count;
1766 struct anv_image_view * attachments[0];
1769 struct anv_subpass {
1770 uint32_t input_count;
1771 uint32_t * input_attachments;
1772 uint32_t color_count;
1773 uint32_t * color_attachments;
1774 uint32_t * resolve_attachments;
1775 uint32_t depth_stencil_attachment;
1777 /** Subpass has at least one resolve attachment */
1781 struct anv_render_pass_attachment {
1782 const struct anv_format *format;
1784 VkAttachmentLoadOp load_op;
1785 VkAttachmentLoadOp stencil_load_op;
1788 struct anv_render_pass {
1789 uint32_t attachment_count;
1790 uint32_t subpass_count;
1791 uint32_t * subpass_attachments;
1792 struct anv_render_pass_attachment * attachments;
1793 struct anv_subpass subpasses[0];
1796 extern struct anv_render_pass anv_meta_dummy_renderpass;
1798 struct anv_query_pool_slot {
1804 struct anv_query_pool {
1810 VkResult anv_device_init_meta(struct anv_device *device);
1811 void anv_device_finish_meta(struct anv_device *device);
1813 void *anv_lookup_entrypoint(const char *name);
1815 void anv_dump_image_to_ppm(struct anv_device *device,
1816 struct anv_image *image, unsigned miplevel,
1817 unsigned array_layer, const char *filename);
1819 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1821 static inline struct __anv_type * \
1822 __anv_type ## _from_handle(__VkType _handle) \
1824 return (struct __anv_type *) _handle; \
1827 static inline __VkType \
1828 __anv_type ## _to_handle(struct __anv_type *_obj) \
1830 return (__VkType) _obj; \
1833 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1835 static inline struct __anv_type * \
1836 __anv_type ## _from_handle(__VkType _handle) \
1838 return (struct __anv_type *)(uintptr_t) _handle; \
1841 static inline __VkType \
1842 __anv_type ## _to_handle(struct __anv_type *_obj) \
1844 return (__VkType)(uintptr_t) _obj; \
1847 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1848 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1850 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1851 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1852 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1853 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1854 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1856 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1857 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1858 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
1859 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool, VkDescriptorPool)
1860 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1861 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1862 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1863 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1864 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
1865 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1866 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1867 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1868 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
1869 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1870 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1871 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1872 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1873 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1874 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1876 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1878 static inline const __VkType * \
1879 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1881 return (const __VkType *) __anv_obj; \
1884 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1885 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1887 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1888 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1889 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)