2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
39 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
44 #include "common/gen_device_info.h"
45 #include "blorp/blorp.h"
46 #include "brw_compiler.h"
47 #include "util/macros.h"
48 #include "util/list.h"
50 /* Pre-declarations needed for WSI entrypoints */
53 typedef struct xcb_connection_t xcb_connection_t;
54 typedef uint32_t xcb_visualid_t;
55 typedef uint32_t xcb_window_t;
59 #include <vulkan/vulkan.h>
60 #include <vulkan/vulkan_intel.h>
61 #include <vulkan/vk_icd.h>
63 #include "anv_entrypoints.h"
64 #include "brw_context.h"
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
87 static inline uint32_t
88 align_down_npot_u32(uint32_t v, uint32_t a)
93 static inline uint32_t
94 align_u32(uint32_t v, uint32_t a)
96 assert(a != 0 && a == (a & -a));
97 return (v + a - 1) & ~(a - 1);
100 static inline uint64_t
101 align_u64(uint64_t v, uint64_t a)
103 assert(a != 0 && a == (a & -a));
104 return (v + a - 1) & ~(a - 1);
107 static inline int32_t
108 align_i32(int32_t v, int32_t a)
110 assert(a != 0 && a == (a & -a));
111 return (v + a - 1) & ~(a - 1);
114 /** Alignment must be a power of 2. */
116 anv_is_aligned(uintmax_t n, uintmax_t a)
118 assert(a == (a & -a));
119 return (n & (a - 1)) == 0;
122 static inline uint32_t
123 anv_minify(uint32_t n, uint32_t levels)
125 if (unlikely(n == 0))
128 return MAX(n >> levels, 1);
132 anv_clamp_f(float f, float min, float max)
145 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
147 if (*inout_mask & clear_mask) {
148 *inout_mask &= ~clear_mask;
155 #define for_each_bit(b, dword) \
156 for (uint32_t __dword = (dword); \
157 (b) = __builtin_ffs(__dword) - 1, __dword; \
158 __dword &= ~(1 << (b)))
160 #define typed_memcpy(dest, src, count) ({ \
161 static_assert(sizeof(*src) == sizeof(*dest), ""); \
162 memcpy((dest), (src), (count) * sizeof(*(src))); \
165 #define zero(x) (memset(&(x), 0, sizeof(x)))
167 /* Define no kernel as 1, since that's an illegal offset for a kernel */
171 VkStructureType sType;
175 /* Whenever we generate an error, pass it through this function. Useful for
176 * debugging, where we can break on it. Only call at error site, not when
177 * propagating errors. Might be useful to plug in a stack trace here.
180 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
183 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
184 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
186 #define vk_error(error) error
187 #define vk_errorf(error, format, ...) error
190 void __anv_finishme(const char *file, int line, const char *format, ...)
191 anv_printflike(3, 4);
192 void anv_loge(const char *format, ...) anv_printflike(1, 2);
193 void anv_loge_v(const char *format, va_list va);
196 * Print a FINISHME message, including its source location.
198 #define anv_finishme(format, ...) \
199 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
201 /* A non-fatal assert. Useful for debugging. */
203 #define anv_assert(x) ({ \
204 if (unlikely(!(x))) \
205 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
208 #define anv_assert(x)
212 * If a block of code is annotated with anv_validate, then the block runs only
216 #define anv_validate if (1)
218 #define anv_validate if (0)
221 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
222 void anv_abortfv(const char *format, va_list va) anv_noreturn;
224 #define stub_return(v) \
226 anv_finishme("stub %s", __func__); \
232 anv_finishme("stub %s", __func__); \
237 * A dynamically growable, circular buffer. Elements are added at head and
238 * removed from tail. head and tail are free-running uint32_t indices and we
239 * only compute the modulo with size when accessing the array. This way,
240 * number of bytes in the queue is always head - tail, even in case of
247 uint32_t element_size;
252 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
253 void *anv_vector_add(struct anv_vector *queue);
254 void *anv_vector_remove(struct anv_vector *queue);
257 anv_vector_length(struct anv_vector *queue)
259 return (queue->head - queue->tail) / queue->element_size;
263 anv_vector_head(struct anv_vector *vector)
265 assert(vector->tail < vector->head);
266 return (void *)((char *)vector->data +
267 ((vector->head - vector->element_size) &
268 (vector->size - 1)));
272 anv_vector_tail(struct anv_vector *vector)
274 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
278 anv_vector_finish(struct anv_vector *queue)
283 #define anv_vector_foreach(elem, queue) \
284 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
285 for (uint32_t __anv_vector_offset = (queue)->tail; \
286 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
287 __anv_vector_offset += (queue)->element_size)
292 /* Index into the current validation list. This is used by the
293 * validation list building alrogithm to track which buffers are already
294 * in the validation list so that we can ensure uniqueness.
298 /* Last known offset. This value is provided by the kernel when we
299 * execbuf and is used as the presumed offset for the next bunch of
307 /* We need to set the WRITE flag on winsys bos so GEM will know we're
308 * writing to them and synchronize uses on other rings (eg if the display
309 * server uses the blitter ring).
314 /* Represents a lock-free linked list of "free" things. This is used by
315 * both the block pool and the state pools. Unfortunately, in order to
316 * solve the ABA problem, we can't use a single uint32_t head.
318 union anv_free_list {
322 /* A simple count that is incremented every time the head changes. */
328 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
330 struct anv_block_state {
340 struct anv_block_pool {
341 struct anv_device *device;
345 /* The offset from the start of the bo to the "center" of the block
346 * pool. Pointers to allocated blocks are given by
347 * bo.map + center_bo_offset + offsets.
349 uint32_t center_bo_offset;
351 /* Current memory map of the block pool. This pointer may or may not
352 * point to the actual beginning of the block pool memory. If
353 * anv_block_pool_alloc_back has ever been called, then this pointer
354 * will point to the "center" position of the buffer and all offsets
355 * (negative or positive) given out by the block pool alloc functions
356 * will be valid relative to this pointer.
358 * In particular, map == bo.map + center_offset
364 * Array of mmaps and gem handles owned by the block pool, reclaimed when
365 * the block pool is destroyed.
367 struct anv_vector mmap_cleanups;
371 union anv_free_list free_list;
372 struct anv_block_state state;
374 union anv_free_list back_free_list;
375 struct anv_block_state back_state;
378 /* Block pools are backed by a fixed-size 2GB memfd */
379 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
381 /* The center of the block pool is also the middle of the memfd. This may
382 * change in the future if we decide differently for some reason.
384 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
386 static inline uint32_t
387 anv_block_pool_size(struct anv_block_pool *pool)
389 return pool->state.end + pool->back_state.end;
398 struct anv_fixed_size_state_pool {
400 union anv_free_list free_list;
401 struct anv_block_state block;
404 #define ANV_MIN_STATE_SIZE_LOG2 6
405 #define ANV_MAX_STATE_SIZE_LOG2 17
407 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2 + 1)
409 struct anv_state_pool {
410 struct anv_block_pool *block_pool;
411 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
414 struct anv_state_stream_block;
416 struct anv_state_stream {
417 struct anv_block_pool *block_pool;
419 /* The current working block */
420 struct anv_state_stream_block *block;
422 /* Offset at which the current block starts */
424 /* Offset at which to allocate the next state */
426 /* Offset at which the current block ends */
430 #define CACHELINE_SIZE 64
431 #define CACHELINE_MASK 63
434 anv_clflush_range(void *start, size_t size)
436 void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
437 void *end = start + size;
439 __builtin_ia32_mfence();
441 __builtin_ia32_clflush(p);
447 anv_state_clflush(struct anv_state state)
449 anv_clflush_range(state.map, state.alloc_size);
452 void anv_block_pool_init(struct anv_block_pool *pool,
453 struct anv_device *device, uint32_t block_size);
454 void anv_block_pool_finish(struct anv_block_pool *pool);
455 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
456 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
457 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
458 void anv_state_pool_init(struct anv_state_pool *pool,
459 struct anv_block_pool *block_pool);
460 void anv_state_pool_finish(struct anv_state_pool *pool);
461 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
462 size_t state_size, size_t alignment);
463 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
464 void anv_state_stream_init(struct anv_state_stream *stream,
465 struct anv_block_pool *block_pool);
466 void anv_state_stream_finish(struct anv_state_stream *stream);
467 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
468 uint32_t size, uint32_t alignment);
471 * Implements a pool of re-usable BOs. The interface is identical to that
472 * of block_pool except that each block is its own BO.
475 struct anv_device *device;
480 void anv_bo_pool_init(struct anv_bo_pool *pool, struct anv_device *device);
481 void anv_bo_pool_finish(struct anv_bo_pool *pool);
482 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo,
484 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
486 struct anv_scratch_pool {
487 /* Indexed by Per-Thread Scratch Space number (the hardware value) and stage */
488 struct anv_bo bos[16][MESA_SHADER_STAGES];
491 void anv_scratch_pool_init(struct anv_device *device,
492 struct anv_scratch_pool *pool);
493 void anv_scratch_pool_finish(struct anv_device *device,
494 struct anv_scratch_pool *pool);
495 struct anv_bo *anv_scratch_pool_alloc(struct anv_device *device,
496 struct anv_scratch_pool *pool,
497 gl_shader_stage stage,
498 unsigned per_thread_scratch);
500 extern struct anv_dispatch_table dtable;
503 anv_alloc(const VkAllocationCallbacks *alloc,
504 size_t size, size_t align,
505 VkSystemAllocationScope scope)
507 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
511 anv_realloc(const VkAllocationCallbacks *alloc,
512 void *ptr, size_t size, size_t align,
513 VkSystemAllocationScope scope)
515 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
519 anv_free(const VkAllocationCallbacks *alloc, void *data)
521 alloc->pfnFree(alloc->pUserData, data);
525 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
526 const VkAllocationCallbacks *alloc,
527 size_t size, size_t align,
528 VkSystemAllocationScope scope)
531 return anv_alloc(alloc, size, align, scope);
533 return anv_alloc(parent_alloc, size, align, scope);
537 anv_free2(const VkAllocationCallbacks *parent_alloc,
538 const VkAllocationCallbacks *alloc,
542 anv_free(alloc, data);
544 anv_free(parent_alloc, data);
547 struct anv_wsi_interaface;
549 #define VK_ICD_WSI_PLATFORM_MAX 5
551 struct anv_physical_device {
552 VK_LOADER_DATA _loader_data;
554 struct anv_instance * instance;
558 struct gen_device_info info;
559 uint64_t aperture_size;
560 struct brw_compiler * compiler;
561 struct isl_device isl_dev;
562 int cmd_parser_version;
565 uint32_t subslice_total;
567 struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX];
570 struct anv_instance {
571 VK_LOADER_DATA _loader_data;
573 VkAllocationCallbacks alloc;
576 int physicalDeviceCount;
577 struct anv_physical_device physicalDevice;
580 VkResult anv_init_wsi(struct anv_physical_device *physical_device);
581 void anv_finish_wsi(struct anv_physical_device *physical_device);
584 VK_LOADER_DATA _loader_data;
586 struct anv_device * device;
588 struct anv_state_pool * pool;
591 struct anv_pipeline_cache {
592 struct anv_device * device;
593 pthread_mutex_t mutex;
595 struct hash_table * cache;
598 struct anv_pipeline_bind_map;
600 void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
601 struct anv_device *device,
603 void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
605 struct anv_shader_bin *
606 anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
607 const void *key, uint32_t key_size);
608 struct anv_shader_bin *
609 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
610 const void *key_data, uint32_t key_size,
611 const void *kernel_data, uint32_t kernel_size,
612 const void *prog_data, uint32_t prog_data_size,
613 const struct anv_pipeline_bind_map *bind_map);
616 VK_LOADER_DATA _loader_data;
618 VkAllocationCallbacks alloc;
620 struct anv_instance * instance;
622 struct gen_device_info info;
623 struct isl_device isl_dev;
626 bool can_chain_batches;
627 bool robust_buffer_access;
629 struct anv_bo_pool batch_bo_pool;
631 struct anv_block_pool dynamic_state_block_pool;
632 struct anv_state_pool dynamic_state_pool;
634 struct anv_block_pool instruction_block_pool;
635 struct anv_state_pool instruction_state_pool;
637 struct anv_block_pool surface_state_block_pool;
638 struct anv_state_pool surface_state_pool;
640 struct anv_bo workaround_bo;
642 struct anv_pipeline_cache blorp_shader_cache;
643 struct blorp_context blorp;
645 struct anv_state border_colors;
647 struct anv_queue queue;
649 struct anv_scratch_pool scratch_pool;
651 uint32_t default_mocs;
653 pthread_mutex_t mutex;
656 void anv_device_get_cache_uuid(void *uuid);
658 void anv_device_init_blorp(struct anv_device *device);
659 void anv_device_finish_blorp(struct anv_device *device);
661 void* anv_gem_mmap(struct anv_device *device,
662 uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
663 void anv_gem_munmap(void *p, uint64_t size);
664 uint32_t anv_gem_create(struct anv_device *device, size_t size);
665 void anv_gem_close(struct anv_device *device, uint32_t gem_handle);
666 uint32_t anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
667 int anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns);
668 int anv_gem_execbuffer(struct anv_device *device,
669 struct drm_i915_gem_execbuffer2 *execbuf);
670 int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
671 uint32_t stride, uint32_t tiling);
672 int anv_gem_create_context(struct anv_device *device);
673 int anv_gem_destroy_context(struct anv_device *device, int context);
674 int anv_gem_get_param(int fd, uint32_t param);
675 bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
676 int anv_gem_get_aperture(int fd, uint64_t *size);
677 int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
678 uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
679 int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, uint32_t caching);
680 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
681 uint32_t read_domains, uint32_t write_domain);
683 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
685 struct anv_reloc_list {
688 struct drm_i915_gem_relocation_entry * relocs;
689 struct anv_bo ** reloc_bos;
692 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
693 const VkAllocationCallbacks *alloc);
694 void anv_reloc_list_finish(struct anv_reloc_list *list,
695 const VkAllocationCallbacks *alloc);
697 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
698 const VkAllocationCallbacks *alloc,
699 uint32_t offset, struct anv_bo *target_bo,
702 struct anv_batch_bo {
703 /* Link in the anv_cmd_buffer.owned_batch_bos list */
704 struct list_head link;
708 /* Bytes actually consumed in this batch BO */
711 /* Last seen surface state block pool bo offset */
712 uint32_t last_ss_pool_bo_offset;
714 struct anv_reloc_list relocs;
718 const VkAllocationCallbacks * alloc;
724 struct anv_reloc_list * relocs;
726 /* This callback is called (with the associated user data) in the event
727 * that the batch runs out of space.
729 VkResult (*extend_cb)(struct anv_batch *, void *);
733 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
734 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
735 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
736 void *location, struct anv_bo *bo, uint32_t offset);
737 VkResult anv_device_submit_simple_batch(struct anv_device *device,
738 struct anv_batch *batch);
745 static inline uint64_t
746 _anv_combine_address(struct anv_batch *batch, void *location,
747 const struct anv_address address, uint32_t delta)
749 if (address.bo == NULL) {
750 return address.offset + delta;
752 assert(batch->start <= location && location < batch->end);
754 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
758 #define __gen_address_type struct anv_address
759 #define __gen_user_data struct anv_batch
760 #define __gen_combine_address _anv_combine_address
762 /* Wrapper macros needed to work around preprocessor argument issues. In
763 * particular, arguments don't get pre-evaluated if they are concatenated.
764 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
765 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
766 * We can work around this easily enough with these helpers.
768 #define __anv_cmd_length(cmd) cmd ## _length
769 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
770 #define __anv_cmd_header(cmd) cmd ## _header
771 #define __anv_cmd_pack(cmd) cmd ## _pack
772 #define __anv_reg_num(reg) reg ## _num
774 #define anv_pack_struct(dst, struc, ...) do { \
775 struct struc __template = { \
778 __anv_cmd_pack(struc)(NULL, dst, &__template); \
779 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dst, __anv_cmd_length(struc) * 4)); \
782 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
783 void *__dst = anv_batch_emit_dwords(batch, n); \
784 struct cmd __template = { \
785 __anv_cmd_header(cmd), \
786 .DWordLength = n - __anv_cmd_length_bias(cmd), \
789 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
793 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
797 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
798 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
799 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
800 dw[i] = (dwords0)[i] | (dwords1)[i]; \
801 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
804 #define anv_batch_emit(batch, cmd, name) \
805 for (struct cmd name = { __anv_cmd_header(cmd) }, \
806 *_dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
807 __builtin_expect(_dst != NULL, 1); \
808 ({ __anv_cmd_pack(cmd)(batch, _dst, &name); \
809 VG(VALGRIND_CHECK_MEM_IS_DEFINED(_dst, __anv_cmd_length(cmd) * 4)); \
813 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
814 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
815 struct anv_state __state = \
816 anv_state_pool_alloc((pool), __size, align); \
817 struct cmd __template = { \
820 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
821 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
822 if (!(pool)->block_pool->device->info.has_llc) \
823 anv_state_clflush(__state); \
827 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
828 .GraphicsDataTypeGFDT = 0, \
829 .LLCCacheabilityControlLLCCC = 0, \
830 .L3CacheabilityControlL3CC = 1, \
833 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
834 .LLCeLLCCacheabilityControlLLCCC = 0, \
835 .L3CacheabilityControlL3CC = 1, \
838 #define GEN8_MOCS (struct GEN8_MEMORY_OBJECT_CONTROL_STATE) { \
839 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
840 .TargetCache = L3DefertoPATforLLCeLLCselection, \
844 /* Skylake: MOCS is now an index into an array of 62 different caching
845 * configurations programmed by the kernel.
848 #define GEN9_MOCS (struct GEN9_MEMORY_OBJECT_CONTROL_STATE) { \
849 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
850 .IndextoMOCSTables = 2 \
853 #define GEN9_MOCS_PTE { \
854 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
855 .IndextoMOCSTables = 1 \
858 struct anv_device_memory {
861 VkDeviceSize map_size;
866 * Header for Vertex URB Entry (VUE)
868 struct anv_vue_header {
870 uint32_t RTAIndex; /* RenderTargetArrayIndex */
871 uint32_t ViewportIndex;
875 struct anv_descriptor_set_binding_layout {
877 /* The type of the descriptors in this binding */
878 VkDescriptorType type;
881 /* Number of array elements in this binding */
884 /* Index into the flattend descriptor set */
885 uint16_t descriptor_index;
887 /* Index into the dynamic state array for a dynamic buffer */
888 int16_t dynamic_offset_index;
890 /* Index into the descriptor set buffer views */
891 int16_t buffer_index;
894 /* Index into the binding table for the associated surface */
895 int16_t surface_index;
897 /* Index into the sampler table for the associated sampler */
898 int16_t sampler_index;
900 /* Index into the image table for the associated image */
902 } stage[MESA_SHADER_STAGES];
904 /* Immutable samplers (or NULL if no immutable samplers) */
905 struct anv_sampler **immutable_samplers;
908 struct anv_descriptor_set_layout {
909 /* Number of bindings in this descriptor set */
910 uint16_t binding_count;
912 /* Total size of the descriptor set with room for all array entries */
915 /* Shader stages affected by this descriptor set */
916 uint16_t shader_stages;
918 /* Number of buffers in this descriptor set */
919 uint16_t buffer_count;
921 /* Number of dynamic offsets used by this descriptor set */
922 uint16_t dynamic_offset_count;
924 /* Bindings in this descriptor set */
925 struct anv_descriptor_set_binding_layout binding[0];
928 struct anv_descriptor {
929 VkDescriptorType type;
933 struct anv_image_view *image_view;
934 struct anv_sampler *sampler;
937 struct anv_buffer_view *buffer_view;
941 struct anv_descriptor_set {
942 const struct anv_descriptor_set_layout *layout;
944 uint32_t buffer_count;
945 struct anv_buffer_view *buffer_views;
946 struct anv_descriptor descriptors[0];
949 struct anv_descriptor_pool {
954 struct anv_state_stream surface_state_stream;
955 void *surface_state_free_list;
961 anv_descriptor_set_create(struct anv_device *device,
962 struct anv_descriptor_pool *pool,
963 const struct anv_descriptor_set_layout *layout,
964 struct anv_descriptor_set **out_set);
967 anv_descriptor_set_destroy(struct anv_device *device,
968 struct anv_descriptor_pool *pool,
969 struct anv_descriptor_set *set);
971 #define ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS UINT8_MAX
973 struct anv_pipeline_binding {
974 /* The descriptor set this surface corresponds to. The special value of
975 * ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS indicates that the offset refers
976 * to a color attachment and not a regular descriptor.
980 /* Binding in the descriptor set */
983 /* Index in the binding */
987 struct anv_pipeline_layout {
989 struct anv_descriptor_set_layout *layout;
990 uint32_t dynamic_offset_start;
996 bool has_dynamic_offsets;
997 } stage[MESA_SHADER_STAGES];
999 unsigned char sha1[20];
1003 struct anv_device * device;
1006 VkBufferUsageFlags usage;
1008 /* Set when bound */
1010 VkDeviceSize offset;
1013 enum anv_cmd_dirty_bits {
1014 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1015 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1016 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1017 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1018 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1019 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1020 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1021 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1022 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1023 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
1024 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
1025 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
1026 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
1028 typedef uint32_t anv_cmd_dirty_mask_t;
1030 enum anv_pipe_bits {
1031 ANV_PIPE_DEPTH_CACHE_FLUSH_BIT = (1 << 0),
1032 ANV_PIPE_STALL_AT_SCOREBOARD_BIT = (1 << 1),
1033 ANV_PIPE_STATE_CACHE_INVALIDATE_BIT = (1 << 2),
1034 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT = (1 << 3),
1035 ANV_PIPE_VF_CACHE_INVALIDATE_BIT = (1 << 4),
1036 ANV_PIPE_DATA_CACHE_FLUSH_BIT = (1 << 5),
1037 ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT = (1 << 10),
1038 ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT = (1 << 11),
1039 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT = (1 << 12),
1040 ANV_PIPE_DEPTH_STALL_BIT = (1 << 13),
1041 ANV_PIPE_CS_STALL_BIT = (1 << 20),
1043 /* This bit does not exist directly in PIPE_CONTROL. Instead it means that
1044 * a flush has happened but not a CS stall. The next time we do any sort
1045 * of invalidation we need to insert a CS stall at that time. Otherwise,
1046 * we would have to CS stall on every flush which could be bad.
1048 ANV_PIPE_NEEDS_CS_STALL_BIT = (1 << 21),
1051 #define ANV_PIPE_FLUSH_BITS ( \
1052 ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | \
1053 ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
1054 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT)
1056 #define ANV_PIPE_STALL_BITS ( \
1057 ANV_PIPE_STALL_AT_SCOREBOARD_BIT | \
1058 ANV_PIPE_DEPTH_STALL_BIT | \
1059 ANV_PIPE_CS_STALL_BIT)
1061 #define ANV_PIPE_INVALIDATE_BITS ( \
1062 ANV_PIPE_STATE_CACHE_INVALIDATE_BIT | \
1063 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT | \
1064 ANV_PIPE_VF_CACHE_INVALIDATE_BIT | \
1065 ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
1066 ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT | \
1067 ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT)
1069 struct anv_vertex_binding {
1070 struct anv_buffer * buffer;
1071 VkDeviceSize offset;
1074 struct anv_push_constants {
1075 /* Current allocated size of this push constants data structure.
1076 * Because a decent chunk of it may not be used (images on SKL, for
1077 * instance), we won't actually allocate the entire structure up-front.
1081 /* Push constant data provided by the client through vkPushConstants */
1082 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
1084 /* Our hardware only provides zero-based vertex and instance id so, in
1085 * order to satisfy the vulkan requirements, we may have to push one or
1086 * both of these into the shader.
1088 uint32_t base_vertex;
1089 uint32_t base_instance;
1091 /* Offsets and ranges for dynamically bound buffers */
1095 } dynamic[MAX_DYNAMIC_BUFFERS];
1097 /* Image data for image_load_store on pre-SKL */
1098 struct brw_image_param images[MAX_IMAGES];
1101 struct anv_dynamic_state {
1104 VkViewport viewports[MAX_VIEWPORTS];
1109 VkRect2D scissors[MAX_SCISSORS];
1120 float blend_constants[4];
1130 } stencil_compare_mask;
1135 } stencil_write_mask;
1140 } stencil_reference;
1143 extern const struct anv_dynamic_state default_dynamic_state;
1145 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
1146 const struct anv_dynamic_state *src,
1147 uint32_t copy_mask);
1150 * Attachment state when recording a renderpass instance.
1152 * The clear value is valid only if there exists a pending clear.
1154 struct anv_attachment_state {
1155 VkImageAspectFlags pending_clear_aspects;
1156 VkClearValue clear_value;
1159 /** State required while building cmd buffer */
1160 struct anv_cmd_state {
1161 /* PIPELINE_SELECT.PipelineSelection */
1162 uint32_t current_pipeline;
1163 const struct gen_l3_config * current_l3_config;
1165 anv_cmd_dirty_mask_t dirty;
1166 anv_cmd_dirty_mask_t compute_dirty;
1167 enum anv_pipe_bits pending_pipe_bits;
1168 uint32_t num_workgroups_offset;
1169 struct anv_bo *num_workgroups_bo;
1170 VkShaderStageFlags descriptors_dirty;
1171 VkShaderStageFlags push_constants_dirty;
1172 uint32_t scratch_size;
1173 struct anv_pipeline * pipeline;
1174 struct anv_pipeline * compute_pipeline;
1175 struct anv_framebuffer * framebuffer;
1176 struct anv_render_pass * pass;
1177 struct anv_subpass * subpass;
1178 VkRect2D render_area;
1179 uint32_t restart_index;
1180 struct anv_vertex_binding vertex_bindings[MAX_VBS];
1181 struct anv_descriptor_set * descriptors[MAX_SETS];
1182 VkShaderStageFlags push_constant_stages;
1183 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
1184 struct anv_state binding_tables[MESA_SHADER_STAGES];
1185 struct anv_state samplers[MESA_SHADER_STAGES];
1186 struct anv_dynamic_state dynamic;
1190 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1191 * valid only when recording a render pass instance.
1193 struct anv_attachment_state * attachments;
1196 struct anv_buffer * index_buffer;
1197 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1198 uint32_t index_offset;
1202 struct anv_cmd_pool {
1203 VkAllocationCallbacks alloc;
1204 struct list_head cmd_buffers;
1207 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1209 enum anv_cmd_buffer_exec_mode {
1210 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1211 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1212 ANV_CMD_BUFFER_EXEC_MODE_GROW_AND_EMIT,
1213 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1214 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1217 struct anv_cmd_buffer {
1218 VK_LOADER_DATA _loader_data;
1220 struct anv_device * device;
1222 struct anv_cmd_pool * pool;
1223 struct list_head pool_link;
1225 struct anv_batch batch;
1227 /* Fields required for the actual chain of anv_batch_bo's.
1229 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1231 struct list_head batch_bos;
1232 enum anv_cmd_buffer_exec_mode exec_mode;
1234 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1235 * referenced by this command buffer
1237 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1239 struct anv_vector seen_bbos;
1241 /* A vector of int32_t's for every block of binding tables.
1243 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1245 struct anv_vector bt_blocks;
1247 struct anv_reloc_list surface_relocs;
1249 /* Information needed for execbuf
1251 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1254 struct drm_i915_gem_execbuffer2 execbuf;
1256 struct drm_i915_gem_exec_object2 * objects;
1258 struct anv_bo ** bos;
1260 /* Allocated length of the 'objects' and 'bos' arrays */
1261 uint32_t array_length;
1266 /* Serial for tracking buffer completion */
1269 /* Stream objects for storing temporary data */
1270 struct anv_state_stream surface_state_stream;
1271 struct anv_state_stream dynamic_state_stream;
1273 VkCommandBufferUsageFlags usage_flags;
1274 VkCommandBufferLevel level;
1276 struct anv_cmd_state state;
1279 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1280 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1281 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1282 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1283 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1284 struct anv_cmd_buffer *secondary);
1285 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1287 VkResult anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer);
1290 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
1291 gl_shader_stage stage, uint32_t size);
1292 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
1293 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
1294 (offsetof(struct anv_push_constants, field) + \
1295 sizeof(cmd_buffer->state.push_constants[0]->field)))
1297 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1298 const void *data, uint32_t size, uint32_t alignment);
1299 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1300 uint32_t *a, uint32_t *b,
1301 uint32_t dwords, uint32_t alignment);
1304 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1306 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1307 uint32_t entries, uint32_t *state_offset);
1309 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1311 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1312 uint32_t size, uint32_t alignment);
1315 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1317 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1318 void gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer *cmd_buffer,
1319 bool depth_clamp_enable);
1320 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1322 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1324 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
1325 const VkRenderPassBeginInfo *info);
1328 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1329 gl_shader_stage stage);
1331 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
1333 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
1334 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer);
1336 const struct anv_image_view *
1337 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1339 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1343 struct drm_i915_gem_execbuffer2 execbuf;
1344 struct drm_i915_gem_exec_object2 exec2_objects[1];
1350 struct anv_state state;
1353 struct anv_shader_module {
1354 unsigned char sha1[20];
1359 void anv_hash_shader(unsigned char *hash, const void *key, size_t key_size,
1360 struct anv_shader_module *module,
1361 const char *entrypoint,
1362 const struct anv_pipeline_layout *pipeline_layout,
1363 const VkSpecializationInfo *spec_info);
1365 static inline gl_shader_stage
1366 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1368 assert(__builtin_popcount(vk_stage) == 1);
1369 return ffs(vk_stage) - 1;
1372 static inline VkShaderStageFlagBits
1373 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1375 return (1 << mesa_stage);
1378 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1380 #define anv_foreach_stage(stage, stage_bits) \
1381 for (gl_shader_stage stage, \
1382 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1383 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1384 __tmp &= ~(1 << (stage)))
1386 struct anv_pipeline_bind_map {
1387 uint32_t surface_count;
1388 uint32_t sampler_count;
1389 uint32_t image_count;
1391 struct anv_pipeline_binding * surface_to_descriptor;
1392 struct anv_pipeline_binding * sampler_to_descriptor;
1395 struct anv_shader_bin {
1398 struct anv_state kernel;
1399 uint32_t kernel_size;
1401 struct anv_pipeline_bind_map bind_map;
1403 uint32_t prog_data_size;
1405 /* Prog data follows, then the key, both aligned to 8-bytes */
1408 struct anv_shader_bin *
1409 anv_shader_bin_create(struct anv_device *device,
1410 const void *key, uint32_t key_size,
1411 const void *kernel, uint32_t kernel_size,
1412 const void *prog_data, uint32_t prog_data_size,
1413 const struct anv_pipeline_bind_map *bind_map);
1416 anv_shader_bin_destroy(struct anv_device *device, struct anv_shader_bin *shader);
1419 anv_shader_bin_ref(struct anv_shader_bin *shader)
1421 assert(shader->ref_cnt >= 1);
1422 __sync_fetch_and_add(&shader->ref_cnt, 1);
1426 anv_shader_bin_unref(struct anv_device *device, struct anv_shader_bin *shader)
1428 assert(shader->ref_cnt >= 1);
1429 if (__sync_fetch_and_add(&shader->ref_cnt, -1) == 1)
1430 anv_shader_bin_destroy(device, shader);
1433 static inline const struct brw_stage_prog_data *
1434 anv_shader_bin_get_prog_data(const struct anv_shader_bin *shader)
1436 const void *data = shader;
1437 data += align_u32(sizeof(struct anv_shader_bin), 8);
1441 struct anv_pipeline {
1442 struct anv_device * device;
1443 struct anv_batch batch;
1444 uint32_t batch_data[512];
1445 struct anv_reloc_list batch_relocs;
1446 uint32_t dynamic_state_mask;
1447 struct anv_dynamic_state dynamic_state;
1449 struct anv_pipeline_layout * layout;
1451 bool needs_data_cache;
1453 struct anv_shader_bin * shaders[MESA_SHADER_STAGES];
1456 const struct gen_l3_config * l3_config;
1457 uint32_t total_size;
1460 VkShaderStageFlags active_stages;
1461 struct anv_state blend_state;
1469 uint32_t binding_stride[MAX_VBS];
1470 bool instancing_enable[MAX_VBS];
1471 bool primitive_restart;
1474 uint32_t cs_right_mask;
1476 bool depth_clamp_enable;
1480 uint32_t depth_stencil_state[3];
1486 uint32_t wm_depth_stencil[3];
1490 uint32_t wm_depth_stencil[4];
1495 anv_pipeline_has_stage(const struct anv_pipeline *pipeline,
1496 gl_shader_stage stage)
1498 return (pipeline->active_stages & mesa_to_vk_shader_stage(stage)) != 0;
1501 #define ANV_DECL_GET_PROG_DATA_FUNC(prefix, stage) \
1502 static inline const struct brw_##prefix##_prog_data * \
1503 get_##prefix##_prog_data(struct anv_pipeline *pipeline) \
1505 if (anv_pipeline_has_stage(pipeline, stage)) { \
1506 return (const struct brw_##prefix##_prog_data *) \
1507 anv_shader_bin_get_prog_data(pipeline->shaders[stage]); \
1513 ANV_DECL_GET_PROG_DATA_FUNC(vs, MESA_SHADER_VERTEX)
1514 ANV_DECL_GET_PROG_DATA_FUNC(gs, MESA_SHADER_GEOMETRY)
1515 ANV_DECL_GET_PROG_DATA_FUNC(wm, MESA_SHADER_FRAGMENT)
1516 ANV_DECL_GET_PROG_DATA_FUNC(cs, MESA_SHADER_COMPUTE)
1519 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1520 struct anv_pipeline_cache *cache,
1521 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1522 const VkAllocationCallbacks *alloc);
1525 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1526 struct anv_pipeline_cache *cache,
1527 const VkComputePipelineCreateInfo *info,
1528 struct anv_shader_module *module,
1529 const char *entrypoint,
1530 const VkSpecializationInfo *spec_info);
1533 enum isl_format isl_format:16;
1534 struct isl_swizzle swizzle;
1538 anv_get_format(const struct gen_device_info *devinfo, VkFormat format,
1539 VkImageAspectFlags aspect, VkImageTiling tiling);
1541 static inline enum isl_format
1542 anv_get_isl_format(const struct gen_device_info *devinfo, VkFormat vk_format,
1543 VkImageAspectFlags aspect, VkImageTiling tiling)
1545 return anv_get_format(devinfo, vk_format, aspect, tiling).isl_format;
1549 anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm);
1552 * Subsurface of an anv_image.
1554 struct anv_surface {
1555 /** Valid only if isl_surf::size > 0. */
1556 struct isl_surf isl;
1559 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1566 /* The original VkFormat provided by the client. This may not match any
1567 * of the actual surface formats.
1570 VkImageAspectFlags aspects;
1573 uint32_t array_size;
1574 uint32_t samples; /**< VkImageCreateInfo::samples */
1575 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1576 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1581 /* Set when bound */
1583 VkDeviceSize offset;
1588 * For each foo, anv_image::foo_surface is valid if and only if
1589 * anv_image::aspects has a foo aspect.
1591 * The hardware requires that the depth buffer and stencil buffer be
1592 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1593 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1594 * allocate the depth and stencil buffers as separate surfaces in the same
1598 struct anv_surface color_surface;
1601 struct anv_surface depth_surface;
1602 struct anv_surface hiz_surface;
1603 struct anv_surface stencil_surface;
1608 static inline uint32_t
1609 anv_get_layerCount(const struct anv_image *image,
1610 const VkImageSubresourceRange *range)
1612 return range->layerCount == VK_REMAINING_ARRAY_LAYERS ?
1613 image->array_size - range->baseArrayLayer : range->layerCount;
1616 static inline uint32_t
1617 anv_get_levelCount(const struct anv_image *image,
1618 const VkImageSubresourceRange *range)
1620 return range->levelCount == VK_REMAINING_MIP_LEVELS ?
1621 image->levels - range->baseMipLevel : range->levelCount;
1625 struct anv_image_view {
1626 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1628 uint32_t offset; /**< Offset into bo. */
1630 struct isl_view isl;
1632 VkImageAspectFlags aspect_mask;
1634 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1636 /** RENDER_SURFACE_STATE when using image as a color render target. */
1637 struct anv_state color_rt_surface_state;
1639 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1640 struct anv_state sampler_surface_state;
1642 /** RENDER_SURFACE_STATE when using image as a storage image. */
1643 struct anv_state storage_surface_state;
1645 struct brw_image_param storage_image_param;
1648 struct anv_image_create_info {
1649 const VkImageCreateInfo *vk_info;
1651 /** An opt-in bitmask which filters an ISL-mapping of the Vulkan tiling. */
1652 isl_tiling_flags_t isl_tiling_flags;
1657 VkResult anv_image_create(VkDevice _device,
1658 const struct anv_image_create_info *info,
1659 const VkAllocationCallbacks* alloc,
1662 const struct anv_surface *
1663 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
1664 VkImageAspectFlags aspect_mask);
1667 anv_image_has_hiz(const struct anv_image *image)
1669 /* We must check the aspect because anv_image::hiz_surface belongs to
1672 return (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
1673 image->hiz_surface.isl.size > 0;
1676 struct anv_buffer_view {
1677 enum isl_format format; /**< VkBufferViewCreateInfo::format */
1679 uint32_t offset; /**< Offset into bo. */
1680 uint64_t range; /**< VkBufferViewCreateInfo::range */
1682 struct anv_state surface_state;
1683 struct anv_state storage_surface_state;
1685 struct brw_image_param storage_image_param;
1689 anv_isl_format_for_descriptor_type(VkDescriptorType type);
1691 static inline struct VkExtent3D
1692 anv_sanitize_image_extent(const VkImageType imageType,
1693 const struct VkExtent3D imageExtent)
1695 switch (imageType) {
1696 case VK_IMAGE_TYPE_1D:
1697 return (VkExtent3D) { imageExtent.width, 1, 1 };
1698 case VK_IMAGE_TYPE_2D:
1699 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1700 case VK_IMAGE_TYPE_3D:
1703 unreachable("invalid image type");
1707 static inline struct VkOffset3D
1708 anv_sanitize_image_offset(const VkImageType imageType,
1709 const struct VkOffset3D imageOffset)
1711 switch (imageType) {
1712 case VK_IMAGE_TYPE_1D:
1713 return (VkOffset3D) { imageOffset.x, 0, 0 };
1714 case VK_IMAGE_TYPE_2D:
1715 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1716 case VK_IMAGE_TYPE_3D:
1719 unreachable("invalid image type");
1724 void anv_fill_buffer_surface_state(struct anv_device *device,
1725 struct anv_state state,
1726 enum isl_format format,
1727 uint32_t offset, uint32_t range,
1730 void anv_image_view_fill_image_param(struct anv_device *device,
1731 struct anv_image_view *view,
1732 struct brw_image_param *param);
1733 void anv_buffer_view_fill_image_param(struct anv_device *device,
1734 struct anv_buffer_view *view,
1735 struct brw_image_param *param);
1737 struct anv_sampler {
1741 struct anv_framebuffer {
1746 uint32_t attachment_count;
1747 struct anv_image_view * attachments[0];
1750 struct anv_subpass {
1751 uint32_t input_count;
1752 uint32_t * input_attachments;
1753 uint32_t color_count;
1754 uint32_t * color_attachments;
1755 uint32_t * resolve_attachments;
1756 uint32_t depth_stencil_attachment;
1758 /** Subpass has at least one resolve attachment */
1762 struct anv_render_pass_attachment {
1765 VkAttachmentLoadOp load_op;
1766 VkAttachmentStoreOp store_op;
1767 VkAttachmentLoadOp stencil_load_op;
1770 struct anv_render_pass {
1771 uint32_t attachment_count;
1772 uint32_t subpass_count;
1773 uint32_t * subpass_attachments;
1774 struct anv_render_pass_attachment * attachments;
1775 struct anv_subpass subpasses[0];
1778 struct anv_query_pool_slot {
1784 struct anv_query_pool {
1790 void *anv_lookup_entrypoint(const struct gen_device_info *devinfo,
1793 void anv_dump_image_to_ppm(struct anv_device *device,
1794 struct anv_image *image, unsigned miplevel,
1795 unsigned array_layer, VkImageAspectFlagBits aspect,
1796 const char *filename);
1798 enum anv_dump_action {
1799 ANV_DUMP_FRAMEBUFFERS_BIT = 0x1,
1802 void anv_dump_start(struct anv_device *device, enum anv_dump_action actions);
1803 void anv_dump_finish(void);
1805 void anv_dump_add_framebuffer(struct anv_cmd_buffer *cmd_buffer,
1806 struct anv_framebuffer *fb);
1808 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1810 static inline struct __anv_type * \
1811 __anv_type ## _from_handle(__VkType _handle) \
1813 return (struct __anv_type *) _handle; \
1816 static inline __VkType \
1817 __anv_type ## _to_handle(struct __anv_type *_obj) \
1819 return (__VkType) _obj; \
1822 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1824 static inline struct __anv_type * \
1825 __anv_type ## _from_handle(__VkType _handle) \
1827 return (struct __anv_type *)(uintptr_t) _handle; \
1830 static inline __VkType \
1831 __anv_type ## _to_handle(struct __anv_type *_obj) \
1833 return (__VkType)(uintptr_t) _obj; \
1836 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1837 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1839 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1840 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1841 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1842 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1843 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1845 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1846 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1847 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
1848 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool, VkDescriptorPool)
1849 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1850 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1851 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1852 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1853 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
1854 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1855 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1856 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1857 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
1858 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1859 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1860 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1861 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1862 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1863 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1865 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1867 static inline const __VkType * \
1868 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1870 return (const __VkType *) __anv_obj; \
1873 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1874 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1876 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1877 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1878 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1880 /* Gen-specific function declarations */
1882 # include "anv_genX.h"
1884 # define genX(x) gen7_##x
1885 # include "anv_genX.h"
1887 # define genX(x) gen75_##x
1888 # include "anv_genX.h"
1890 # define genX(x) gen8_##x
1891 # include "anv_genX.h"
1893 # define genX(x) gen9_##x
1894 # include "anv_genX.h"
1902 #endif /* ANV_PRIVATE_H */