src/intel_batchbuffer_dump.h

   1 #ifndef _INTEL_BATCHBUFFER_DUMP_H_
   2 #define _INTEL_BATCHBUFFER_DUMP_H_
   3
   4 #define MASK_CMD_TYPE           0xE0000000
   5
   6 #define SHIFT_CMD_TYPE          29
   7
   8 #define CMD_TYPE_GFXPIPE        3
   9 #define CMD_TYPE_BLT            2
  10 #define CMD_TYPE_MI             0
  11
  12
  13 /* GFXPIPE */
  14 #define MASK_GFXPIPE_SUBTYPE    0x18000000
  15 #define MASK_GFXPIPE_OPCODE     0x07000000
  16 #define MASK_GFXPIPE_SUBOPCODE  0x00FF0000
  17 #define MASK_GFXPIPE_LENGTH     0x0000FFFF
  18
  19 #define SHIFT_GFXPIPE_SUBTYPE           27
  20 #define SHIFT_GFXPIPE_OPCODE            24
  21 #define SHIFT_GFXPIPE_SUBOPCODE         16
  22 #define SHIFT_GFXPIPE_LENGTH            0
  23
  24 /* 3D */
  25 #define GFXPIPE_3D              3
  26
  27 /* BSD */
  28 #define GFXPIPE_BSD             2
  29
  30 #define OPCODE_BSD_AVC          4
  31
  32 #define SUBOPCODE_BSD_IMG       0
  33 #define SUBOPCODE_BSD_QM        1
  34 #define SUBOPCODE_BSD_SLICE     2
  35 #define SUBOPCODE_BSD_BUF_BASE  3
  36 #define SUBOPCODE_BSD_IND_OBJ   4
  37 #define SUBOPCODE_BSD_OBJECT    8
  38
  39 /* MFX */
  40 #define OPCODE_MFX_COMMON       0
  41 #define OPCODE_MFX_AVC          1
  42
  43 #define SUBOPCODE_MFX(A, B)     ((A) << 5 | (B))
  44
  45 /* MI */
  46 #define MASK_MI_OPCODE          0x1F800000
  47
  48 #define SHIFT_MI_OPCODE         23
  49
  50 #define OPCODE_MI_FLUSH                 0x04
  51 #define OPCODE_MI_BATCH_BUFFER_END      0x0A
  52
  53 #ifdef I965_DEBUG
  54
  55 int intel_batchbuffer_dump(unsigned int *data, unsigned int offset, int count, unsigned int device);
  56
  57 #endif
  58
  59 #endif /* _INTEL_BATCHBUFFER_DUMP_H_ */