1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33 #include "main/fbobject.h"
35 #include "main/state.h"
37 #include "tnl/t_context.h"
39 #include "drivers/common/driverfuncs.h"
41 #include "intel_fbo.h"
42 #include "intel_screen.h"
43 #include "intel_batchbuffer.h"
44 #include "intel_buffers.h"
46 #include "i915_context.h"
49 #define FILE_DEBUG_FLAG DEBUG_STATE
52 i915_update_stencil(struct gl_context * ctx)
54 struct i915_context *i915 = I915_CONTEXT(ctx);
55 GLuint front_ref, front_writemask, front_mask;
56 GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
57 GLuint back_ref, back_writemask, back_mask;
58 GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
61 /* The 915 considers CW to be "front" for two-sided stencil, so choose
64 /* _NEW_POLYGON | _NEW_STENCIL */
65 if (ctx->Polygon.FrontFace == GL_CW) {
66 front_ref = ctx->Stencil.Ref[0];
67 front_mask = ctx->Stencil.ValueMask[0];
68 front_writemask = ctx->Stencil.WriteMask[0];
69 front_func = ctx->Stencil.Function[0];
70 front_fail = ctx->Stencil.FailFunc[0];
71 front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
72 front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
73 back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
74 back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
75 back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
76 back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
77 back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
78 back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
79 back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
81 front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
82 front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
83 front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
84 front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
85 front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
86 front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
87 front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
88 back_ref = ctx->Stencil.Ref[0];
89 back_mask = ctx->Stencil.ValueMask[0];
90 back_writemask = ctx->Stencil.WriteMask[0];
91 back_func = ctx->Stencil.Function[0];
92 back_fail = ctx->Stencil.FailFunc[0];
93 back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
94 back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
96 #define set_ctx_bits(reg, mask, set) do{ \
97 GLuint dw = i915->state.Ctx[reg]; \
100 dirty |= dw != i915->state.Ctx[reg]; \
101 i915->state.Ctx[reg] = dw; \
104 /* Set front state. */
105 set_ctx_bits(I915_CTXREG_STATE4,
106 MODE4_ENABLE_STENCIL_TEST_MASK |
107 MODE4_ENABLE_STENCIL_WRITE_MASK,
108 ENABLE_STENCIL_TEST_MASK |
109 ENABLE_STENCIL_WRITE_MASK |
110 STENCIL_TEST_MASK(front_mask) |
111 STENCIL_WRITE_MASK(front_writemask));
113 set_ctx_bits(I915_CTXREG_LIS5,
114 S5_STENCIL_REF_MASK |
115 S5_STENCIL_TEST_FUNC_MASK |
116 S5_STENCIL_FAIL_MASK |
117 S5_STENCIL_PASS_Z_FAIL_MASK |
118 S5_STENCIL_PASS_Z_PASS_MASK,
119 (front_ref << S5_STENCIL_REF_SHIFT) |
120 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
121 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
122 (intel_translate_stencil_op(front_pass_z_fail) <<
123 S5_STENCIL_PASS_Z_FAIL_SHIFT) |
124 (intel_translate_stencil_op(front_pass_z_pass) <<
125 S5_STENCIL_PASS_Z_PASS_SHIFT));
127 /* Set back state if different from front. */
128 if (ctx->Stencil._TestTwoSide) {
129 set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
130 BFO_STENCIL_REF_MASK |
131 BFO_STENCIL_TEST_MASK |
132 BFO_STENCIL_FAIL_MASK |
133 BFO_STENCIL_PASS_Z_FAIL_MASK |
134 BFO_STENCIL_PASS_Z_PASS_MASK,
135 BFO_STENCIL_TWO_SIDE |
136 (back_ref << BFO_STENCIL_REF_SHIFT) |
137 (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
138 (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
139 (intel_translate_stencil_op(back_pass_z_fail) <<
140 BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
141 (intel_translate_stencil_op(back_pass_z_pass) <<
142 BFO_STENCIL_PASS_Z_PASS_SHIFT));
144 set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
145 BFM_STENCIL_TEST_MASK_MASK |
146 BFM_STENCIL_WRITE_MASK_MASK,
147 BFM_STENCIL_TEST_MASK(back_mask) |
148 BFM_STENCIL_WRITE_MASK(back_writemask));
150 set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
151 BFO_STENCIL_TWO_SIDE, 0);
157 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
161 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
167 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
172 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
178 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
180 struct i915_context *i915 = I915_CONTEXT(ctx);
181 int test = intel_translate_compare_func(func);
185 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
187 dw = i915->state.Ctx[I915_CTXREG_LIS6];
188 dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
189 dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
190 (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
191 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
192 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
193 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
197 /* This function makes sure that the proper enables are
198 * set for LogicOp, Independant Alpha Blend, and Blending.
199 * It needs to be called from numerous places where we
200 * could change the LogicOp or Independant Alpha Blend without subsequent
204 i915EvalLogicOpBlendState(struct gl_context * ctx)
206 struct i915_context *i915 = I915_CONTEXT(ctx);
209 dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
210 dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
212 if (ctx->Color.ColorLogicOpEnabled) {
213 dw0 |= S5_LOGICOP_ENABLE;
214 dw1 &= ~S6_CBUF_BLEND_ENABLE;
217 dw0 &= ~S5_LOGICOP_ENABLE;
219 if (ctx->Color.BlendEnabled) {
220 dw1 |= S6_CBUF_BLEND_ENABLE;
223 dw1 &= ~S6_CBUF_BLEND_ENABLE;
226 if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
227 dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
228 i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
229 i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
231 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
236 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
238 struct i915_context *i915 = I915_CONTEXT(ctx);
242 DBG("%s\n", __FUNCTION__);
244 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
245 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
246 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
247 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
249 dw = (a << 24) | (r << 16) | (g << 8) | b;
250 if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
251 i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
252 I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
257 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
258 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
259 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
260 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
265 translate_blend_equation(GLenum mode)
269 return BLENDFUNC_ADD;
271 return BLENDFUNC_MIN;
273 return BLENDFUNC_MAX;
274 case GL_FUNC_SUBTRACT:
275 return BLENDFUNC_SUBTRACT;
276 case GL_FUNC_REVERSE_SUBTRACT:
277 return BLENDFUNC_REVERSE_SUBTRACT;
284 i915UpdateBlendState(struct gl_context * ctx)
286 struct i915_context *i915 = I915_CONTEXT(ctx);
287 GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
288 ~(IAB_SRC_FACTOR_MASK |
289 IAB_DST_FACTOR_MASK |
290 (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
292 GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
293 ~(S6_CBUF_SRC_BLEND_FACT_MASK |
294 S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
296 GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
297 GLuint eqA = ctx->Color.Blend[0].EquationA;
298 GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
299 GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
300 GLuint srcA = ctx->Color.Blend[0].SrcA;
301 GLuint dstA = ctx->Color.Blend[0].DstA;
303 if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
304 srcRGB = dstRGB = GL_ONE;
307 if (eqA == GL_MIN || eqA == GL_MAX) {
308 srcA = dstA = GL_ONE;
311 lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
312 lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
313 lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
315 iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
316 iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
317 iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
319 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
322 if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
323 i915->state.Blend[I915_BLENDREG_IAB] = iab;
324 I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
326 if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
327 i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
328 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
331 /* This will catch a logicop blend equation */
332 i915EvalLogicOpBlendState(ctx);
337 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
338 GLenum dstRGB, GLenum srcA, GLenum dstA)
340 i915UpdateBlendState(ctx);
345 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
347 i915UpdateBlendState(ctx);
352 i915DepthFunc(struct gl_context * ctx, GLenum func)
354 struct i915_context *i915 = I915_CONTEXT(ctx);
355 int test = intel_translate_compare_func(func);
358 DBG("%s\n", __FUNCTION__);
360 dw = i915->state.Ctx[I915_CTXREG_LIS6];
361 dw &= ~S6_DEPTH_TEST_FUNC_MASK;
362 dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
363 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
364 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
365 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
370 i915DepthMask(struct gl_context * ctx, GLboolean flag)
372 struct i915_context *i915 = I915_CONTEXT(ctx);
375 DBG("%s flag (%d)\n", __FUNCTION__, flag);
377 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
380 dw = i915->state.Ctx[I915_CTXREG_LIS6];
381 if (flag && ctx->Depth.Test)
382 dw |= S6_DEPTH_WRITE_ENABLE;
384 dw &= ~S6_DEPTH_WRITE_ENABLE;
385 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
386 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
387 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
394 * Update the viewport transformation matrix. Depends on:
395 * - viewport pos/size
397 * - window pos/size or FBO size
400 intelCalcViewport(struct gl_context * ctx)
402 struct intel_context *intel = intel_context(ctx);
404 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
405 _math_matrix_viewport(&intel->ViewportMatrix,
407 ctx->DrawBuffer->Height - ctx->Viewport.Y,
409 -ctx->Viewport.Height,
414 _math_matrix_viewport(&intel->ViewportMatrix,
418 ctx->Viewport.Height,
426 /** Called from ctx->Driver.Viewport() */
428 i915Viewport(struct gl_context * ctx,
429 GLint x, GLint y, GLsizei width, GLsizei height)
431 intelCalcViewport(ctx);
435 /** Called from ctx->Driver.DepthRange() */
437 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
439 intelCalcViewport(ctx);
443 /* =============================================================
446 * The i915 supports a 4x4 stipple natively, GL wants 32x32.
447 * Fortunately stipple is usually a repeating pattern.
450 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
452 struct i915_context *i915 = I915_CONTEXT(ctx);
456 int active = (ctx->Polygon.StippleFlag &&
457 i915->intel.reduced_primitive == GL_TRIANGLES);
461 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
462 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
465 /* Use the already unpacked stipple data from the context rather than the
466 * uninterpreted mask passed in.
468 mask = (const GLubyte *)ctx->PolygonStipple;
471 p[0] = mask[12] & 0xf;
473 p[1] = mask[8] & 0xf;
475 p[2] = mask[4] & 0xf;
477 p[3] = mask[0] & 0xf;
480 for (k = 0; k < 8; k++)
481 for (j = 3; j >= 0; j--)
482 for (i = 0; i < 4; i++, m++)
484 i915->intel.hw_stipple = 0;
488 newMask = (((p[0] & 0xf) << 0) |
489 ((p[1] & 0xf) << 4) |
490 ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
493 if (newMask == 0xffff || newMask == 0x0) {
494 /* this is needed to make conform pass */
495 i915->intel.hw_stipple = 0;
499 i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
500 i915->state.Stipple[I915_STPREG_ST1] |= newMask;
501 i915->intel.hw_stipple = 1;
504 i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
508 /* =============================================================
512 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
514 struct i915_context *i915 = I915_CONTEXT(ctx);
517 if (!ctx->DrawBuffer)
520 DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
522 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
524 y1 = ctx->DrawBuffer->Height - (y + h);
527 DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
530 /* FBO - not inverted
536 DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
539 x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
540 y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
541 x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
542 y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
544 DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
546 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
547 i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
548 i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
552 i915LogicOp(struct gl_context * ctx, GLenum opcode)
554 struct i915_context *i915 = I915_CONTEXT(ctx);
555 int tmp = intel_translate_logic_op(opcode);
557 DBG("%s\n", __FUNCTION__);
559 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
560 i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
561 i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
567 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
569 struct i915_context *i915 = I915_CONTEXT(ctx);
572 DBG("%s %d\n", __FUNCTION__,
573 ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
575 if (!ctx->Polygon.CullFlag) {
576 mode = S4_CULLMODE_NONE;
578 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
579 mode = S4_CULLMODE_CW;
581 if (ctx->DrawBuffer && _mesa_is_user_fbo(ctx->DrawBuffer))
582 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
583 if (ctx->Polygon.CullFaceMode == GL_FRONT)
584 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
585 if (ctx->Polygon.FrontFace != GL_CCW)
586 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
589 mode = S4_CULLMODE_BOTH;
592 dw = i915->state.Ctx[I915_CTXREG_LIS4];
593 dw &= ~S4_CULLMODE_MASK;
595 if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
596 i915->state.Ctx[I915_CTXREG_LIS4] = dw;
597 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
602 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
604 struct i915_context *i915 = I915_CONTEXT(ctx);
605 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
608 DBG("%s\n", __FUNCTION__);
610 width = (int) (widthf * 2);
611 width = CLAMP(width, 1, 0xf);
612 lis4 |= width << S4_LINE_WIDTH_SHIFT;
614 if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
615 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
616 i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
621 i915PointSize(struct gl_context * ctx, GLfloat size)
623 struct i915_context *i915 = I915_CONTEXT(ctx);
624 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
625 GLint point_size = (int) round(size);
627 DBG("%s\n", __FUNCTION__);
629 point_size = CLAMP(point_size, 1, 255);
630 lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
632 if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
633 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
634 i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
640 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
642 struct i915_context *i915 = I915_CONTEXT(ctx);
645 case GL_POINT_SPRITE_COORD_ORIGIN:
646 /* This could be supported, but it would require modifying the fragment
647 * program to invert the y component of the texture coordinate by
648 * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
650 FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
651 (params[0] != GL_UPPER_LEFT));
657 i915_update_sprite_point_enable(struct gl_context *ctx)
659 struct intel_context *intel = intel_context(ctx);
661 struct i915_fragment_program *p =
662 (struct i915_fragment_program *) ctx->FragmentProgram._Current;
663 const GLbitfield64 inputsRead = p->FragProg.Base.InputsRead;
664 struct i915_context *i915 = i915_context(ctx);
665 GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
667 GLuint coord_replace_bits = 0x0;
668 GLuint tex_coord_unit_bits = 0x0;
670 for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
672 if (ctx->Point.CoordReplace[i] && ctx->Point.PointSprite)
673 coord_replace_bits |= (1 << i);
674 if (inputsRead & VARYING_BIT_TEX(i))
675 tex_coord_unit_bits |= (1 << i);
679 * Here we can't enable the SPRITE_POINT_ENABLE bit when the mis-match
680 * of tex_coord_unit_bits and coord_replace_bits, or this will make all
681 * the other non-point-sprite coords(like varying inputs, as we now use
682 * tex coord to implement varying inputs) be replaced to value (0, 0)-(1, 1).
684 * Thus, do fallback when needed.
686 FALLBACK(intel, I915_FALLBACK_COORD_REPLACE,
687 coord_replace_bits && coord_replace_bits != tex_coord_unit_bits);
689 s4 &= ~S4_SPRITE_POINT_ENABLE;
690 s4 |= (coord_replace_bits && coord_replace_bits == tex_coord_unit_bits) ?
691 S4_SPRITE_POINT_ENABLE : 0;
692 if (s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
693 i915->state.Ctx[I915_CTXREG_LIS4] = s4;
694 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
699 /* =============================================================
704 i915ColorMask(struct gl_context * ctx,
705 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
707 struct i915_context *i915 = I915_CONTEXT(ctx);
708 GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
710 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
714 tmp |= S5_WRITEDISABLE_RED;
716 tmp |= S5_WRITEDISABLE_GREEN;
718 tmp |= S5_WRITEDISABLE_BLUE;
720 tmp |= S5_WRITEDISABLE_ALPHA;
722 if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
723 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
724 i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
729 update_specular(struct gl_context * ctx)
731 /* A hack to trigger the rebuild of the fragment program.
733 intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
737 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
739 DBG("%s\n", __FUNCTION__);
741 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
742 update_specular(ctx);
747 i915ShadeModel(struct gl_context * ctx, GLenum mode)
749 struct i915_context *i915 = I915_CONTEXT(ctx);
750 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
752 if (mode == GL_SMOOTH) {
753 i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
755 S4_FLATSHADE_SPECULAR);
758 i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
760 S4_FLATSHADE_SPECULAR);
764 /* =============================================================
767 * This empty function remains because _mesa_init_driver_state calls
768 * dd_function_table::Fogfv unconditionally. We have to have some function
769 * there so that it doesn't try to call a NULL pointer.
772 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
779 /* =============================================================
783 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
785 struct i915_context *i915 = I915_CONTEXT(ctx);
790 case GL_TEXTURE_EXTERNAL_OES:
795 update_specular(ctx);
799 dw = i915->state.Ctx[I915_CTXREG_LIS6];
801 dw |= S6_ALPHA_TEST_ENABLE;
803 dw &= ~S6_ALPHA_TEST_ENABLE;
804 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
805 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
806 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
811 i915EvalLogicOpBlendState(ctx);
814 case GL_COLOR_LOGIC_OP:
815 i915EvalLogicOpBlendState(ctx);
817 /* Logicop doesn't seem to work at 16bpp:
819 if (ctx->Visual.rgbBits == 16)
820 FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
823 case GL_FRAGMENT_PROGRAM_ARB:
827 dw = i915->state.Ctx[I915_CTXREG_LIS5];
829 dw |= S5_COLOR_DITHER_ENABLE;
831 dw &= ~S5_COLOR_DITHER_ENABLE;
832 if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
833 i915->state.Ctx[I915_CTXREG_LIS5] = dw;
834 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
839 dw = i915->state.Ctx[I915_CTXREG_LIS6];
841 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
845 dw |= S6_DEPTH_TEST_ENABLE;
847 dw &= ~S6_DEPTH_TEST_ENABLE;
848 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
849 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
850 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
853 i915DepthMask(ctx, ctx->Depth.Mask);
856 case GL_SCISSOR_TEST:
857 I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
859 i915->state.Buffer[I915_DESTREG_SENABLE] =
860 (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
862 i915->state.Buffer[I915_DESTREG_SENABLE] =
863 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
867 dw = i915->state.Ctx[I915_CTXREG_LIS4];
869 dw |= S4_LINE_ANTIALIAS_ENABLE;
871 dw &= ~S4_LINE_ANTIALIAS_ENABLE;
872 if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
873 i915->state.Ctx[I915_CTXREG_LIS4] = dw;
874 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
879 i915CullFaceFrontFace(ctx, 0);
882 case GL_STENCIL_TEST:
883 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.stencilBits)
886 dw = i915->state.Ctx[I915_CTXREG_LIS5];
888 dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
890 dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
891 if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
892 i915->state.Ctx[I915_CTXREG_LIS5] = dw;
893 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
897 case GL_POLYGON_STIPPLE:
898 /* The stipple command worked on my 855GM box, but not my 845G.
899 * I'll do more testing later to find out exactly which hardware
900 * supports it. Disabled for now.
902 if (i915->intel.hw_stipple &&
903 i915->intel.reduced_primitive == GL_TRIANGLES) {
904 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
906 i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
908 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
912 case GL_POLYGON_SMOOTH:
915 case GL_POINT_SPRITE:
916 /* Handle it at i915_update_sprite_point_enable () */
919 case GL_POINT_SMOOTH:
929 i915_init_packets(struct i915_context *i915)
932 memset(&i915->state, 0, sizeof(i915->state));
936 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
937 I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
938 /* Probably don't want to upload all this stuff every time one
941 i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
944 I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
945 i915->state.Ctx[I915_CTXREG_LIS2] = 0;
946 i915->state.Ctx[I915_CTXREG_LIS4] = 0;
947 i915->state.Ctx[I915_CTXREG_LIS5] = 0;
949 if (i915->intel.ctx.Visual.rgbBits == 16)
950 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
953 i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
954 (2 << S6_TRISTRIP_PV_SHIFT));
956 i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
957 ENABLE_LOGIC_OP_FUNC |
958 LOGIC_OP_FUNC(LOGICOP_COPY) |
959 ENABLE_STENCIL_TEST_MASK |
960 STENCIL_TEST_MASK(0xff) |
961 ENABLE_STENCIL_WRITE_MASK |
962 STENCIL_WRITE_MASK(0xff));
964 i915->state.Blend[I915_BLENDREG_IAB] =
965 (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
966 IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
968 i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
969 _3DSTATE_CONST_BLEND_COLOR_CMD;
970 i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
972 i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
973 _3DSTATE_BACKFACE_STENCIL_MASKS |
974 BFM_ENABLE_STENCIL_TEST_MASK |
975 BFM_ENABLE_STENCIL_WRITE_MASK |
976 (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
977 (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
978 i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
979 _3DSTATE_BACKFACE_STENCIL_OPS |
980 BFO_ENABLE_STENCIL_REF |
981 BFO_ENABLE_STENCIL_FUNCS |
982 BFO_ENABLE_STENCIL_TWO_SIDE;
986 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
987 i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
991 i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
994 i915->state.Buffer[I915_DESTREG_SENABLE] =
995 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
996 i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
997 i915->state.Buffer[I915_DESTREG_SR1] = 0;
998 i915->state.Buffer[I915_DESTREG_SR2] = 0;
1001 i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
1002 ENABLE_POINT_RASTER_RULE |
1003 OGL_POINT_RASTER_RULE |
1004 ENABLE_LINE_STRIP_PROVOKE_VRTX |
1005 ENABLE_TRI_FAN_PROVOKE_VRTX |
1006 LINE_STRIP_PROVOKE_VRTX(1) |
1007 TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
1011 I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
1012 i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
1013 i915->state.Default[I915_DEFREG_C1] = 0;
1014 i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
1015 i915->state.Default[I915_DEFREG_S1] = 0;
1016 i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1017 i915->state.Default[I915_DEFREG_Z1] = 0;
1022 /* These will be emitted every at the head of every buffer, unless
1023 * we get hardware contexts working.
1025 i915->state.active = (I915_UPLOAD_PROGRAM |
1026 I915_UPLOAD_STIPPLE |
1029 I915_UPLOAD_BUFFERS |
1030 I915_UPLOAD_INVARIENT |
1031 I915_UPLOAD_RASTER_RULES);
1035 i915_update_provoking_vertex(struct gl_context * ctx)
1037 struct i915_context *i915 = I915_CONTEXT(ctx);
1039 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1040 i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1042 I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1043 i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1044 TRI_FAN_PROVOKE_VRTX_MASK);
1047 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1048 i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1049 TRI_FAN_PROVOKE_VRTX(2));
1050 i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1052 i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1053 TRI_FAN_PROVOKE_VRTX(1));
1054 i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1058 /* Fallback to swrast for select and feedback.
1061 i915RenderMode(struct gl_context *ctx, GLenum mode)
1063 struct intel_context *intel = intel_context(ctx);
1064 FALLBACK(intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER));
1068 i915InitStateFunctions(struct dd_function_table *functions)
1070 functions->AlphaFunc = i915AlphaFunc;
1071 functions->BlendColor = i915BlendColor;
1072 functions->BlendEquationSeparate = i915BlendEquationSeparate;
1073 functions->BlendFuncSeparate = i915BlendFuncSeparate;
1074 functions->ColorMask = i915ColorMask;
1075 functions->CullFace = i915CullFaceFrontFace;
1076 functions->DepthFunc = i915DepthFunc;
1077 functions->DepthMask = i915DepthMask;
1078 functions->Enable = i915Enable;
1079 functions->Fogfv = i915Fogfv;
1080 functions->FrontFace = i915CullFaceFrontFace;
1081 functions->LightModelfv = i915LightModelfv;
1082 functions->LineWidth = i915LineWidth;
1083 functions->LogicOpcode = i915LogicOp;
1084 functions->PointSize = i915PointSize;
1085 functions->PointParameterfv = i915PointParameterfv;
1086 functions->PolygonStipple = i915PolygonStipple;
1087 functions->RenderMode = i915RenderMode;
1088 functions->Scissor = i915Scissor;
1089 functions->ShadeModel = i915ShadeModel;
1090 functions->StencilFuncSeparate = i915StencilFuncSeparate;
1091 functions->StencilMaskSeparate = i915StencilMaskSeparate;
1092 functions->StencilOpSeparate = i915StencilOpSeparate;
1093 functions->DepthRange = i915DepthRange;
1094 functions->Viewport = i915Viewport;
1099 i915InitState(struct i915_context *i915)
1101 struct gl_context *ctx = &i915->intel.ctx;
1103 i915_init_packets(i915);
1105 _mesa_init_driver_state(ctx);