src/mesa/drivers/dri/i915/i915_vtbl.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29
  30 #include "glheader.h"
  31 #include "mtypes.h"
  32 #include "imports.h"
  33 #include "macros.h"
  34 #include "colormac.h"
  35
  36 #include "tnl/t_context.h"
  37 #include "tnl/t_vertex.h"
  38
  39 #include "intel_batchbuffer.h"
  40
  41 #include "i915_reg.h"
  42 #include "i915_context.h"
  43
  44 static void i915_render_start( intelContextPtr intel )
  45 {
  46    GLcontext *ctx = &intel->ctx;
  47    i915ContextPtr i915 = I915_CONTEXT(intel);
  48
  49    if (ctx->FragmentProgram._Active)
  50       i915ValidateFragmentProgram( i915 );
  51    else
  52       i915ValidateTextureProgram( i915 );
  53 }
  54
  55
  56 static void i915_reduced_primitive_state( intelContextPtr intel,
  57                                           GLenum rprim )
  58 {
  59     i915ContextPtr i915 = I915_CONTEXT(intel);
  60     GLuint st1 = i915->state.Stipple[I915_STPREG_ST1];
  61
  62     st1 &= ~ST1_ENABLE;
  63
  64     switch (rprim) {
  65     case GL_TRIANGLES:
  66        if (intel->ctx.Polygon.StippleFlag &&
  67            intel->hw_stipple)
  68           st1 |= ST1_ENABLE;
  69        break;
  70     case GL_LINES:
  71     case GL_POINTS:
  72     default:
  73        break;
  74     }
  75
  76     i915->intel.reduced_primitive = rprim;
  77
  78     if (st1 != i915->state.Stipple[I915_STPREG_ST1]) {
  79        I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
  80        i915->state.Stipple[I915_STPREG_ST1] = st1;
  81     }
  82 }
  83
  84
  85 /* Pull apart the vertex format registers and figure out how large a
  86  * vertex is supposed to be.
  87  */
  88 static GLboolean i915_check_vertex_size( intelContextPtr intel,
  89                                          GLuint expected )
  90 {
  91    i915ContextPtr i915 = I915_CONTEXT(intel);
  92    int lis2 = i915->current->Ctx[I915_CTXREG_LIS2];
  93    int lis4 = i915->current->Ctx[I915_CTXREG_LIS4];
  94    int i, sz = 0;
  95
  96    switch (lis4 & S4_VFMT_XYZW_MASK) {
  97    case S4_VFMT_XY: sz = 2; break;
  98    case S4_VFMT_XYZ: sz = 3; break;
  99    case S4_VFMT_XYW: sz = 3; break;
 100    case S4_VFMT_XYZW: sz = 4; break;
 101    default:
 102       fprintf(stderr, "no xyzw specified\n");
 103       return 0;
 104    }
 105
 106    if (lis4 & S4_VFMT_SPEC_FOG) sz++;
 107    if (lis4 & S4_VFMT_COLOR) sz++;
 108    if (lis4 & S4_VFMT_DEPTH_OFFSET) sz++;
 109    if (lis4 & S4_VFMT_POINT_WIDTH) sz++;
 110    if (lis4 & S4_VFMT_FOG_PARAM) sz++;
 111
 112    for (i = 0 ; i < 8 ; i++) {
 113       switch (lis2 & S2_TEXCOORD_FMT0_MASK) {
 114       case TEXCOORDFMT_2D: sz += 2; break;
 115       case TEXCOORDFMT_3D: sz += 3; break;
 116       case TEXCOORDFMT_4D: sz += 4; break;
 117       case TEXCOORDFMT_1D: sz += 1; break;
 118       case TEXCOORDFMT_2D_16: sz += 1; break;
 119       case TEXCOORDFMT_4D_16: sz += 2; break;
 120       case TEXCOORDFMT_NOT_PRESENT: break;
 121       default:
 122          fprintf(stderr, "bad texcoord fmt %d\n", i);
 123          return GL_FALSE;
 124       }
 125       lis2 >>= S2_TEXCOORD_FMT1_SHIFT;
 126    }
 127
 128    if (sz != expected)
 129       fprintf(stderr, "vertex size mismatch %d/%d\n", sz, expected);
 130
 131    return sz == expected;
 132 }
 133
 134
 135 static void i915_emit_invarient_state( intelContextPtr intel )
 136 {
 137    BATCH_LOCALS;
 138
 139    BEGIN_BATCH( 20 );
 140
 141    OUT_BATCH(_3DSTATE_AA_CMD |
 142              AA_LINE_ECAAR_WIDTH_ENABLE |
 143              AA_LINE_ECAAR_WIDTH_1_0 |
 144              AA_LINE_REGION_WIDTH_ENABLE |
 145              AA_LINE_REGION_WIDTH_1_0);
 146
 147    OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
 148    OUT_BATCH(0);
 149
 150    OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
 151    OUT_BATCH(0);
 152
 153    OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
 154    OUT_BATCH(0);
 155
 156    /* Don't support texture crossbar yet */
 157    OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
 158              CSB_TCB(0, 0) |
 159              CSB_TCB(1, 1) |
 160              CSB_TCB(2, 2) |
 161              CSB_TCB(3, 3) |
 162              CSB_TCB(4, 4) |
 163              CSB_TCB(5, 5) |
 164              CSB_TCB(6, 6) |
 165              CSB_TCB(7, 7));
 166
 167    OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
 168              ENABLE_POINT_RASTER_RULE |
 169              OGL_POINT_RASTER_RULE |
 170              ENABLE_LINE_STRIP_PROVOKE_VRTX |
 171              ENABLE_TRI_FAN_PROVOKE_VRTX |
 172              LINE_STRIP_PROVOKE_VRTX(1) |
 173              TRI_FAN_PROVOKE_VRTX(2) |
 174              ENABLE_TEXKILL_3D_4D |
 175              TEXKILL_4D);
 176
 177    /* Need to initialize this to zero.
 178     */
 179    OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 180              I1_LOAD_S(3) |
 181              (1));
 182    OUT_BATCH(0);
 183
 184    /* XXX: Use this */
 185    OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD |
 186              DISABLE_SCISSOR_RECT);
 187
 188    OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
 189    OUT_BATCH(0);
 190    OUT_BATCH(0);
 191
 192    OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
 193
 194    OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
 195    OUT_BATCH(0);
 196
 197
 198    /* Don't support twosided stencil yet */
 199    OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS |
 200              BFO_ENABLE_STENCIL_TWO_SIDE |
 201              0 );
 202
 203    ADVANCE_BATCH();
 204 }
 205
 206
 207 #define emit( intel, state, size )                      \
 208 do {                                                    \
 209    int k;                                               \
 210    BEGIN_BATCH( (size) / sizeof(GLuint));               \
 211    for (k = 0 ; k < (size) / sizeof(GLuint) ; k++)      \
 212       OUT_BATCH((state)[k]);                            \
 213    ADVANCE_BATCH();                                     \
 214 } while (0);
 215
 216 static GLuint get_dirty( struct i915_hw_state *state )
 217 {
 218    GLuint dirty;
 219
 220    /* Workaround the multitex hang - if one texture unit state is
 221     * modified, emit all texture units.
 222     */
 223    dirty = state->active & ~state->emitted;
 224    if (dirty & I915_UPLOAD_TEX_ALL)
 225       state->emitted &= ~I915_UPLOAD_TEX_ALL;
 226    dirty = state->active & ~state->emitted;
 227
 228    return dirty;
 229 }
 230
 231
 232 static GLuint get_state_size( struct i915_hw_state *state )
 233 {
 234    GLuint dirty = get_dirty(state);
 235    GLuint i;
 236    GLuint sz = 0;
 237
 238    if (dirty & I915_UPLOAD_INVARIENT)
 239       sz += 20 * sizeof(int);
 240
 241    if (dirty & I915_UPLOAD_CTX)
 242       sz += sizeof(state->Ctx);
 243
 244    if (dirty & I915_UPLOAD_BUFFERS)
 245       sz += sizeof(state->Buffer);
 246
 247    if (dirty & I915_UPLOAD_STIPPLE)
 248       sz += sizeof(state->Stipple);
 249
 250    if (dirty & I915_UPLOAD_FOG)
 251       sz += sizeof(state->Fog);
 252
 253    if (dirty & I915_UPLOAD_TEX_ALL) {
 254       int nr = 0;
 255       for (i = 0; i < I915_TEX_UNITS; i++)
 256          if (dirty & I915_UPLOAD_TEX(i))
 257             nr++;
 258
 259       sz += (2+nr*3) * sizeof(GLuint) * 2;
 260    }
 261
 262    if (dirty & I915_UPLOAD_CONSTANTS)
 263       sz += state->ConstantSize * sizeof(GLuint);
 264
 265    if (dirty & I915_UPLOAD_PROGRAM)
 266       sz += state->ProgramSize * sizeof(GLuint);
 267
 268    return sz;
 269 }
 270
 271
 272 /* Push the state into the sarea and/or texture memory.
 273  */
 274 static void i915_emit_state( intelContextPtr intel )
 275 {
 276    i915ContextPtr i915 = I915_CONTEXT(intel);
 277    struct i915_hw_state *state = i915->current;
 278    int i;
 279    GLuint dirty = get_dirty(state);
 280    GLuint counter = intel->batch.counter;
 281    BATCH_LOCALS;
 282
 283    if (intel->batch.space < get_state_size(state)) {
 284       intelFlushBatch(intel, GL_TRUE);
 285       dirty = get_dirty(state);
 286       counter = intel->batch.counter;
 287    }
 288
 289    if (VERBOSE)
 290       fprintf(stderr, "%s dirty: %x\n", __FUNCTION__, dirty);
 291
 292    if (dirty & I915_UPLOAD_INVARIENT) {
 293       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_INVARIENT:\n");
 294       i915_emit_invarient_state( intel );
 295    }
 296
 297    if (dirty & I915_UPLOAD_CTX) {
 298       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_CTX:\n");
 299       emit( i915, state->Ctx, sizeof(state->Ctx) );
 300    }
 301
 302    if (dirty & I915_UPLOAD_BUFFERS) {
 303       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_BUFFERS:\n");
 304       emit( i915, state->Buffer, sizeof(state->Buffer) );
 305    }
 306
 307    if (dirty & I915_UPLOAD_STIPPLE) {
 308       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_STIPPLE:\n");
 309       emit( i915, state->Stipple, sizeof(state->Stipple) );
 310    }
 311
 312    if (dirty & I915_UPLOAD_FOG) {
 313       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_FOG:\n");
 314       emit( i915, state->Fog, sizeof(state->Fog) );
 315    }
 316
 317    /* Combine all the dirty texture state into a single command to
 318     * avoid lockups on I915 hardware.
 319     */
 320    if (dirty & I915_UPLOAD_TEX_ALL) {
 321       int nr = 0;
 322
 323       for (i = 0; i < I915_TEX_UNITS; i++)
 324          if (dirty & I915_UPLOAD_TEX(i))
 325             nr++;
 326
 327       BEGIN_BATCH(2+nr*3);
 328       OUT_BATCH(_3DSTATE_MAP_STATE | (3*nr));
 329       OUT_BATCH((dirty & I915_UPLOAD_TEX_ALL) >> I915_UPLOAD_TEX_0_SHIFT);
 330       for (i = 0 ; i < I915_TEX_UNITS ; i++)
 331          if (dirty & I915_UPLOAD_TEX(i)) {
 332             OUT_BATCH(state->Tex[i][I915_TEXREG_MS2]);
 333             OUT_BATCH(state->Tex[i][I915_TEXREG_MS3]);
 334             OUT_BATCH(state->Tex[i][I915_TEXREG_MS4]);
 335          }
 336       ADVANCE_BATCH();
 337
 338       BEGIN_BATCH(2+nr*3);
 339       OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3*nr));
 340       OUT_BATCH((dirty & I915_UPLOAD_TEX_ALL) >> I915_UPLOAD_TEX_0_SHIFT);
 341       for (i = 0 ; i < I915_TEX_UNITS ; i++)
 342          if (dirty & I915_UPLOAD_TEX(i)) {
 343             OUT_BATCH(state->Tex[i][I915_TEXREG_SS2]);
 344             OUT_BATCH(state->Tex[i][I915_TEXREG_SS3]);
 345             OUT_BATCH(state->Tex[i][I915_TEXREG_SS4]);
 346          }
 347       ADVANCE_BATCH();
 348    }
 349
 350    if (dirty & I915_UPLOAD_CONSTANTS) {
 351       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_CONSTANTS:\n");
 352       emit( i915, state->Constant, state->ConstantSize * sizeof(GLuint) );
 353    }
 354
 355    if (dirty & I915_UPLOAD_PROGRAM) {
 356       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_PROGRAM:\n");
 357
 358       assert((state->Program[0] & 0x1ff)+2 == state->ProgramSize);
 359
 360       emit( i915, state->Program, state->ProgramSize * sizeof(GLuint) );
 361       if (VERBOSE)
 362          i915_disassemble_program( state->Program, state->ProgramSize );
 363    }
 364
 365    state->emitted |= dirty;
 366    intel->batch.last_emit_state = counter;
 367    assert(counter == intel->batch.counter);
 368 }
 369
 370 static void i915_destroy_context( intelContextPtr intel )
 371 {
 372    _tnl_free_vertices(&intel->ctx);
 373 }
 374
 375
 376 /**
 377  * Set the color buffer drawing region.
 378  */
 379 static void
 380 i915_set_color_region( intelContextPtr intel, const intelRegion *region)
 381 {
 382    i915ContextPtr i915 = I915_CONTEXT(intel);
 383    I915_STATECHANGE( i915, I915_UPLOAD_BUFFERS );
 384    i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
 385       (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
 386    i915->state.Buffer[I915_DESTREG_CBUFADDR2] = region->offset;
 387 }
 388
 389
 390 /**
 391  * specify the z-buffer/stencil region
 392  */
 393 static void
 394 i915_set_z_region( intelContextPtr intel, const intelRegion *region)
 395 {
 396    i915ContextPtr i915 = I915_CONTEXT(intel);
 397    I915_STATECHANGE( i915, I915_UPLOAD_BUFFERS );
 398    i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
 399       (BUF_3D_ID_DEPTH | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
 400    i915->state.Buffer[I915_DESTREG_DBUFADDR2] = region->offset;
 401 }
 402
 403
 404 /**
 405  * Set both the color and Z/stencil drawing regions.
 406  * Similar to two previous functions, but don't use I915_STATECHANGE()
 407  */
 408 static void
 409 i915_update_color_z_regions(intelContextPtr intel,
 410                             const intelRegion *colorRegion,
 411                             const intelRegion *depthRegion)
 412 {
 413    i915ContextPtr i915 = I915_CONTEXT(intel);
 414
 415    i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
 416       (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(colorRegion->pitch) | BUF_3D_USE_FENCE);
 417    i915->state.Buffer[I915_DESTREG_CBUFADDR2] = colorRegion->offset;
 418
 419    i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
 420       (BUF_3D_ID_DEPTH |
 421        BUF_3D_PITCH(depthRegion->pitch) |  /* pitch in bytes */
 422        BUF_3D_USE_FENCE);
 423    i915->state.Buffer[I915_DESTREG_DBUFADDR2] = depthRegion->offset;
 424 }
 425
 426
 427 static void i915_lost_hardware( intelContextPtr intel )
 428 {
 429    I915_CONTEXT(intel)->state.emitted = 0;
 430 }
 431
 432 static void i915_emit_flush( intelContextPtr intel )
 433 {
 434    BATCH_LOCALS;
 435
 436    BEGIN_BATCH(2);
 437    OUT_BATCH( MI_FLUSH | FLUSH_MAP_CACHE | FLUSH_RENDER_CACHE );
 438    OUT_BATCH( 0 );
 439    ADVANCE_BATCH();
 440 }
 441
 442
 443 void i915InitVtbl( i915ContextPtr i915 )
 444 {
 445    i915->intel.vtbl.alloc_tex_obj = i915AllocTexObj;
 446    i915->intel.vtbl.check_vertex_size = i915_check_vertex_size;
 447    i915->intel.vtbl.clear_with_tris = i915ClearWithTris;
 448    i915->intel.vtbl.rotate_window = i915RotateWindow;
 449    i915->intel.vtbl.destroy = i915_destroy_context;
 450    i915->intel.vtbl.emit_state = i915_emit_state;
 451    i915->intel.vtbl.lost_hardware = i915_lost_hardware;
 452    i915->intel.vtbl.reduced_primitive_state = i915_reduced_primitive_state;
 453    i915->intel.vtbl.render_start = i915_render_start;
 454    i915->intel.vtbl.set_color_region = i915_set_color_region;
 455    i915->intel.vtbl.set_z_region = i915_set_z_region;
 456    i915->intel.vtbl.update_color_z_regions = i915_update_color_z_regions;
 457    i915->intel.vtbl.update_texture_state = i915UpdateTextureState;
 458    i915->intel.vtbl.emit_flush = i915_emit_flush;
 459 }
 460