1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/state.h"
33 #include "main/api_validate.h"
34 #include "main/enums.h"
37 #include "brw_defines.h"
38 #include "brw_context.h"
39 #include "brw_state.h"
40 #include "brw_fallback.h"
42 #include "intel_batchbuffer.h"
43 #include "intel_buffer_objects.h"
44 #include "intel_tex.h"
46 static GLuint double_types[5] = {
48 BRW_SURFACEFORMAT_R64_FLOAT,
49 BRW_SURFACEFORMAT_R64G64_FLOAT,
50 BRW_SURFACEFORMAT_R64G64B64_FLOAT,
51 BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
54 static GLuint float_types[5] = {
56 BRW_SURFACEFORMAT_R32_FLOAT,
57 BRW_SURFACEFORMAT_R32G32_FLOAT,
58 BRW_SURFACEFORMAT_R32G32B32_FLOAT,
59 BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
62 static GLuint uint_types_norm[5] = {
64 BRW_SURFACEFORMAT_R32_UNORM,
65 BRW_SURFACEFORMAT_R32G32_UNORM,
66 BRW_SURFACEFORMAT_R32G32B32_UNORM,
67 BRW_SURFACEFORMAT_R32G32B32A32_UNORM
70 static GLuint uint_types_scale[5] = {
72 BRW_SURFACEFORMAT_R32_USCALED,
73 BRW_SURFACEFORMAT_R32G32_USCALED,
74 BRW_SURFACEFORMAT_R32G32B32_USCALED,
75 BRW_SURFACEFORMAT_R32G32B32A32_USCALED
78 static GLuint int_types_norm[5] = {
80 BRW_SURFACEFORMAT_R32_SNORM,
81 BRW_SURFACEFORMAT_R32G32_SNORM,
82 BRW_SURFACEFORMAT_R32G32B32_SNORM,
83 BRW_SURFACEFORMAT_R32G32B32A32_SNORM
86 static GLuint int_types_scale[5] = {
88 BRW_SURFACEFORMAT_R32_SSCALED,
89 BRW_SURFACEFORMAT_R32G32_SSCALED,
90 BRW_SURFACEFORMAT_R32G32B32_SSCALED,
91 BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
94 static GLuint ushort_types_norm[5] = {
96 BRW_SURFACEFORMAT_R16_UNORM,
97 BRW_SURFACEFORMAT_R16G16_UNORM,
98 BRW_SURFACEFORMAT_R16G16B16_UNORM,
99 BRW_SURFACEFORMAT_R16G16B16A16_UNORM
102 static GLuint ushort_types_scale[5] = {
104 BRW_SURFACEFORMAT_R16_USCALED,
105 BRW_SURFACEFORMAT_R16G16_USCALED,
106 BRW_SURFACEFORMAT_R16G16B16_USCALED,
107 BRW_SURFACEFORMAT_R16G16B16A16_USCALED
110 static GLuint short_types_norm[5] = {
112 BRW_SURFACEFORMAT_R16_SNORM,
113 BRW_SURFACEFORMAT_R16G16_SNORM,
114 BRW_SURFACEFORMAT_R16G16B16_SNORM,
115 BRW_SURFACEFORMAT_R16G16B16A16_SNORM
118 static GLuint short_types_scale[5] = {
120 BRW_SURFACEFORMAT_R16_SSCALED,
121 BRW_SURFACEFORMAT_R16G16_SSCALED,
122 BRW_SURFACEFORMAT_R16G16B16_SSCALED,
123 BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
126 static GLuint ubyte_types_norm[5] = {
128 BRW_SURFACEFORMAT_R8_UNORM,
129 BRW_SURFACEFORMAT_R8G8_UNORM,
130 BRW_SURFACEFORMAT_R8G8B8_UNORM,
131 BRW_SURFACEFORMAT_R8G8B8A8_UNORM
134 static GLuint ubyte_types_scale[5] = {
136 BRW_SURFACEFORMAT_R8_USCALED,
137 BRW_SURFACEFORMAT_R8G8_USCALED,
138 BRW_SURFACEFORMAT_R8G8B8_USCALED,
139 BRW_SURFACEFORMAT_R8G8B8A8_USCALED
142 static GLuint byte_types_norm[5] = {
144 BRW_SURFACEFORMAT_R8_SNORM,
145 BRW_SURFACEFORMAT_R8G8_SNORM,
146 BRW_SURFACEFORMAT_R8G8B8_SNORM,
147 BRW_SURFACEFORMAT_R8G8B8A8_SNORM
150 static GLuint byte_types_scale[5] = {
152 BRW_SURFACEFORMAT_R8_SSCALED,
153 BRW_SURFACEFORMAT_R8G8_SSCALED,
154 BRW_SURFACEFORMAT_R8G8B8_SSCALED,
155 BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
160 * Given vertex array type/size/format/normalized info, return
161 * the appopriate hardware surface type.
162 * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays.
164 static GLuint get_surface_type( GLenum type, GLuint size,
165 GLenum format, GLboolean normalized )
167 if (INTEL_DEBUG & DEBUG_VERTS)
168 _mesa_printf("type %s size %d normalized %d\n",
169 _mesa_lookup_enum_by_nr(type), size, normalized);
173 case GL_DOUBLE: return double_types[size];
174 case GL_FLOAT: return float_types[size];
175 case GL_INT: return int_types_norm[size];
176 case GL_SHORT: return short_types_norm[size];
177 case GL_BYTE: return byte_types_norm[size];
178 case GL_UNSIGNED_INT: return uint_types_norm[size];
179 case GL_UNSIGNED_SHORT: return ushort_types_norm[size];
180 case GL_UNSIGNED_BYTE:
181 if (format == GL_BGRA) {
182 /* See GL_EXT_vertex_array_bgra */
184 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
187 return ubyte_types_norm[size];
189 default: assert(0); return 0;
193 assert(format == GL_RGBA); /* sanity check */
195 case GL_DOUBLE: return double_types[size];
196 case GL_FLOAT: return float_types[size];
197 case GL_INT: return int_types_scale[size];
198 case GL_SHORT: return short_types_scale[size];
199 case GL_BYTE: return byte_types_scale[size];
200 case GL_UNSIGNED_INT: return uint_types_scale[size];
201 case GL_UNSIGNED_SHORT: return ushort_types_scale[size];
202 case GL_UNSIGNED_BYTE: return ubyte_types_scale[size];
203 default: assert(0); return 0;
209 static GLuint get_size( GLenum type )
212 case GL_DOUBLE: return sizeof(GLdouble);
213 case GL_FLOAT: return sizeof(GLfloat);
214 case GL_INT: return sizeof(GLint);
215 case GL_SHORT: return sizeof(GLshort);
216 case GL_BYTE: return sizeof(GLbyte);
217 case GL_UNSIGNED_INT: return sizeof(GLuint);
218 case GL_UNSIGNED_SHORT: return sizeof(GLushort);
219 case GL_UNSIGNED_BYTE: return sizeof(GLubyte);
224 static GLuint get_index_type(GLenum type)
227 case GL_UNSIGNED_BYTE: return BRW_INDEX_BYTE;
228 case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD;
229 case GL_UNSIGNED_INT: return BRW_INDEX_DWORD;
230 default: assert(0); return 0;
234 static void wrap_buffers( struct brw_context *brw,
237 if (size < BRW_UPLOAD_INIT_SIZE)
238 size = BRW_UPLOAD_INIT_SIZE;
240 brw->vb.upload.offset = 0;
242 if (brw->vb.upload.bo != NULL)
243 dri_bo_unreference(brw->vb.upload.bo);
244 brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
247 /* Set the internal VBO\ to no-backing-store. We only use them as a
248 * temporary within a brw_try_draw_prims while the lock is held.
250 /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
251 FAKE TO PUSH THIS STUFF */
252 // if (!brw->intel.ttm)
253 // dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
256 static void get_space( struct brw_context *brw,
259 GLuint *offset_return )
261 size = ALIGN(size, 64);
263 if (brw->vb.upload.bo == NULL ||
264 brw->vb.upload.offset + size > brw->vb.upload.bo->size) {
265 wrap_buffers(brw, size);
268 assert(*bo_return == NULL);
269 dri_bo_reference(brw->vb.upload.bo);
270 *bo_return = brw->vb.upload.bo;
271 *offset_return = brw->vb.upload.offset;
272 brw->vb.upload.offset += size;
276 copy_array_to_vbo_array( struct brw_context *brw,
277 struct brw_vertex_element *element,
280 struct intel_context *intel = &brw->intel;
281 GLuint size = element->count * dst_stride;
283 get_space(brw, size, &element->bo, &element->offset);
285 if (element->glarray->StrideB == 0) {
286 assert(element->count == 1);
289 element->stride = dst_stride;
292 if (dst_stride == element->glarray->StrideB) {
293 if (intel->intelScreen->kernel_exec_fencing) {
294 drm_intel_gem_bo_map_gtt(element->bo);
295 memcpy((char *)element->bo->virtual + element->offset,
296 element->glarray->Ptr, size);
297 drm_intel_gem_bo_unmap_gtt(element->bo);
299 dri_bo_subdata(element->bo,
302 element->glarray->Ptr);
306 const unsigned char *src = element->glarray->Ptr;
309 if (intel->intelScreen->kernel_exec_fencing) {
310 drm_intel_gem_bo_map_gtt(element->bo);
311 dest = element->bo->virtual;
312 dest += element->offset;
314 for (i = 0; i < element->count; i++) {
315 memcpy(dest, src, dst_stride);
316 src += element->glarray->StrideB;
320 drm_intel_gem_bo_unmap_gtt(element->bo);
324 data = _mesa_malloc(dst_stride * element->count);
326 for (i = 0; i < element->count; i++) {
327 memcpy(dest, src, dst_stride);
328 src += element->glarray->StrideB;
332 dri_bo_subdata(element->bo,
342 static void brw_prepare_vertices(struct brw_context *brw)
344 GLcontext *ctx = &brw->intel.ctx;
345 struct intel_context *intel = intel_context(ctx);
346 GLbitfield vs_inputs = brw->vs.prog_data->inputs_read;
348 const unsigned char *ptr = NULL;
349 GLuint interleave = 0;
350 unsigned int min_index = brw->vb.min_index;
351 unsigned int max_index = brw->vb.max_index;
353 struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
354 GLuint nr_uploads = 0;
356 /* First build an array of pointers to ve's in vb.inputs_read
359 _mesa_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
361 /* Accumulate the list of enabled arrays. */
362 brw->vb.nr_enabled = 0;
364 GLuint i = _mesa_ffsll(vs_inputs) - 1;
365 struct brw_vertex_element *input = &brw->vb.inputs[i];
367 vs_inputs &= ~(1 << i);
368 brw->vb.enabled[brw->vb.nr_enabled++] = input;
371 /* XXX: In the rare cases where this happens we fallback all
372 * the way to software rasterization, although a tnl fallback
373 * would be sufficient. I don't know of *any* real world
374 * cases with > 17 vertex attributes enabled, so it probably
375 * isn't an issue at this point.
377 if (brw->vb.nr_enabled >= BRW_VEP_MAX) {
382 for (i = 0; i < brw->vb.nr_enabled; i++) {
383 struct brw_vertex_element *input = brw->vb.enabled[i];
385 input->element_size = get_size(input->glarray->Type) * input->glarray->Size;
386 input->count = input->glarray->StrideB ? max_index + 1 - min_index : 1;
388 if (input->glarray->BufferObj->Name != 0) {
389 struct intel_buffer_object *intel_buffer =
390 intel_buffer_object(input->glarray->BufferObj);
392 /* Named buffer object: Just reference its contents directly. */
393 dri_bo_unreference(input->bo);
394 input->bo = intel_bufferobj_buffer(intel, intel_buffer,
396 dri_bo_reference(input->bo);
397 input->offset = (unsigned long)input->glarray->Ptr;
398 input->stride = input->glarray->StrideB;
400 if (input->bo != NULL) {
401 /* Already-uploaded vertex data is present from a previous
402 * prepare_vertices, but we had to re-validate state due to
403 * check_aperture failing and a new batch being produced.
408 /* Queue the buffer object up to be uploaded in the next pass,
409 * when we've decided if we're doing interleaved or not.
412 /* Position array not properly enabled:
414 if (input->glarray->StrideB == 0) {
419 interleave = input->glarray->StrideB;
420 ptr = input->glarray->Ptr;
422 else if (interleave != input->glarray->StrideB ||
423 (const unsigned char *)input->glarray->Ptr - ptr < 0 ||
424 (const unsigned char *)input->glarray->Ptr - ptr > interleave)
429 upload[nr_uploads++] = input;
431 /* We rebase drawing to start at element zero only when
432 * varyings are not in vbos, which means we can end up
433 * uploading non-varying arrays (stride != 0) when min_index
434 * is zero. This doesn't matter as the amount to upload is
435 * the same for these arrays whether the draw call is rebased
436 * or not - we just have to upload the one element.
438 assert(min_index == 0 || input->glarray->StrideB == 0);
442 /* Handle any arrays to be uploaded. */
443 if (nr_uploads > 1 && interleave && interleave <= 256) {
444 /* All uploads are interleaved, so upload the arrays together as
445 * interleaved. First, upload the contents and set up upload[0].
447 copy_array_to_vbo_array(brw, upload[0], interleave);
449 for (i = 1; i < nr_uploads; i++) {
450 /* Then, just point upload[i] at upload[0]'s buffer. */
451 upload[i]->stride = interleave;
452 upload[i]->offset = upload[0]->offset +
453 ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
454 upload[i]->bo = upload[0]->bo;
455 dri_bo_reference(upload[i]->bo);
459 /* Upload non-interleaved arrays */
460 for (i = 0; i < nr_uploads; i++) {
461 copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
465 brw_prepare_query_begin(brw);
467 for (i = 0; i < brw->vb.nr_enabled; i++) {
468 struct brw_vertex_element *input = brw->vb.enabled[i];
470 brw_add_validated_bo(brw, input->bo);
474 static void brw_emit_vertices(struct brw_context *brw)
476 GLcontext *ctx = &brw->intel.ctx;
477 struct intel_context *intel = intel_context(ctx);
480 brw_emit_query_begin(brw);
482 /* Now emit VB and VEP state packets.
484 * This still defines a hardware VB for each input, even if they
485 * are interleaved or from the same VBO. TBD if this makes a
486 * performance difference.
488 BEGIN_BATCH(1 + brw->vb.nr_enabled * 4, IGNORE_CLIPRECTS);
489 OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
490 ((1 + brw->vb.nr_enabled * 4) - 2));
492 for (i = 0; i < brw->vb.nr_enabled; i++) {
493 struct brw_vertex_element *input = brw->vb.enabled[i];
495 OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
496 BRW_VB0_ACCESS_VERTEXDATA |
497 (input->stride << BRW_VB0_PITCH_SHIFT));
499 I915_GEM_DOMAIN_VERTEX, 0,
501 OUT_BATCH(brw->vb.max_index);
502 OUT_BATCH(0); /* Instance data step rate */
506 BEGIN_BATCH(1 + brw->vb.nr_enabled * 2, IGNORE_CLIPRECTS);
507 OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + brw->vb.nr_enabled * 2) - 2));
508 for (i = 0; i < brw->vb.nr_enabled; i++) {
509 struct brw_vertex_element *input = brw->vb.enabled[i];
510 uint32_t format = get_surface_type(input->glarray->Type,
511 input->glarray->Size,
512 input->glarray->Format,
513 input->glarray->Normalized);
514 uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
515 uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
516 uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
517 uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
519 switch (input->glarray->Size) {
520 case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
521 case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
522 case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
523 case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
527 OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
529 (format << BRW_VE0_FORMAT_SHIFT) |
530 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
531 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
532 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
533 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
534 (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
535 ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
540 const struct brw_tracked_state brw_vertices = {
543 .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
546 .prepare = brw_prepare_vertices,
547 .emit = brw_emit_vertices,
550 static void brw_prepare_indices(struct brw_context *brw)
552 GLcontext *ctx = &brw->intel.ctx;
553 struct intel_context *intel = &brw->intel;
554 const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
557 struct gl_buffer_object *bufferobj;
560 if (index_buffer == NULL)
563 ib_size = get_size(index_buffer->type) * index_buffer->count;
564 bufferobj = index_buffer->obj;;
566 /* Turn into a proper VBO:
568 if (!bufferobj->Name) {
570 /* Get new bufferobj, offset:
572 get_space(brw, ib_size, &bo, &offset);
576 if (intel->intelScreen->kernel_exec_fencing) {
577 drm_intel_gem_bo_map_gtt(bo);
578 memcpy((char *)bo->virtual + offset, index_buffer->ptr, ib_size);
579 drm_intel_gem_bo_unmap_gtt(bo);
581 dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr);
584 offset = (GLuint) (unsigned long) index_buffer->ptr;
586 /* If the index buffer isn't aligned to its element size, we have to
587 * rebase it into a temporary.
589 if ((get_size(index_buffer->type) - 1) & offset) {
590 GLubyte *map = ctx->Driver.MapBuffer(ctx,
591 GL_ELEMENT_ARRAY_BUFFER_ARB,
596 get_space(brw, ib_size, &bo, &offset);
598 dri_bo_subdata(bo, offset, ib_size, map);
600 ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
602 bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj),
604 dri_bo_reference(bo);
608 dri_bo_unreference(brw->ib.bo);
610 brw->ib.offset = offset;
612 brw_add_validated_bo(brw, brw->ib.bo);
615 static void brw_emit_indices(struct brw_context *brw)
617 struct intel_context *intel = &brw->intel;
618 const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
621 if (index_buffer == NULL)
624 ib_size = get_size(index_buffer->type) * index_buffer->count - 1;
626 /* Emit the indexbuffer packet:
629 struct brw_indexbuffer ib;
631 memset(&ib, 0, sizeof(ib));
633 ib.header.bits.opcode = CMD_INDEX_BUFFER;
634 ib.header.bits.length = sizeof(ib)/4 - 2;
635 ib.header.bits.index_format = get_index_type(index_buffer->type);
636 ib.header.bits.cut_index_enable = 0;
639 BEGIN_BATCH(4, IGNORE_CLIPRECTS);
640 OUT_BATCH( ib.header.dword );
641 OUT_RELOC(brw->ib.bo,
642 I915_GEM_DOMAIN_VERTEX, 0,
644 OUT_RELOC(brw->ib.bo,
645 I915_GEM_DOMAIN_VERTEX, 0,
646 brw->ib.offset + ib_size);
652 const struct brw_tracked_state brw_indices = {
655 .brw = BRW_NEW_BATCH | BRW_NEW_INDICES,
658 .prepare = brw_prepare_indices,
659 .emit = brw_emit_indices,