2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
36 #include <sys/types.h>
38 #include "main/macros.h"
39 #include "main/shaderobj.h"
40 #include "main/uniforms.h"
41 #include "program/prog_parameter.h"
42 #include "program/prog_print.h"
43 #include "program/prog_optimize.h"
44 #include "util/register_allocate.h"
45 #include "program/hash_table.h"
46 #include "brw_context.h"
49 #include "intel_asm_annotation.h"
51 #include "glsl/glsl_types.h"
53 #include "glsl/nir/nir.h"
54 #include "program/sampler.h"
62 class fs_live_variables;
66 offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
75 return byte_offset(reg,
76 delta * reg.component_size(bld.dispatch_width()));
78 reg.reg_offset += delta;
87 * The fragment shader front-end.
89 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
91 class fs_visitor : public backend_shader
94 fs_visitor(const struct brw_compiler *compiler, void *log_data,
97 struct brw_stage_prog_data *prog_data,
98 struct gl_program *prog,
100 unsigned dispatch_width,
101 int shader_time_index);
105 fs_reg vgrf(const glsl_type *const type);
106 void import_uniforms(fs_visitor *v);
107 void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
108 void compute_clip_distance(gl_clip_plane *clip_planes);
110 uint32_t gather_channel(int orig_chan, uint32_t sampler);
111 void swizzle_result(ir_texture_opcode op, int dest_components,
112 fs_reg orig_val, uint32_t sampler);
114 fs_inst *get_instruction_generating_reg(fs_inst *start,
118 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
120 const fs_reg &surf_index,
121 const fs_reg &varying_offset,
122 uint32_t const_offset);
123 void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
125 bool run_fs(bool do_rep_send);
126 bool run_vs(gl_clip_plane *clip_planes);
129 void allocate_registers();
130 void setup_payload_gen4();
131 void setup_payload_gen6();
132 void setup_vs_payload();
133 void setup_cs_payload();
134 void fixup_3src_null_dest();
135 void assign_curb_setup();
136 void calculate_urb_setup();
137 void assign_urb_setup();
138 void assign_vs_urb_setup();
139 bool assign_regs(bool allow_spilling);
140 void assign_regs_trivial();
141 void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
142 int first_payload_node);
143 int choose_spill_reg(struct ra_graph *g);
144 void spill_reg(int spill_reg);
145 void split_virtual_grfs();
146 bool compact_virtual_grfs();
147 void assign_constant_locations();
148 void demote_pull_constants();
149 void invalidate_live_intervals();
150 void calculate_live_intervals();
151 void calculate_register_pressure();
153 bool opt_algebraic();
154 bool opt_redundant_discard_jumps();
156 bool opt_cse_local(bblock_t *block);
157 bool opt_copy_propagate();
158 bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
159 bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
160 bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
162 bool opt_register_renaming();
163 bool register_coalesce();
164 bool compute_to_mrf();
165 bool eliminate_find_live_channel();
166 bool dead_code_eliminate();
167 bool remove_duplicate_mrf_writes();
169 bool opt_sampler_eot();
170 bool virtual_grf_interferes(int a, int b);
171 void schedule_instructions(instruction_scheduler_mode mode);
172 void insert_gen4_send_dependency_workarounds();
173 void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
175 void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
177 void vfail(const char *msg, va_list args);
178 void fail(const char *msg, ...);
179 void no16(const char *msg);
180 void lower_uniform_pull_constant_loads();
181 bool lower_load_payload();
182 bool lower_logical_sends();
183 bool lower_integer_multiplication();
184 bool lower_simd_width();
185 bool opt_combine_constants();
187 void emit_dummy_fs();
188 void emit_repclear_shader();
189 fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
190 bool origin_upper_left);
191 fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
192 glsl_interp_qualifier interpolation_mode,
193 bool is_centroid, bool is_sample);
194 fs_reg *emit_frontfacing_interpolation();
195 fs_reg *emit_samplepos_setup();
196 fs_reg *emit_sampleid_setup();
197 void emit_general_interpolation(fs_reg attr, const char *name,
198 const glsl_type *type,
199 glsl_interp_qualifier interpolation_mode,
200 int location, bool mod_centroid,
202 fs_reg *emit_vs_system_value(int location);
203 void emit_interpolation_setup_gen4();
204 void emit_interpolation_setup_gen6();
205 void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
206 fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
207 bool is_rect, uint32_t sampler);
208 void emit_texture(ir_texture_opcode op,
209 const glsl_type *dest_type,
210 fs_reg coordinate, int components,
212 fs_reg lod, fs_reg dpdy, int grad_components,
216 int gather_component,
221 fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
222 const fs_reg &sampler);
223 void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
224 fs_reg resolve_source_modifiers(const fs_reg &src);
225 void emit_discard_jump();
226 bool opt_peephole_sel();
227 bool opt_peephole_predicated_break();
228 bool opt_saturate_propagation();
229 bool opt_cmod_propagation();
230 bool opt_zero_samples();
231 void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
232 uint32_t spill_offset, int count);
233 void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
234 uint32_t spill_offset, int count);
236 void emit_nir_code();
237 void nir_setup_inputs();
238 void nir_setup_outputs();
239 void nir_setup_uniforms();
240 void nir_emit_system_values();
241 void nir_emit_impl(nir_function_impl *impl);
242 void nir_emit_cf_list(exec_list *list);
243 void nir_emit_if(nir_if *if_stmt);
244 void nir_emit_loop(nir_loop *loop);
245 void nir_emit_block(nir_block *block);
246 void nir_emit_instr(nir_instr *instr);
247 void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
248 void nir_emit_load_const(const brw::fs_builder &bld,
249 nir_load_const_instr *instr);
250 void nir_emit_undef(const brw::fs_builder &bld,
251 nir_ssa_undef_instr *instr);
252 void nir_emit_intrinsic(const brw::fs_builder &bld,
253 nir_intrinsic_instr *instr);
254 void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
255 int op, nir_intrinsic_instr *instr);
256 void nir_emit_texture(const brw::fs_builder &bld,
257 nir_tex_instr *instr);
258 void nir_emit_jump(const brw::fs_builder &bld,
259 nir_jump_instr *instr);
260 fs_reg get_nir_src(nir_src src);
261 fs_reg get_nir_dest(nir_dest dest);
262 fs_reg get_nir_image_deref(const nir_deref_var *deref);
263 void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
266 bool optimize_frontfacing_ternary(nir_alu_instr *instr,
267 const fs_reg &result);
269 void emit_alpha_test();
270 fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
271 fs_reg color1, fs_reg color2,
272 fs_reg src0_alpha, unsigned components);
273 void emit_fb_writes();
274 void emit_urb_writes();
275 void emit_cs_terminate();
276 fs_reg *emit_cs_local_invocation_id_setup();
277 fs_reg *emit_cs_work_group_id_setup();
281 void emit_shader_time_begin();
282 void emit_shader_time_end();
283 void SHADER_TIME_ADD(const brw::fs_builder &bld,
284 int shader_time_subindex,
287 fs_reg get_timestamp(const brw::fs_builder &bld);
289 struct brw_reg interp_reg(int location, int channel);
291 int implied_mrf_writes(fs_inst *inst);
293 virtual void dump_instructions();
294 virtual void dump_instructions(const char *name);
295 void dump_instruction(backend_instruction *inst);
296 void dump_instruction(backend_instruction *inst, FILE *file);
298 const void *const key;
299 const struct brw_sampler_prog_key_data *key_tex;
301 struct brw_stage_prog_data *prog_data;
302 struct gl_program *prog;
306 int *virtual_grf_start;
307 int *virtual_grf_end;
308 brw::fs_live_variables *live_intervals;
310 int *regs_live_at_ip;
312 /** Number of uniform variable components visited. */
315 /** Byte-offset for the next available spot in the scratch space buffer. */
316 unsigned last_scratch;
319 * Array mapping UNIFORM register numbers to the pull parameter index,
320 * or -1 if this uniform register isn't being uploaded as a pull constant.
322 int *pull_constant_loc;
325 * Array mapping UNIFORM register numbers to the push parameter index,
326 * or -1 if this uniform register isn't being uploaded as a push constant.
328 int *push_constant_loc;
332 fs_reg outputs[VARYING_SLOT_MAX];
333 unsigned output_components[VARYING_SLOT_MAX];
334 fs_reg dual_src_output;
336 int first_non_payload_grf;
337 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
341 fs_reg *nir_ssa_values;
344 fs_reg *nir_system_values;
348 bool simd16_unsupported;
351 /* Result of last visit() method. Still used by emit_texture() */
354 /** Register numbers for thread payload fields. */
355 struct thread_payload {
356 uint8_t source_depth_reg;
357 uint8_t source_w_reg;
358 uint8_t aa_dest_stencil_reg;
359 uint8_t dest_depth_reg;
360 uint8_t sample_pos_reg;
361 uint8_t sample_mask_in_reg;
362 uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
363 uint8_t local_invocation_id_reg;
365 /** The number of thread payload registers the hardware will supply. */
369 bool source_depth_to_render_target;
370 bool runtime_check_aads_emit;
376 fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
377 fs_reg shader_start_time;
378 fs_reg userplane[MAX_CLIP_PLANES];
381 bool spilled_any_registers;
383 const unsigned dispatch_width; /**< 8 or 16 */
385 int shader_time_index;
387 unsigned promoted_constants;
392 * The fragment shader code generator.
394 * Translates FS IR to actual i965 assembly code.
399 fs_generator(const struct brw_compiler *compiler, void *log_data,
402 struct brw_stage_prog_data *prog_data,
403 struct gl_program *fp,
404 unsigned promoted_constants,
405 bool runtime_check_aads_emit,
406 const char *stage_abbrev);
409 void enable_debug(const char *shader_name);
410 int generate_code(const cfg_t *cfg, int dispatch_width);
411 const unsigned *get_assembly(unsigned int *assembly_size);
414 void fire_fb_write(fs_inst *inst,
415 struct brw_reg payload,
416 struct brw_reg implied_header,
418 void generate_fb_write(fs_inst *inst, struct brw_reg payload);
419 void generate_urb_write(fs_inst *inst, struct brw_reg payload);
420 void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
421 void generate_barrier(fs_inst *inst, struct brw_reg src);
422 void generate_blorp_fb_write(fs_inst *inst);
423 void generate_linterp(fs_inst *inst, struct brw_reg dst,
424 struct brw_reg *src);
425 void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
426 struct brw_reg sampler_index);
427 void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
429 struct brw_reg surf_index);
430 void generate_math_gen6(fs_inst *inst,
433 struct brw_reg src1);
434 void generate_math_gen4(fs_inst *inst,
437 void generate_math_g45(fs_inst *inst,
440 void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
441 void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
443 void generate_scratch_write(fs_inst *inst, struct brw_reg src);
444 void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
445 void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
446 void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
447 struct brw_reg index,
448 struct brw_reg offset);
449 void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
451 struct brw_reg surf_index,
452 struct brw_reg offset);
453 void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
454 struct brw_reg index,
455 struct brw_reg offset);
456 void generate_varying_pull_constant_load_gen7(fs_inst *inst,
458 struct brw_reg index,
459 struct brw_reg offset);
460 void generate_mov_dispatch_to_flags(fs_inst *inst);
462 void generate_pixel_interpolator_query(fs_inst *inst,
465 struct brw_reg msg_data,
468 void generate_set_sample_id(fs_inst *inst,
471 struct brw_reg src1);
473 void generate_set_simd4x2_offset(fs_inst *inst,
475 struct brw_reg offset);
476 void generate_discard_jump(fs_inst *inst);
478 void generate_pack_half_2x16_split(fs_inst *inst,
482 void generate_unpack_half_2x16_split(fs_inst *inst,
486 void generate_shader_time_add(fs_inst *inst,
487 struct brw_reg payload,
488 struct brw_reg offset,
489 struct brw_reg value);
491 bool patch_discard_jumps_to_fb_writes();
493 const struct brw_compiler *compiler;
494 void *log_data; /* Passed to compiler->*_log functions */
496 const struct brw_device_info *devinfo;
498 struct brw_codegen *p;
499 const void * const key;
500 struct brw_stage_prog_data * const prog_data;
502 const struct gl_program *prog;
504 unsigned dispatch_width; /**< 8 or 16 */
506 exec_list discard_halt_patches;
507 unsigned promoted_constants;
508 bool runtime_check_aads_emit;
510 const char *shader_name;
511 const char *stage_abbrev;
515 bool brw_do_channel_expressions(struct exec_list *instructions);
516 bool brw_do_vector_splitting(struct exec_list *instructions);