2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "main/macros.h"
26 #include "brw_context.h"
30 #include "glsl/ir_optimization.h"
31 #include "glsl/ir_print_visitor.h"
34 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
36 struct brw_shader *shader;
38 shader = rzalloc(NULL, struct brw_shader);
40 shader->base.Type = type;
41 shader->base.Name = name;
42 _mesa_init_shader(ctx, &shader->base);
48 struct gl_shader_program *
49 brw_new_shader_program(struct gl_context *ctx, GLuint name)
51 struct gl_shader_program *prog = rzalloc(NULL, struct gl_shader_program);
54 _mesa_init_shader_program(ctx, prog);
60 * Performs a compile of the shader stages even when we don't know
61 * what non-orthogonal state will be set, in the hope that it reflects
62 * the eventual NOS used, and thus allows us to produce link failures.
65 brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
67 struct brw_context *brw = brw_context(ctx);
69 if (brw->precompile && !brw_fs_precompile(ctx, prog))
72 if (brw->precompile && !brw_vs_precompile(ctx, prog))
79 brw_lower_packing_builtins(struct brw_context *brw,
80 gl_shader_type shader_type,
83 int ops = LOWER_PACK_SNORM_2x16
84 | LOWER_UNPACK_SNORM_2x16
85 | LOWER_PACK_UNORM_2x16
86 | LOWER_UNPACK_UNORM_2x16
87 | LOWER_PACK_SNORM_4x8
88 | LOWER_UNPACK_SNORM_4x8
89 | LOWER_PACK_UNORM_4x8
90 | LOWER_UNPACK_UNORM_4x8;
92 if (brw->intel.gen >= 7) {
93 /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
94 * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
95 * lowering is needed. For SOA code, the Half2x16 ops must be
98 if (shader_type == MESA_SHADER_FRAGMENT) {
99 ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
100 | LOWER_UNPACK_HALF_2x16_TO_SPLIT;
103 ops |= LOWER_PACK_HALF_2x16
104 | LOWER_UNPACK_HALF_2x16;
107 lower_packing_builtins(ir, ops);
111 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
113 struct brw_context *brw = brw_context(ctx);
114 struct intel_context *intel = &brw->intel;
117 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
118 struct brw_shader *shader =
119 (struct brw_shader *)shProg->_LinkedShaders[stage];
120 static const GLenum targets[] = {
121 GL_VERTEX_PROGRAM_ARB,
122 GL_FRAGMENT_PROGRAM_ARB,
123 GL_GEOMETRY_PROGRAM_NV
129 struct gl_program *prog =
130 ctx->Driver.NewProgram(ctx, targets[stage], shader->base.Name);
133 prog->Parameters = _mesa_new_parameter_list();
136 struct gl_vertex_program *vp = (struct gl_vertex_program *) prog;
137 vp->UsesClipDistance = shProg->Vert.UsesClipDistance;
140 void *mem_ctx = ralloc_context(NULL);
144 ralloc_free(shader->ir);
145 shader->ir = new(shader) exec_list;
146 clone_ir_list(mem_ctx, shader->ir, shader->base.ir);
148 /* lower_packing_builtins() inserts arithmetic instructions, so it
149 * must precede lower_instructions().
151 brw_lower_packing_builtins(brw, (gl_shader_type) stage, shader->ir);
152 do_mat_op_to_vec(shader->ir);
153 lower_instructions(shader->ir,
160 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
161 * if-statements need to be flattened.
164 lower_if_to_cond_assign(shader->ir, 16);
166 do_lower_texture_projection(shader->ir);
167 if (intel->gen < 8 && !intel->is_haswell)
168 brw_lower_texture_gradients(shader->ir);
169 do_vec_index_to_cond_assign(shader->ir);
170 brw_do_cubemap_normalize(shader->ir);
171 lower_noise(shader->ir);
172 lower_quadop_vector(shader->ir, false);
175 bool output = stage == MESA_SHADER_FRAGMENT;
176 bool temp = stage == MESA_SHADER_FRAGMENT;
177 bool uniform = false;
179 bool lowered_variable_indexing =
180 lower_variable_index_to_cond_assign(shader->ir,
181 input, output, temp, uniform);
183 if (unlikely((INTEL_DEBUG & DEBUG_PERF) && lowered_variable_indexing)) {
184 perf_debug("Unsupported form of variable indexing in FS; falling "
185 "back to very inefficient code generation\n");
188 /* FINISHME: Do this before the variable index lowering. */
189 lower_ubo_reference(&shader->base, shader->ir);
194 if (stage == MESA_SHADER_FRAGMENT) {
195 brw_do_channel_expressions(shader->ir);
196 brw_do_vector_splitting(shader->ir);
199 progress = do_lower_jumps(shader->ir, true, true,
200 true, /* main return */
201 false, /* continue */
205 progress = do_common_optimization(shader->ir, true, true, 32)
209 /* Make a pass over the IR to add state references for any built-in
210 * uniforms that are used. This has to be done now (during linking).
211 * Code generation doesn't happen until the first time this shader is
212 * used for rendering. Waiting until then to generate the parameters is
213 * too late. At that point, the values for the built-in uniforms won't
214 * get sent to the shader.
216 foreach_list(node, shader->ir) {
217 ir_variable *var = ((ir_instruction *) node)->as_variable();
219 if ((var == NULL) || (var->mode != ir_var_uniform)
220 || (strncmp(var->name, "gl_", 3) != 0))
223 const ir_state_slot *const slots = var->state_slots;
224 assert(var->state_slots != NULL);
226 for (unsigned int i = 0; i < var->num_state_slots; i++) {
227 _mesa_add_state_reference(prog->Parameters,
228 (gl_state_index *) slots[i].tokens);
232 validate_ir_tree(shader->ir);
234 reparent_ir(shader->ir, shader->ir);
235 ralloc_free(mem_ctx);
237 do_set_program_inouts(shader->ir, prog,
238 shader->base.Type == GL_FRAGMENT_SHADER);
240 prog->SamplersUsed = shader->base.active_samplers;
241 _mesa_update_shader_textures_used(shProg, prog);
243 _mesa_reference_program(ctx, &shader->base.Program, prog);
245 brw_add_texrect_params(prog);
247 /* This has to be done last. Any operation that can cause
248 * prog->ParameterValues to get reallocated (e.g., anything that adds a
249 * program constant) has to happen before creating this linkage.
251 _mesa_associate_uniform_storage(ctx, shProg, prog->Parameters);
253 _mesa_reference_program(ctx, &prog, NULL);
255 if (ctx->Shader.Flags & GLSL_DUMP) {
256 static const char *target_strings[]
257 = { "vertex", "fragment", "geometry" };
259 printf("GLSL IR for linked %s program %d:\n", target_strings[stage],
261 _mesa_print_ir(shader->base.ir, NULL);
265 if (!brw_shader_precompile(ctx, shProg))
273 brw_type_for_base_type(const struct glsl_type *type)
275 switch (type->base_type) {
276 case GLSL_TYPE_FLOAT:
277 return BRW_REGISTER_TYPE_F;
280 return BRW_REGISTER_TYPE_D;
282 return BRW_REGISTER_TYPE_UD;
283 case GLSL_TYPE_ARRAY:
284 return brw_type_for_base_type(type->fields.array);
285 case GLSL_TYPE_STRUCT:
286 case GLSL_TYPE_SAMPLER:
287 /* These should be overridden with the type of the member when
288 * dereferenced into. BRW_REGISTER_TYPE_UD seems like a likely
289 * way to trip up if we don't.
291 return BRW_REGISTER_TYPE_UD;
293 case GLSL_TYPE_ERROR:
294 case GLSL_TYPE_INTERFACE:
295 assert(!"not reached");
299 return BRW_REGISTER_TYPE_F;
303 brw_conditional_for_comparison(unsigned int op)
307 return BRW_CONDITIONAL_L;
308 case ir_binop_greater:
309 return BRW_CONDITIONAL_G;
310 case ir_binop_lequal:
311 return BRW_CONDITIONAL_LE;
312 case ir_binop_gequal:
313 return BRW_CONDITIONAL_GE;
315 case ir_binop_all_equal: /* same as equal for scalars */
316 return BRW_CONDITIONAL_Z;
317 case ir_binop_nequal:
318 case ir_binop_any_nequal: /* same as nequal for scalars */
319 return BRW_CONDITIONAL_NZ;
321 assert(!"not reached: bad operation for comparison");
322 return BRW_CONDITIONAL_NZ;
327 brw_math_function(enum opcode op)
330 case SHADER_OPCODE_RCP:
331 return BRW_MATH_FUNCTION_INV;
332 case SHADER_OPCODE_RSQ:
333 return BRW_MATH_FUNCTION_RSQ;
334 case SHADER_OPCODE_SQRT:
335 return BRW_MATH_FUNCTION_SQRT;
336 case SHADER_OPCODE_EXP2:
337 return BRW_MATH_FUNCTION_EXP;
338 case SHADER_OPCODE_LOG2:
339 return BRW_MATH_FUNCTION_LOG;
340 case SHADER_OPCODE_POW:
341 return BRW_MATH_FUNCTION_POW;
342 case SHADER_OPCODE_SIN:
343 return BRW_MATH_FUNCTION_SIN;
344 case SHADER_OPCODE_COS:
345 return BRW_MATH_FUNCTION_COS;
346 case SHADER_OPCODE_INT_QUOTIENT:
347 return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
348 case SHADER_OPCODE_INT_REMAINDER:
349 return BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
351 assert(!"not reached: unknown math function");
357 brw_texture_offset(ir_constant *offset)
359 assert(offset != NULL);
361 signed char offsets[3];
362 for (unsigned i = 0; i < offset->type->vector_elements; i++)
363 offsets[i] = (signed char) offset->value.i[i];
365 /* Combine all three offsets into a single unsigned dword:
367 * bits 11:8 - U Offset (X component)
368 * bits 7:4 - V Offset (Y component)
369 * bits 3:0 - R Offset (Z component)
371 unsigned offset_bits = 0;
372 for (unsigned i = 0; i < offset->type->vector_elements; i++) {
373 const unsigned shift = 4 * (2 - i);
374 offset_bits |= (offsets[i] << shift) & (0xF << shift);