src/mesa/drivers/dri/i965/brw_structs.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_STRUCTS_H
  34 #define BRW_STRUCTS_H
  35
  36 /* Command packets:
  37  */
  38 struct header
  39 {
  40    GLuint length:16;
  41    GLuint opcode:16;
  42 };
  43
  44
  45 union header_union
  46 {
  47    struct header bits;
  48    GLuint dword;
  49 };
  50
  51 struct brw_3d_control
  52 {
  53    struct
  54    {
  55       GLuint length:8;
  56       GLuint notify_enable:1;
  57       GLuint pad:3;
  58       GLuint wc_flush_enable:1;
  59       GLuint depth_stall_enable:1;
  60       GLuint operation:2;
  61       GLuint opcode:16;
  62    } header;
  63
  64    struct
  65    {
  66       GLuint pad:2;
  67       GLuint dest_addr_type:1;
  68       GLuint dest_addr:29;
  69    } dest;
  70
  71    GLuint dword2;
  72    GLuint dword3;
  73 };
  74
  75
  76 struct brw_3d_primitive
  77 {
  78    struct
  79    {
  80       GLuint length:8;
  81       GLuint pad:2;
  82       GLuint topology:5;
  83       GLuint indexed:1;
  84       GLuint opcode:16;
  85    } header;
  86
  87    GLuint verts_per_instance;
  88    GLuint start_vert_location;
  89    GLuint instance_count;
  90    GLuint start_instance_location;
  91    GLuint base_vert_location;
  92 };
  93
  94 /* These seem to be passed around as function args, so it works out
  95  * better to keep them as #defines:
  96  */
  97 #define BRW_FLUSH_READ_CACHE           0x1
  98 #define BRW_FLUSH_STATE_CACHE          0x2
  99 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4
 100 #define BRW_FLUSH_SNAPSHOT_COUNTERS    0x8
 101
 102 struct brw_mi_flush
 103 {
 104    GLuint flags:4;
 105    GLuint pad:12;
 106    GLuint opcode:16;
 107 };
 108
 109 struct brw_vf_statistics
 110 {
 111    GLuint statistics_enable:1;
 112    GLuint pad:15;
 113    GLuint opcode:16;
 114 };
 115
 116
 117
 118 struct brw_binding_table_pointers
 119 {
 120    struct header header;
 121    GLuint vs;
 122    GLuint gs;
 123    GLuint clp;
 124    GLuint sf;
 125    GLuint wm;
 126 };
 127
 128
 129 struct brw_blend_constant_color
 130 {
 131    struct header header;
 132    GLfloat blend_constant_color[4];
 133 };
 134
 135
 136 struct brw_depthbuffer
 137 {
 138    union header_union header;
 139
 140    union {
 141       struct {
 142          GLuint pitch:18;
 143          GLuint format:3;
 144          GLuint pad:4;
 145          GLuint depth_offset_disable:1;
 146          GLuint tile_walk:1;
 147          GLuint tiled_surface:1;
 148          GLuint pad2:1;
 149          GLuint surface_type:3;
 150       } bits;
 151       GLuint dword;
 152    } dword1;
 153
 154    GLuint dword2_base_addr;
 155
 156    union {
 157       struct {
 158          GLuint pad:1;
 159          GLuint mipmap_layout:1;
 160          GLuint lod:4;
 161          GLuint width:13;
 162          GLuint height:13;
 163       } bits;
 164       GLuint dword;
 165    } dword3;
 166
 167    union {
 168       struct {
 169          GLuint pad:12;
 170          GLuint min_array_element:9;
 171          GLuint depth:11;
 172       } bits;
 173       GLuint dword;
 174    } dword4;
 175 };
 176
 177 struct brw_drawrect
 178 {
 179    struct header header;
 180    GLuint xmin:16;
 181    GLuint ymin:16;
 182    GLuint xmax:16;
 183    GLuint ymax:16;
 184    GLuint xorg:16;
 185    GLuint yorg:16;
 186 };
 187
 188
 189
 190
 191 struct brw_global_depth_offset_clamp
 192 {
 193    struct header header;
 194    GLfloat depth_offset_clamp;
 195 };
 196
 197 struct brw_indexbuffer
 198 {
 199    union {
 200       struct
 201       {
 202          GLuint length:8;
 203          GLuint index_format:2;
 204          GLuint cut_index_enable:1;
 205          GLuint pad:5;
 206          GLuint opcode:16;
 207       } bits;
 208       GLuint dword;
 209
 210    } header;
 211
 212    GLuint buffer_start;
 213    GLuint buffer_end;
 214 };
 215
 216
 217 struct brw_line_stipple
 218 {
 219    struct header header;
 220
 221    struct
 222    {
 223       GLuint pattern:16;
 224       GLuint pad:16;
 225    } bits0;
 226
 227    struct
 228    {
 229       GLuint repeat_count:9;
 230       GLuint pad:7;
 231       GLuint inverse_repeat_count:16;
 232    } bits1;
 233 };
 234
 235
 236 struct brw_pipelined_state_pointers
 237 {
 238    struct header header;
 239
 240    struct {
 241       GLuint pad:5;
 242       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 243    } vs;
 244
 245    struct
 246    {
 247       GLuint enable:1;
 248       GLuint pad:4;
 249       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 250    } gs;
 251
 252    struct
 253    {
 254       GLuint enable:1;
 255       GLuint pad:4;
 256       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 257    } clp;
 258
 259    struct
 260    {
 261       GLuint pad:5;
 262       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 263    } sf;
 264
 265    struct
 266    {
 267       GLuint pad:5;
 268       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 269    } wm;
 270
 271    struct
 272    {
 273       GLuint pad:5;
 274       GLuint offset:27; /* Offset from GENERAL_STATE_BASE. KW: check me! */
 275    } cc;
 276 };
 277
 278
 279 struct brw_polygon_stipple_offset
 280 {
 281    struct header header;
 282
 283    struct {
 284       GLuint y_offset:5;
 285       GLuint pad:3;
 286       GLuint x_offset:5;
 287       GLuint pad0:19;
 288    } bits0;
 289 };
 290
 291
 292
 293 struct brw_polygon_stipple
 294 {
 295    struct header header;
 296    GLuint stipple[32];
 297 };
 298
 299
 300
 301 struct brw_pipeline_select
 302 {
 303    struct
 304    {
 305       GLuint pipeline_select:1;
 306       GLuint pad:15;
 307       GLuint opcode:16;
 308    } header;
 309 };
 310
 311
 312 struct brw_pipe_control
 313 {
 314    struct
 315    {
 316       GLuint length:8;
 317       GLuint notify_enable:1;
 318       GLuint pad:2;
 319       GLuint instruction_state_cache_flush_enable:1;
 320       GLuint write_cache_flush_enable:1;
 321       GLuint depth_stall_enable:1;
 322       GLuint post_sync_operation:2;
 323
 324       GLuint opcode:16;
 325    } header;
 326
 327    struct
 328    {
 329       GLuint pad:2;
 330       GLuint dest_addr_type:1;
 331       GLuint dest_addr:29;
 332    } bits1;
 333
 334    GLuint data0;
 335    GLuint data1;
 336 };
 337
 338
 339 struct brw_urb_fence
 340 {
 341    struct
 342    {
 343       GLuint length:8;
 344       GLuint vs_realloc:1;
 345       GLuint gs_realloc:1;
 346       GLuint clp_realloc:1;
 347       GLuint sf_realloc:1;
 348       GLuint vfe_realloc:1;
 349       GLuint cs_realloc:1;
 350       GLuint pad:2;
 351       GLuint opcode:16;
 352    } header;
 353
 354    struct
 355    {
 356       GLuint vs_fence:10;
 357       GLuint gs_fence:10;
 358       GLuint clp_fence:10;
 359       GLuint pad:2;
 360    } bits0;
 361
 362    struct
 363    {
 364       GLuint sf_fence:10;
 365       GLuint vf_fence:10;
 366       GLuint cs_fence:10;
 367       GLuint pad:2;
 368    } bits1;
 369 };
 370
 371 struct brw_constant_buffer_state /* previously brw_command_streamer */
 372 {
 373    struct header header;
 374
 375    struct
 376    {
 377       GLuint nr_urb_entries:3;
 378       GLuint pad:1;
 379       GLuint urb_entry_size:5;
 380       GLuint pad0:23;
 381    } bits0;
 382 };
 383
 384 struct brw_constant_buffer
 385 {
 386    struct
 387    {
 388       GLuint length:8;
 389       GLuint valid:1;
 390       GLuint pad:7;
 391       GLuint opcode:16;
 392    } header;
 393
 394    struct
 395    {
 396       GLuint buffer_length:6;
 397       GLuint buffer_address:26;
 398    } bits0;
 399 };
 400
 401 struct brw_state_base_address
 402 {
 403    struct header header;
 404
 405    struct
 406    {
 407       GLuint modify_enable:1;
 408       GLuint pad:4;
 409       GLuint general_state_address:27;
 410    } bits0;
 411
 412    struct
 413    {
 414       GLuint modify_enable:1;
 415       GLuint pad:4;
 416       GLuint surface_state_address:27;
 417    } bits1;
 418
 419    struct
 420    {
 421       GLuint modify_enable:1;
 422       GLuint pad:4;
 423       GLuint indirect_object_state_address:27;
 424    } bits2;
 425
 426    struct
 427    {
 428       GLuint modify_enable:1;
 429       GLuint pad:11;
 430       GLuint general_state_upper_bound:20;
 431    } bits3;
 432
 433    struct
 434    {
 435       GLuint modify_enable:1;
 436       GLuint pad:11;
 437       GLuint indirect_object_state_upper_bound:20;
 438    } bits4;
 439 };
 440
 441 struct brw_state_prefetch
 442 {
 443    struct header header;
 444
 445    struct
 446    {
 447       GLuint prefetch_count:3;
 448       GLuint pad:3;
 449       GLuint prefetch_pointer:26;
 450    } bits0;
 451 };
 452
 453 struct brw_system_instruction_pointer
 454 {
 455    struct header header;
 456
 457    struct
 458    {
 459       GLuint pad:4;
 460       GLuint system_instruction_pointer:28;
 461    } bits0;
 462 };
 463
 464
 465
 466
 467 /* State structs for the various fixed function units:
 468  */
 469
 470
 471 struct thread0
 472 {
 473    GLuint pad0:1;
 474    GLuint grf_reg_count:3;
 475    GLuint pad1:2;
 476    GLuint kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */
 477 };
 478
 479 struct thread1
 480 {
 481    GLuint ext_halt_exception_enable:1;
 482    GLuint sw_exception_enable:1;
 483    GLuint mask_stack_exception_enable:1;
 484    GLuint timeout_exception_enable:1;
 485    GLuint illegal_op_exception_enable:1;
 486    GLuint pad0:3;
 487    GLuint depth_coef_urb_read_offset:6; /* WM only */
 488    GLuint pad1:2;
 489    GLuint floating_point_mode:1;
 490    GLuint thread_priority:1;
 491    GLuint binding_table_entry_count:8;
 492    GLuint pad3:5;
 493    GLuint single_program_flow:1;
 494 };
 495
 496 struct thread2
 497 {
 498    GLuint per_thread_scratch_space:4;
 499    GLuint pad0:6;
 500    GLuint scratch_space_base_pointer:22;
 501 };
 502
 503
 504 struct thread3
 505 {
 506    GLuint dispatch_grf_start_reg:4;
 507    GLuint urb_entry_read_offset:6;
 508    GLuint pad0:1;
 509    GLuint urb_entry_read_length:6;
 510    GLuint pad1:1;
 511    GLuint const_urb_entry_read_offset:6;
 512    GLuint pad2:1;
 513    GLuint const_urb_entry_read_length:6;
 514    GLuint pad3:1;
 515 };
 516
 517
 518
 519 struct brw_clip_unit_state
 520 {
 521    struct thread0 thread0;
 522    struct
 523    {
 524       GLuint pad0:7;
 525       GLuint sw_exception_enable:1;
 526       GLuint pad1:3;
 527       GLuint mask_stack_exception_enable:1;
 528       GLuint pad2:1;
 529       GLuint illegal_op_exception_enable:1;
 530       GLuint pad3:2;
 531       GLuint floating_point_mode:1;
 532       GLuint thread_priority:1;
 533       GLuint binding_table_entry_count:8;
 534       GLuint pad4:5;
 535       GLuint single_program_flow:1;
 536    } thread1;
 537
 538    struct thread2 thread2;
 539    struct thread3 thread3;
 540
 541    struct
 542    {
 543       GLuint pad0:9;
 544       GLuint gs_output_stats:1; /* not always */
 545       GLuint stats_enable:1;
 546       GLuint nr_urb_entries:7;
 547       GLuint pad1:1;
 548       GLuint urb_entry_allocation_size:5;
 549       GLuint pad2:1;
 550       GLuint max_threads:1;     /* may be less */
 551       GLuint pad3:6;
 552    } thread4;
 553
 554    struct
 555    {
 556       GLuint pad0:13;
 557       GLuint clip_mode:3;
 558       GLuint userclip_enable_flags:8;
 559       GLuint userclip_must_clip:1;
 560       GLuint pad1:1;
 561       GLuint guard_band_enable:1;
 562       GLuint viewport_z_clip_enable:1;
 563       GLuint viewport_xy_clip_enable:1;
 564       GLuint vertex_position_space:1;
 565       GLuint api_mode:1;
 566       GLuint pad2:1;
 567    } clip5;
 568
 569    struct
 570    {
 571       GLuint pad0:5;
 572       GLuint clipper_viewport_state_ptr:27;
 573    } clip6;
 574
 575
 576    GLfloat viewport_xmin;
 577    GLfloat viewport_xmax;
 578    GLfloat viewport_ymin;
 579    GLfloat viewport_ymax;
 580 };
 581
 582
 583
 584 struct brw_cc_unit_state
 585 {
 586    struct
 587    {
 588       GLuint pad0:3;
 589       GLuint bf_stencil_pass_depth_pass_op:3;
 590       GLuint bf_stencil_pass_depth_fail_op:3;
 591       GLuint bf_stencil_fail_op:3;
 592       GLuint bf_stencil_func:3;
 593       GLuint bf_stencil_enable:1;
 594       GLuint pad1:2;
 595       GLuint stencil_write_enable:1;
 596       GLuint stencil_pass_depth_pass_op:3;
 597       GLuint stencil_pass_depth_fail_op:3;
 598       GLuint stencil_fail_op:3;
 599       GLuint stencil_func:3;
 600       GLuint stencil_enable:1;
 601    } cc0;
 602
 603
 604    struct
 605    {
 606       GLuint bf_stencil_ref:8;
 607       GLuint stencil_write_mask:8;
 608       GLuint stencil_test_mask:8;
 609       GLuint stencil_ref:8;
 610    } cc1;
 611
 612
 613    struct
 614    {
 615       GLuint logicop_enable:1;
 616       GLuint pad0:10;
 617       GLuint depth_write_enable:1;
 618       GLuint depth_test_function:3;
 619       GLuint depth_test:1;
 620       GLuint bf_stencil_write_mask:8;
 621       GLuint bf_stencil_test_mask:8;
 622    } cc2;
 623
 624
 625    struct
 626    {
 627       GLuint pad0:8;
 628       GLuint alpha_test_func:3;
 629       GLuint alpha_test:1;
 630       GLuint blend_enable:1;
 631       GLuint ia_blend_enable:1;
 632       GLuint pad1:1;
 633       GLuint alpha_test_format:1;
 634       GLuint pad2:16;
 635    } cc3;
 636
 637    struct
 638    {
 639       GLuint pad0:5;
 640       GLuint cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
 641    } cc4;
 642
 643    struct
 644    {
 645       GLuint pad0:2;
 646       GLuint ia_dest_blend_factor:5;
 647       GLuint ia_src_blend_factor:5;
 648       GLuint ia_blend_function:3;
 649       GLuint statistics_enable:1;
 650       GLuint logicop_func:4;
 651       GLuint pad1:11;
 652       GLuint dither_enable:1;
 653    } cc5;
 654
 655    struct
 656    {
 657       GLuint clamp_post_alpha_blend:1;
 658       GLuint clamp_pre_alpha_blend:1;
 659       GLuint clamp_range:2;
 660       GLuint pad0:11;
 661       GLuint y_dither_offset:2;
 662       GLuint x_dither_offset:2;
 663       GLuint dest_blend_factor:5;
 664       GLuint src_blend_factor:5;
 665       GLuint blend_function:3;
 666    } cc6;
 667
 668    struct {
 669       union {
 670          GLfloat f;
 671          GLubyte ub[4];
 672       } alpha_ref;
 673    } cc7;
 674 };
 675
 676
 677
 678 struct brw_sf_unit_state
 679 {
 680    struct thread0 thread0;
 681    struct thread1 thread1;
 682    struct thread2 thread2;
 683    struct thread3 thread3;
 684
 685    struct
 686    {
 687       GLuint pad0:10;
 688       GLuint stats_enable:1;
 689       GLuint nr_urb_entries:7;
 690       GLuint pad1:1;
 691       GLuint urb_entry_allocation_size:5;
 692       GLuint pad2:1;
 693       GLuint max_threads:6;
 694       GLuint pad3:1;
 695    } thread4;
 696
 697    struct
 698    {
 699       GLuint front_winding:1;
 700       GLuint viewport_transform:1;
 701       GLuint pad0:3;
 702       GLuint sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
 703    } sf5;
 704
 705    struct
 706    {
 707       GLuint pad0:9;
 708       GLuint dest_org_vbias:4;
 709       GLuint dest_org_hbias:4;
 710       GLuint scissor:1;
 711       GLuint disable_2x2_trifilter:1;
 712       GLuint disable_zero_pix_trifilter:1;
 713       GLuint point_rast_rule:2;
 714       GLuint line_endcap_aa_region_width:2;
 715       GLuint line_width:4;
 716       GLuint fast_scissor_disable:1;
 717       GLuint cull_mode:2;
 718       GLuint aa_enable:1;
 719    } sf6;
 720
 721    struct
 722    {
 723       GLuint point_size:11;
 724       GLuint use_point_size_state:1;
 725       GLuint subpixel_precision:1;
 726       GLuint sprite_point:1;
 727       GLuint pad0:11;
 728       GLuint trifan_pv:2;
 729       GLuint linestrip_pv:2;
 730       GLuint tristrip_pv:2;
 731       GLuint line_last_pixel_enable:1;
 732    } sf7;
 733
 734 };
 735
 736
 737 struct brw_gs_unit_state
 738 {
 739    struct thread0 thread0;
 740    struct thread1 thread1;
 741    struct thread2 thread2;
 742    struct thread3 thread3;
 743
 744    struct
 745    {
 746       GLuint pad0:10;
 747       GLuint stats_enable:1;
 748       GLuint nr_urb_entries:7;
 749       GLuint pad1:1;
 750       GLuint urb_entry_allocation_size:5;
 751       GLuint pad2:1;
 752       GLuint max_threads:1;
 753       GLuint pad3:6;
 754    } thread4;
 755
 756    struct
 757    {
 758       GLuint sampler_count:3;
 759       GLuint pad0:2;
 760       GLuint sampler_state_pointer:27;
 761    } gs5;
 762
 763
 764    struct
 765    {
 766       GLuint max_vp_index:4;
 767       GLuint pad0:26;
 768       GLuint reorder_enable:1;
 769       GLuint pad1:1;
 770    } gs6;
 771 };
 772
 773
 774 struct brw_vs_unit_state
 775 {
 776    struct thread0 thread0;
 777    struct thread1 thread1;
 778    struct thread2 thread2;
 779    struct thread3 thread3;
 780
 781    struct
 782    {
 783       GLuint pad0:10;
 784       GLuint stats_enable:1;
 785       GLuint nr_urb_entries:7;
 786       GLuint pad1:1;
 787       GLuint urb_entry_allocation_size:5;
 788       GLuint pad2:1;
 789       GLuint max_threads:4;
 790       GLuint pad3:3;
 791    } thread4;
 792
 793    struct
 794    {
 795       GLuint sampler_count:3;
 796       GLuint pad0:2;
 797       GLuint sampler_state_pointer:27;
 798    } vs5;
 799
 800    struct
 801    {
 802       GLuint vs_enable:1;
 803       GLuint vert_cache_disable:1;
 804       GLuint pad0:30;
 805    } vs6;
 806 };
 807
 808
 809 struct brw_wm_unit_state
 810 {
 811    struct thread0 thread0;
 812    struct thread1 thread1;
 813    struct thread2 thread2;
 814    struct thread3 thread3;
 815
 816    struct {
 817       GLuint stats_enable:1;
 818       GLuint pad0:1;
 819       GLuint sampler_count:3;
 820       GLuint sampler_state_pointer:27;
 821    } wm4;
 822
 823    struct
 824    {
 825       GLuint enable_8_pix:1;
 826       GLuint enable_16_pix:1;
 827       GLuint enable_32_pix:1;
 828       GLuint pad0:7;
 829       GLuint legacy_global_depth_bias:1;
 830       GLuint line_stipple:1;
 831       GLuint depth_offset:1;
 832       GLuint polygon_stipple:1;
 833       GLuint line_aa_region_width:2;
 834       GLuint line_endcap_aa_region_width:2;
 835       GLuint early_depth_test:1;
 836       GLuint thread_dispatch_enable:1;
 837       GLuint program_uses_depth:1;
 838       GLuint program_computes_depth:1;
 839       GLuint program_uses_killpixel:1;
 840       GLuint legacy_line_rast: 1;
 841       GLuint pad1:1;
 842       GLuint max_threads:6;
 843       GLuint pad2:1;
 844    } wm5;
 845
 846    GLfloat global_depth_offset_constant;
 847    GLfloat global_depth_offset_scale;
 848 };
 849
 850 struct brw_sampler_default_color {
 851    GLfloat color[4];
 852 };
 853
 854 struct brw_sampler_state
 855 {
 856
 857    struct
 858    {
 859       GLuint shadow_function:3;
 860       GLuint lod_bias:11;
 861       GLuint min_filter:3;
 862       GLuint mag_filter:3;
 863       GLuint mip_filter:2;
 864       GLuint base_level:5;
 865       GLuint pad:1;
 866       GLuint lod_preclamp:1;
 867       GLuint default_color_mode:1;
 868       GLuint pad0:1;
 869       GLuint disable:1;
 870    } ss0;
 871
 872    struct
 873    {
 874       GLuint r_wrap_mode:3;
 875       GLuint t_wrap_mode:3;
 876       GLuint s_wrap_mode:3;
 877       GLuint pad:3;
 878       GLuint max_lod:10;
 879       GLuint min_lod:10;
 880    } ss1;
 881
 882
 883    struct
 884    {
 885       GLuint pad:5;
 886       GLuint default_color_pointer:27;
 887    } ss2;
 888
 889    struct
 890    {
 891       GLuint pad:19;
 892       GLuint max_aniso:3;
 893       GLuint chroma_key_mode:1;
 894       GLuint chroma_key_index:2;
 895       GLuint chroma_key_enable:1;
 896       GLuint monochrome_filter_width:3;
 897       GLuint monochrome_filter_height:3;
 898    } ss3;
 899 };
 900
 901
 902 struct brw_clipper_viewport
 903 {
 904    GLfloat xmin;
 905    GLfloat xmax;
 906    GLfloat ymin;
 907    GLfloat ymax;
 908 };
 909
 910 struct brw_cc_viewport
 911 {
 912    GLfloat min_depth;
 913    GLfloat max_depth;
 914 };
 915
 916 struct brw_sf_viewport
 917 {
 918    struct {
 919       GLfloat m00;
 920       GLfloat m11;
 921       GLfloat m22;
 922       GLfloat m30;
 923       GLfloat m31;
 924       GLfloat m32;
 925    } viewport;
 926
 927    /* scissor coordinates are inclusive */
 928    struct {
 929       GLshort xmin;
 930       GLshort ymin;
 931       GLshort xmax;
 932       GLshort ymax;
 933    } scissor;
 934 };
 935
 936 /* Documented in the subsystem/shared-functions/sampler chapter...
 937  */
 938 struct brw_surface_state
 939 {
 940    struct {
 941       GLuint cube_pos_z:1;
 942       GLuint cube_neg_z:1;
 943       GLuint cube_pos_y:1;
 944       GLuint cube_neg_y:1;
 945       GLuint cube_pos_x:1;
 946       GLuint cube_neg_x:1;
 947       GLuint pad:4;
 948       GLuint mipmap_layout_mode:1;
 949       GLuint vert_line_stride_ofs:1;
 950       GLuint vert_line_stride:1;
 951       GLuint color_blend:1;
 952       GLuint writedisable_blue:1;
 953       GLuint writedisable_green:1;
 954       GLuint writedisable_red:1;
 955       GLuint writedisable_alpha:1;
 956       GLuint surface_format:9;
 957       GLuint data_return_format:1;
 958       GLuint pad0:1;
 959       GLuint surface_type:3;
 960    } ss0;
 961
 962    struct {
 963       GLuint base_addr;
 964    } ss1;
 965
 966    struct {
 967       GLuint pad:2;
 968       GLuint mip_count:4;
 969       GLuint width:13;
 970       GLuint height:13;
 971    } ss2;
 972
 973    struct {
 974       GLuint tile_walk:1;
 975       GLuint tiled_surface:1;
 976       GLuint pad:1;
 977       GLuint pitch:18;
 978       GLuint depth:11;
 979    } ss3;
 980
 981    struct {
 982       GLuint pad:19;
 983       GLuint min_array_elt:9;
 984       GLuint min_lod:4;
 985    } ss4;
 986 };
 987
 988
 989
 990 struct brw_vertex_buffer_state
 991 {
 992    struct {
 993       GLuint pitch:11;
 994       GLuint pad:15;
 995       GLuint access_type:1;
 996       GLuint vb_index:5;
 997    } vb0;
 998
 999    GLuint start_addr;
1000    GLuint max_index;
1001 #if 1
1002    GLuint instance_data_step_rate; /* not included for sequential/random vertices? */
1003 #endif
1004 };
1005
1006 #define BRW_VBP_MAX 17
1007
1008 struct brw_vb_array_state {
1009    struct header header;
1010    struct brw_vertex_buffer_state vb[BRW_VBP_MAX];
1011 };
1012
1013
1014 struct brw_vertex_element_state
1015 {
1016    struct
1017    {
1018       GLuint src_offset:11;
1019       GLuint pad:5;
1020       GLuint src_format:9;
1021       GLuint pad0:1;
1022       GLuint valid:1;
1023       GLuint vertex_buffer_index:5;
1024    } ve0;
1025
1026    struct
1027    {
1028       GLuint dst_offset:8;
1029       GLuint pad:8;
1030       GLuint vfcomponent3:4;
1031       GLuint vfcomponent2:4;
1032       GLuint vfcomponent1:4;
1033       GLuint vfcomponent0:4;
1034    } ve1;
1035 };
1036
1037 #define BRW_VEP_MAX 18
1038
1039 struct brw_vertex_element_packet {
1040    struct header header;
1041    struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */
1042 };
1043
1044
1045 struct brw_urb_immediate {
1046    GLuint opcode:4;
1047    GLuint offset:6;
1048    GLuint swizzle_control:2;
1049    GLuint pad:1;
1050    GLuint allocate:1;
1051    GLuint used:1;
1052    GLuint complete:1;
1053    GLuint response_length:4;
1054    GLuint msg_length:4;
1055    GLuint msg_target:4;
1056    GLuint pad1:3;
1057    GLuint end_of_thread:1;
1058 };
1059
1060 /* Instruction format for the execution units:
1061  */
1062
1063 struct brw_instruction
1064 {
1065    struct
1066    {
1067       GLuint opcode:7;
1068       GLuint pad:1;
1069       GLuint access_mode:1;
1070       GLuint mask_control:1;
1071       GLuint dependency_control:2;
1072       GLuint compression_control:2;
1073       GLuint thread_control:2;
1074       GLuint predicate_control:4;
1075       GLuint predicate_inverse:1;
1076       GLuint execution_size:3;
1077       GLuint destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */
1078       GLuint pad0:2;
1079       GLuint debug_control:1;
1080       GLuint saturate:1;
1081    } header;
1082
1083    union {
1084       struct
1085       {
1086          GLuint dest_reg_file:2;
1087          GLuint dest_reg_type:3;
1088          GLuint src0_reg_file:2;
1089          GLuint src0_reg_type:3;
1090          GLuint src1_reg_file:2;
1091          GLuint src1_reg_type:3;
1092          GLuint pad:1;
1093          GLuint dest_subreg_nr:5;
1094          GLuint dest_reg_nr:8;
1095          GLuint dest_horiz_stride:2;
1096          GLuint dest_address_mode:1;
1097       } da1;
1098
1099       struct
1100       {
1101          GLuint dest_reg_file:2;
1102          GLuint dest_reg_type:3;
1103          GLuint src0_reg_file:2;
1104          GLuint src0_reg_type:3;
1105          GLuint pad:6;
1106          GLint dest_indirect_offset:10; /* offset against the deref'd address reg */
1107          GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
1108          GLuint dest_horiz_stride:2;
1109          GLuint dest_address_mode:1;
1110       } ia1;
1111
1112       struct
1113       {
1114          GLuint dest_reg_file:2;
1115          GLuint dest_reg_type:3;
1116          GLuint src0_reg_file:2;
1117          GLuint src0_reg_type:3;
1118          GLuint src1_reg_file:2;
1119          GLuint src1_reg_type:3;
1120          GLuint pad0:1;
1121          GLuint dest_writemask:4;
1122          GLuint dest_subreg_nr:1;
1123          GLuint dest_reg_nr:8;
1124          GLuint pad1:2;
1125          GLuint dest_address_mode:1;
1126       } da16;
1127
1128       struct
1129       {
1130          GLuint dest_reg_file:2;
1131          GLuint dest_reg_type:3;
1132          GLuint src0_reg_file:2;
1133          GLuint src0_reg_type:3;
1134          GLuint pad0:6;
1135          GLuint dest_writemask:4;
1136          GLint dest_indirect_offset:6;
1137          GLuint dest_subreg_nr:3;
1138          GLuint pad1:2;
1139          GLuint dest_address_mode:1;
1140       } ia16;
1141    } bits1;
1142
1143
1144    union {
1145       struct
1146       {
1147          GLuint src0_subreg_nr:5;
1148          GLuint src0_reg_nr:8;
1149          GLuint src0_abs:1;
1150          GLuint src0_negate:1;
1151          GLuint src0_address_mode:1;
1152          GLuint src0_horiz_stride:2;
1153          GLuint src0_width:3;
1154          GLuint src0_vert_stride:4;
1155          GLuint flag_reg_nr:1;
1156          GLuint pad:6;
1157       } da1;
1158
1159       struct
1160       {
1161          GLint src0_indirect_offset:10;
1162          GLuint src0_subreg_nr:3;
1163          GLuint src0_abs:1;
1164          GLuint src0_negate:1;
1165          GLuint src0_address_mode:1;
1166          GLuint src0_horiz_stride:2;
1167          GLuint src0_width:3;
1168          GLuint src0_vert_stride:4;
1169          GLuint flag_reg_nr:1;
1170          GLuint pad:6;
1171       } ia1;
1172
1173       struct
1174       {
1175          GLuint src0_swz_x:2;
1176          GLuint src0_swz_y:2;
1177          GLuint src0_subreg_nr:1;
1178          GLuint src0_reg_nr:8;
1179          GLuint src0_abs:1;
1180          GLuint src0_negate:1;
1181          GLuint src0_address_mode:1;
1182          GLuint src0_swz_z:2;
1183          GLuint src0_swz_w:2;
1184          GLuint pad0:1;
1185          GLuint src0_vert_stride:4;
1186          GLuint flag_reg_nr:1;
1187          GLuint pad1:6;
1188       } da16;
1189
1190       struct
1191       {
1192          GLuint src0_swz_x:2;
1193          GLuint src0_swz_y:2;
1194          GLint src0_indirect_offset:6;
1195          GLuint src0_subreg_nr:3;
1196          GLuint src0_abs:1;
1197          GLuint src0_negate:1;
1198          GLuint src0_address_mode:1;
1199          GLuint src0_swz_z:2;
1200          GLuint src0_swz_w:2;
1201          GLuint pad0:1;
1202          GLuint src0_vert_stride:4;
1203          GLuint flag_reg_nr:1;
1204          GLuint pad1:6;
1205       } ia16;
1206
1207    } bits2;
1208
1209    union
1210    {
1211       struct
1212       {
1213          GLuint src1_subreg_nr:5;
1214          GLuint src1_reg_nr:8;
1215          GLuint src1_abs:1;
1216          GLuint src1_negate:1;
1217          GLuint pad:1;
1218          GLuint src1_horiz_stride:2;
1219          GLuint src1_width:3;
1220          GLuint src1_vert_stride:4;
1221          GLuint pad0:7;
1222       } da1;
1223
1224       struct
1225       {
1226          GLuint src1_swz_x:2;
1227          GLuint src1_swz_y:2;
1228          GLuint src1_subreg_nr:1;
1229          GLuint src1_reg_nr:8;
1230          GLuint src1_abs:1;
1231          GLuint src1_negate:1;
1232          GLuint pad0:1;
1233          GLuint src1_swz_z:2;
1234          GLuint src1_swz_w:2;
1235          GLuint pad1:1;
1236          GLuint src1_vert_stride:4;
1237          GLuint pad2:7;
1238       } da16;
1239
1240       struct
1241       {
1242          GLint  src1_indirect_offset:10;
1243          GLuint src1_subreg_nr:3;
1244          GLuint src1_abs:1;
1245          GLuint src1_negate:1;
1246          GLuint pad0:1;
1247          GLuint src1_horiz_stride:2;
1248          GLuint src1_width:3;
1249          GLuint src1_vert_stride:4;
1250          GLuint flag_reg_nr:1;
1251          GLuint pad1:6;
1252       } ia1;
1253
1254       struct
1255       {
1256          GLuint src1_swz_x:2;
1257          GLuint src1_swz_y:2;
1258          GLint  src1_indirect_offset:6;
1259          GLuint src1_subreg_nr:3;
1260          GLuint src1_abs:1;
1261          GLuint src1_negate:1;
1262          GLuint pad0:1;
1263          GLuint src1_swz_z:2;
1264          GLuint src1_swz_w:2;
1265          GLuint pad1:1;
1266          GLuint src1_vert_stride:4;
1267          GLuint flag_reg_nr:1;
1268          GLuint pad2:6;
1269       } ia16;
1270
1271
1272       struct
1273       {
1274          GLint  jump_count:16;  /* note: signed */
1275          GLuint  pop_count:4;
1276          GLuint  pad0:12;
1277       } if_else;
1278
1279       struct {
1280          GLuint function:4;
1281          GLuint int_type:1;
1282          GLuint precision:1;
1283          GLuint saturate:1;
1284          GLuint data_type:1;
1285          GLuint pad0:8;
1286          GLuint response_length:4;
1287          GLuint msg_length:4;
1288          GLuint msg_target:4;
1289          GLuint pad1:3;
1290          GLuint end_of_thread:1;
1291       } math;
1292
1293       struct {
1294          GLuint binding_table_index:8;
1295          GLuint sampler:4;
1296          GLuint return_format:2;
1297          GLuint msg_type:2;
1298          GLuint response_length:4;
1299          GLuint msg_length:4;
1300          GLuint msg_target:4;
1301          GLuint pad1:3;
1302          GLuint end_of_thread:1;
1303       } sampler;
1304
1305       struct brw_urb_immediate urb;
1306
1307       struct {
1308          GLuint binding_table_index:8;
1309          GLuint msg_control:4;
1310          GLuint msg_type:2;
1311          GLuint target_cache:2;
1312          GLuint response_length:4;
1313          GLuint msg_length:4;
1314          GLuint msg_target:4;
1315          GLuint pad1:3;
1316          GLuint end_of_thread:1;
1317       } dp_read;
1318
1319       struct {
1320          GLuint binding_table_index:8;
1321          GLuint msg_control:3;
1322          GLuint pixel_scoreboard_clear:1;
1323          GLuint msg_type:3;
1324          GLuint send_commit_msg:1;
1325          GLuint response_length:4;
1326          GLuint msg_length:4;
1327          GLuint msg_target:4;
1328          GLuint pad1:3;
1329          GLuint end_of_thread:1;
1330       } dp_write;
1331
1332       struct {
1333          GLuint pad:16;
1334          GLuint response_length:4;
1335          GLuint msg_length:4;
1336          GLuint msg_target:4;
1337          GLuint pad1:3;
1338          GLuint end_of_thread:1;
1339       } generic;
1340
1341       GLint d;
1342       GLuint ud;
1343    } bits3;
1344 };
1345
1346
1347 #endif