src/mesa/drivers/dri/intel/intel_context.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/extensions.h"
  32 #include "main/fbobject.h"
  33 #include "main/framebuffer.h"
  34 #include "main/imports.h"
  35 #include "main/points.h"
  36 #include "main/renderbuffer.h"
  37
  38 #include "swrast/swrast.h"
  39 #include "swrast_setup/swrast_setup.h"
  40 #include "tnl/tnl.h"
  41 #include "drivers/common/driverfuncs.h"
  42 #include "drivers/common/meta.h"
  43
  44 #include "intel_chipset.h"
  45 #include "intel_buffers.h"
  46 #include "intel_tex.h"
  47 #include "intel_batchbuffer.h"
  48 #include "intel_clear.h"
  49 #include "intel_extensions.h"
  50 #include "intel_pixel.h"
  51 #include "intel_regions.h"
  52 #include "intel_buffer_objects.h"
  53 #include "intel_fbo.h"
  54 #include "intel_bufmgr.h"
  55 #include "intel_screen.h"
  56 #include "intel_mipmap_tree.h"
  57
  58 #include "utils.h"
  59 #include "../glsl/ralloc.h"
  60
  61 #ifndef INTEL_DEBUG
  62 int INTEL_DEBUG = (0);
  63 #endif
  64
  65
  66 static const GLubyte *
  67 intelGetString(struct gl_context * ctx, GLenum name)
  68 {
  69    const struct intel_context *const intel = intel_context(ctx);
  70    const char *chipset;
  71    static char buffer[128];
  72
  73    switch (name) {
  74    case GL_VENDOR:
  75       return (GLubyte *) "Tungsten Graphics, Inc";
  76       break;
  77
  78    case GL_RENDERER:
  79       switch (intel->intelScreen->deviceID) {
  80       case PCI_CHIP_845_G:
  81          chipset = "Intel(R) 845G";
  82          break;
  83       case PCI_CHIP_I830_M:
  84          chipset = "Intel(R) 830M";
  85          break;
  86       case PCI_CHIP_I855_GM:
  87          chipset = "Intel(R) 852GM/855GM";
  88          break;
  89       case PCI_CHIP_I865_G:
  90          chipset = "Intel(R) 865G";
  91          break;
  92       case PCI_CHIP_I915_G:
  93          chipset = "Intel(R) 915G";
  94          break;
  95       case PCI_CHIP_E7221_G:
  96          chipset = "Intel (R) E7221G (i915)";
  97          break;
  98       case PCI_CHIP_I915_GM:
  99          chipset = "Intel(R) 915GM";
 100          break;
 101       case PCI_CHIP_I945_G:
 102          chipset = "Intel(R) 945G";
 103          break;
 104       case PCI_CHIP_I945_GM:
 105          chipset = "Intel(R) 945GM";
 106          break;
 107       case PCI_CHIP_I945_GME:
 108          chipset = "Intel(R) 945GME";
 109          break;
 110       case PCI_CHIP_G33_G:
 111          chipset = "Intel(R) G33";
 112          break;
 113       case PCI_CHIP_Q35_G:
 114          chipset = "Intel(R) Q35";
 115          break;
 116       case PCI_CHIP_Q33_G:
 117          chipset = "Intel(R) Q33";
 118          break;
 119       case PCI_CHIP_IGD_GM:
 120       case PCI_CHIP_IGD_G:
 121          chipset = "Intel(R) IGD";
 122          break;
 123       case PCI_CHIP_I965_Q:
 124          chipset = "Intel(R) 965Q";
 125          break;
 126       case PCI_CHIP_I965_G:
 127       case PCI_CHIP_I965_G_1:
 128          chipset = "Intel(R) 965G";
 129          break;
 130       case PCI_CHIP_I946_GZ:
 131          chipset = "Intel(R) 946GZ";
 132          break;
 133       case PCI_CHIP_I965_GM:
 134          chipset = "Intel(R) 965GM";
 135          break;
 136       case PCI_CHIP_I965_GME:
 137          chipset = "Intel(R) 965GME/GLE";
 138          break;
 139       case PCI_CHIP_GM45_GM:
 140          chipset = "Mobile Intel® GM45 Express Chipset";
 141          break;
 142       case PCI_CHIP_IGD_E_G:
 143          chipset = "Intel(R) Integrated Graphics Device";
 144          break;
 145       case PCI_CHIP_G45_G:
 146          chipset = "Intel(R) G45/G43";
 147          break;
 148       case PCI_CHIP_Q45_G:
 149          chipset = "Intel(R) Q45/Q43";
 150          break;
 151       case PCI_CHIP_G41_G:
 152          chipset = "Intel(R) G41";
 153          break;
 154       case PCI_CHIP_B43_G:
 155       case PCI_CHIP_B43_G1:
 156          chipset = "Intel(R) B43";
 157          break;
 158       case PCI_CHIP_ILD_G:
 159          chipset = "Intel(R) Ironlake Desktop";
 160          break;
 161       case PCI_CHIP_ILM_G:
 162          chipset = "Intel(R) Ironlake Mobile";
 163          break;
 164       case PCI_CHIP_SANDYBRIDGE_GT1:
 165       case PCI_CHIP_SANDYBRIDGE_GT2:
 166       case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
 167          chipset = "Intel(R) Sandybridge Desktop";
 168          break;
 169       case PCI_CHIP_SANDYBRIDGE_M_GT1:
 170       case PCI_CHIP_SANDYBRIDGE_M_GT2:
 171       case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
 172          chipset = "Intel(R) Sandybridge Mobile";
 173          break;
 174       case PCI_CHIP_SANDYBRIDGE_S:
 175          chipset = "Intel(R) Sandybridge Server";
 176          break;
 177       case PCI_CHIP_IVYBRIDGE_GT1:
 178       case PCI_CHIP_IVYBRIDGE_GT2:
 179          chipset = "Intel(R) Ivybridge Desktop";
 180          break;
 181       case PCI_CHIP_IVYBRIDGE_M_GT1:
 182       case PCI_CHIP_IVYBRIDGE_M_GT2:
 183          chipset = "Intel(R) Ivybridge Mobile";
 184          break;
 185       case PCI_CHIP_IVYBRIDGE_S_GT1:
 186          chipset = "Intel(R) Ivybridge Server";
 187          break;
 188       default:
 189          chipset = "Unknown Intel Chipset";
 190          break;
 191       }
 192
 193       (void) driGetRendererString(buffer, chipset, 0);
 194       return (GLubyte *) buffer;
 195
 196    default:
 197       return NULL;
 198    }
 199 }
 200
 201 static void
 202 intel_flush_front(struct gl_context *ctx)
 203 {
 204    struct intel_context *intel = intel_context(ctx);
 205     __DRIcontext *driContext = intel->driContext;
 206     __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
 207
 208    if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
 209       if (screen->dri2.loader &&
 210           (screen->dri2.loader->base.version >= 2)
 211           && (screen->dri2.loader->flushFrontBuffer != NULL) &&
 212           driContext->driDrawablePriv &&
 213           driContext->driDrawablePriv->loaderPrivate) {
 214          (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
 215                                                   driContext->driDrawablePriv->loaderPrivate);
 216
 217          /* We set the dirty bit in intel_prepare_render() if we're
 218           * front buffer rendering once we get there.
 219           */
 220          intel->front_buffer_dirty = false;
 221       }
 222    }
 223 }
 224
 225 static unsigned
 226 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
 227 {
 228    return _mesa_get_format_bytes(intel_rb_format(rb)) * 8;
 229 }
 230
 231 static void
 232 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
 233                                              __DRIdrawable *drawable,
 234                                              __DRIbuffer **buffers,
 235                                              int *count);
 236
 237 static void
 238 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
 239                                               __DRIdrawable *drawable,
 240                                               __DRIbuffer *buffer,
 241                                               struct intel_renderbuffer *rb,
 242                                               const char *buffer_name);
 243
 244 static void
 245 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
 246                                                __DRIdrawable *drawable,
 247                                                __DRIbuffer **buffers,
 248                                                unsigned **attachments,
 249                                                int *count);
 250
 251 static void
 252 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
 253                                                 __DRIdrawable *drawable,
 254                                                 __DRIbuffer *buffer,
 255                                                 struct intel_renderbuffer *rb,
 256                                                 const char *buffer_name);
 257 static void
 258 intel_verify_dri2_has_hiz(struct intel_context *intel,
 259                           __DRIdrawable *drawable,
 260                           __DRIbuffer **buffers,
 261                           unsigned **attachments,
 262                           int *count);
 263
 264 void
 265 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 266 {
 267    struct gl_framebuffer *fb = drawable->driverPrivate;
 268    struct intel_renderbuffer *rb;
 269    struct intel_context *intel = context->driverPrivate;
 270    __DRIbuffer *buffers = NULL;
 271    unsigned *attachments = NULL;
 272    int i, count;
 273    const char *region_name;
 274
 275    bool try_separate_stencil =
 276       intel->has_separate_stencil &&
 277       intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
 278       intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
 279       intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
 280       intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
 281
 282    assert(!intel->must_use_separate_stencil || try_separate_stencil);
 283
 284    /* If we're rendering to the fake front buffer, make sure all the
 285     * pending drawing has landed on the real front buffer.  Otherwise
 286     * when we eventually get to DRI2GetBuffersWithFormat the stale
 287     * real front buffer contents will get copied to the new fake front
 288     * buffer.
 289     */
 290    if (intel->is_front_buffer_rendering) {
 291       intel_flush(&intel->ctx);
 292       intel_flush_front(&intel->ctx);
 293    }
 294
 295    /* Set this up front, so that in case our buffers get invalidated
 296     * while we're getting new buffers, we don't clobber the stamp and
 297     * thus ignore the invalidate. */
 298    drawable->lastStamp = drawable->dri2.stamp;
 299
 300    if (unlikely(INTEL_DEBUG & DEBUG_DRI))
 301       fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
 302
 303    if (try_separate_stencil) {
 304       intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
 305                                                      &attachments, &count);
 306    } else {
 307       intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
 308                                                    &count);
 309    }
 310
 311    if (buffers == NULL)
 312       return;
 313
 314    for (i = 0; i < count; i++) {
 315        switch (buffers[i].attachment) {
 316        case __DRI_BUFFER_FRONT_LEFT:
 317            rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
 318            region_name = "dri2 front buffer";
 319            break;
 320
 321        case __DRI_BUFFER_FAKE_FRONT_LEFT:
 322            rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
 323            region_name = "dri2 fake front buffer";
 324            break;
 325
 326        case __DRI_BUFFER_BACK_LEFT:
 327            rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
 328            region_name = "dri2 back buffer";
 329            break;
 330
 331        case __DRI_BUFFER_DEPTH:
 332            rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
 333            region_name = "dri2 depth buffer";
 334            break;
 335
 336        case __DRI_BUFFER_HIZ:
 337            /* The hiz region resides in the depth renderbuffer. */
 338            rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
 339            region_name = "dri2 hiz buffer";
 340            break;
 341
 342        case __DRI_BUFFER_DEPTH_STENCIL:
 343            rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
 344            region_name = "dri2 depth / stencil buffer";
 345            break;
 346
 347        case __DRI_BUFFER_STENCIL:
 348            rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
 349            region_name = "dri2 stencil buffer";
 350            break;
 351
 352        case __DRI_BUFFER_ACCUM:
 353        default:
 354            fprintf(stderr,
 355                    "unhandled buffer attach event, attachment type %d\n",
 356                    buffers[i].attachment);
 357            return;
 358        }
 359
 360        if (try_separate_stencil) {
 361          intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
 362                                                          &buffers[i], rb,
 363                                                          region_name);
 364        } else {
 365          intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
 366                                                        &buffers[i], rb,
 367                                                        region_name);
 368        }
 369    }
 370
 371    if (try_separate_stencil
 372        && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
 373       intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
 374                                 &count);
 375    }
 376
 377    if (attachments)
 378       free(attachments);
 379
 380    driUpdateFramebufferSize(&intel->ctx, drawable);
 381 }
 382
 383 /**
 384  * intel_prepare_render should be called anywhere that curent read/drawbuffer
 385  * state is required.
 386  */
 387 void
 388 intel_prepare_render(struct intel_context *intel)
 389 {
 390    __DRIcontext *driContext = intel->driContext;
 391    __DRIdrawable *drawable;
 392
 393    drawable = driContext->driDrawablePriv;
 394    if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
 395       if (drawable->lastStamp != drawable->dri2.stamp)
 396          intel_update_renderbuffers(driContext, drawable);
 397       intel_draw_buffer(&intel->ctx);
 398       driContext->dri2.draw_stamp = drawable->dri2.stamp;
 399    }
 400
 401    drawable = driContext->driReadablePriv;
 402    if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
 403       if (drawable->lastStamp != drawable->dri2.stamp)
 404          intel_update_renderbuffers(driContext, drawable);
 405       driContext->dri2.read_stamp = drawable->dri2.stamp;
 406    }
 407
 408    /* If we're currently rendering to the front buffer, the rendering
 409     * that will happen next will probably dirty the front buffer.  So
 410     * mark it as dirty here.
 411     */
 412    if (intel->is_front_buffer_rendering)
 413       intel->front_buffer_dirty = true;
 414
 415    /* Wait for the swapbuffers before the one we just emitted, so we
 416     * don't get too many swaps outstanding for apps that are GPU-heavy
 417     * but not CPU-heavy.
 418     *
 419     * We're using intelDRI2Flush (called from the loader before
 420     * swapbuffer) and glFlush (for front buffer rendering) as the
 421     * indicator that a frame is done and then throttle when we get
 422     * here as we prepare to render the next frame.  At this point for
 423     * round trips for swap/copy and getting new buffers are done and
 424     * we'll spend less time waiting on the GPU.
 425     *
 426     * Unfortunately, we don't have a handle to the batch containing
 427     * the swap, and getting our hands on that doesn't seem worth it,
 428     * so we just us the first batch we emitted after the last swap.
 429     */
 430    if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
 431       drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
 432       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
 433       intel->first_post_swapbuffers_batch = NULL;
 434       intel->need_throttle = false;
 435    }
 436 }
 437
 438 static void
 439 intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 440 {
 441     struct intel_context *intel = intel_context(ctx);
 442     __DRIcontext *driContext = intel->driContext;
 443
 444     if (intel->saved_viewport)
 445         intel->saved_viewport(ctx, x, y, w, h);
 446
 447     if (ctx->DrawBuffer->Name == 0) {
 448        dri2InvalidateDrawable(driContext->driDrawablePriv);
 449        dri2InvalidateDrawable(driContext->driReadablePriv);
 450     }
 451 }
 452
 453 static const struct dri_debug_control debug_control[] = {
 454    { "tex",   DEBUG_TEXTURE},
 455    { "state", DEBUG_STATE},
 456    { "ioctl", DEBUG_IOCTL},
 457    { "blit",  DEBUG_BLIT},
 458    { "mip",   DEBUG_MIPTREE},
 459    { "fall",  DEBUG_FALLBACKS},
 460    { "verb",  DEBUG_VERBOSE},
 461    { "bat",   DEBUG_BATCH},
 462    { "pix",   DEBUG_PIXEL},
 463    { "buf",   DEBUG_BUFMGR},
 464    { "reg",   DEBUG_REGION},
 465    { "fbo",   DEBUG_FBO},
 466    { "gs",    DEBUG_GS},
 467    { "sync",  DEBUG_SYNC},
 468    { "prim",  DEBUG_PRIMS },
 469    { "vert",  DEBUG_VERTS },
 470    { "dri",   DEBUG_DRI },
 471    { "sf",    DEBUG_SF },
 472    { "san",   DEBUG_SANITY },
 473    { "sleep", DEBUG_SLEEP },
 474    { "stats", DEBUG_STATS },
 475    { "tile",  DEBUG_TILE },
 476    { "wm",    DEBUG_WM },
 477    { "urb",   DEBUG_URB },
 478    { "vs",    DEBUG_VS },
 479    { "clip",  DEBUG_CLIP },
 480    { NULL,    0 }
 481 };
 482
 483
 484 static void
 485 intelInvalidateState(struct gl_context * ctx, GLuint new_state)
 486 {
 487     struct intel_context *intel = intel_context(ctx);
 488
 489    _swrast_InvalidateState(ctx, new_state);
 490    _vbo_InvalidateState(ctx, new_state);
 491
 492    intel->NewGLState |= new_state;
 493
 494    if (intel->vtbl.invalidate_state)
 495       intel->vtbl.invalidate_state( intel, new_state );
 496 }
 497
 498 void
 499 intel_flush_rendering_to_batch(struct gl_context *ctx)
 500 {
 501    struct intel_context *intel = intel_context(ctx);
 502
 503    if (intel->Fallback)
 504       _swrast_flush(ctx);
 505
 506    if (intel->gen < 4)
 507       INTEL_FIREVERTICES(intel);
 508 }
 509
 510 void
 511 _intel_flush(struct gl_context *ctx, const char *file, int line)
 512 {
 513    struct intel_context *intel = intel_context(ctx);
 514
 515    intel_flush_rendering_to_batch(ctx);
 516
 517    if (intel->batch.used)
 518       _intel_batchbuffer_flush(intel, file, line);
 519 }
 520
 521 static void
 522 intel_glFlush(struct gl_context *ctx)
 523 {
 524    struct intel_context *intel = intel_context(ctx);
 525
 526    intel_flush(ctx);
 527    intel_flush_front(ctx);
 528    if (intel->is_front_buffer_rendering)
 529       intel->need_throttle = true;
 530 }
 531
 532 void
 533 intelFinish(struct gl_context * ctx)
 534 {
 535    struct intel_context *intel = intel_context(ctx);
 536
 537    intel_flush(ctx);
 538    intel_flush_front(ctx);
 539
 540    if (intel->batch.last_bo)
 541       drm_intel_bo_wait_rendering(intel->batch.last_bo);
 542 }
 543
 544 void
 545 intelInitDriverFunctions(struct dd_function_table *functions)
 546 {
 547    _mesa_init_driver_functions(functions);
 548
 549    functions->Flush = intel_glFlush;
 550    functions->Finish = intelFinish;
 551    functions->GetString = intelGetString;
 552    functions->UpdateState = intelInvalidateState;
 553
 554    intelInitTextureFuncs(functions);
 555    intelInitTextureImageFuncs(functions);
 556    intelInitTextureSubImageFuncs(functions);
 557    intelInitTextureCopyImageFuncs(functions);
 558    intelInitStateFuncs(functions);
 559    intelInitClearFuncs(functions);
 560    intelInitBufferFuncs(functions);
 561    intelInitPixelFuncs(functions);
 562    intelInitBufferObjectFuncs(functions);
 563    intel_init_syncobj_functions(functions);
 564 }
 565
 566 bool
 567 intelInitContext(struct intel_context *intel,
 568                  int api,
 569                  const struct gl_config * mesaVis,
 570                  __DRIcontext * driContextPriv,
 571                  void *sharedContextPrivate,
 572                  struct dd_function_table *functions)
 573 {
 574    struct gl_context *ctx = &intel->ctx;
 575    struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
 576    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 577    struct intel_screen *intelScreen = sPriv->driverPrivate;
 578    int bo_reuse_mode;
 579    struct gl_config visual;
 580
 581    /* we can't do anything without a connection to the device */
 582    if (intelScreen->bufmgr == NULL)
 583       return false;
 584
 585    /* Can't rely on invalidate events, fall back to glViewport hack */
 586    if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
 587       intel->saved_viewport = functions->Viewport;
 588       functions->Viewport = intel_viewport;
 589    }
 590
 591    if (mesaVis == NULL) {
 592       memset(&visual, 0, sizeof visual);
 593       mesaVis = &visual;
 594    }
 595
 596    if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
 597                                  functions, (void *) intel)) {
 598       printf("%s: failed to init mesa context\n", __FUNCTION__);
 599       return false;
 600    }
 601
 602    driContextPriv->driverPrivate = intel;
 603    intel->intelScreen = intelScreen;
 604    intel->driContext = driContextPriv;
 605    intel->driFd = sPriv->fd;
 606
 607    intel->gen = intelScreen->gen;
 608
 609    const int devID = intelScreen->deviceID;
 610
 611    if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID))
 612       intel->gt = 1;
 613    else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID))
 614       intel->gt = 2;
 615    else
 616       intel->gt = 0;
 617
 618    if (IS_G4X(devID)) {
 619       intel->is_g4x = true;
 620    } else if (IS_945(devID)) {
 621       intel->is_945 = true;
 622    }
 623
 624    if (intel->gen >= 5) {
 625       intel->needs_ff_sync = true;
 626    }
 627
 628    intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
 629    intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
 630    intel->has_hiz = intel->intelScreen->hw_has_hiz;
 631    intel->has_llc = intel->intelScreen->hw_has_llc;
 632    intel->has_swizzling = intel->intelScreen->hw_has_swizzling;
 633
 634    memset(&ctx->TextureFormatSupported,
 635           0, sizeof(ctx->TextureFormatSupported));
 636
 637    driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
 638                        sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
 639    if (intel->gen < 4)
 640       intel->maxBatchSize = 4096;
 641    else
 642       intel->maxBatchSize = sizeof(intel->batch.map);
 643
 644    intel->bufmgr = intelScreen->bufmgr;
 645
 646    bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
 647    switch (bo_reuse_mode) {
 648    case DRI_CONF_BO_REUSE_DISABLED:
 649       break;
 650    case DRI_CONF_BO_REUSE_ALL:
 651       intel_bufmgr_gem_enable_reuse(intel->bufmgr);
 652       break;
 653    }
 654
 655    /* This doesn't yet catch all non-conformant rendering, but it's a
 656     * start.
 657     */
 658    if (getenv("INTEL_STRICT_CONFORMANCE")) {
 659       unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
 660       if (value > 0) {
 661          intel->conformance_mode = value;
 662       }
 663       else {
 664          intel->conformance_mode = 1;
 665       }
 666    }
 667
 668    if (intel->conformance_mode > 0) {
 669       ctx->Const.MinLineWidth = 1.0;
 670       ctx->Const.MinLineWidthAA = 1.0;
 671       ctx->Const.MaxLineWidth = 1.0;
 672       ctx->Const.MaxLineWidthAA = 1.0;
 673       ctx->Const.LineWidthGranularity = 1.0;
 674    }
 675    else {
 676       ctx->Const.MinLineWidth = 1.0;
 677       ctx->Const.MinLineWidthAA = 1.0;
 678       ctx->Const.MaxLineWidth = 5.0;
 679       ctx->Const.MaxLineWidthAA = 5.0;
 680       ctx->Const.LineWidthGranularity = 0.5;
 681    }
 682
 683    ctx->Const.MinPointSize = 1.0;
 684    ctx->Const.MinPointSizeAA = 1.0;
 685    ctx->Const.MaxPointSize = 255.0;
 686    ctx->Const.MaxPointSizeAA = 3.0;
 687    ctx->Const.PointSizeGranularity = 1.0;
 688
 689    ctx->Const.MaxSamples = 1.0;
 690
 691    if (intel->gen >= 6)
 692       ctx->Const.MaxClipPlanes = 8;
 693
 694    ctx->Const.StripTextureBorder = GL_TRUE;
 695
 696    /* reinitialize the context point state.
 697     * It depend on constants in __struct gl_contextRec::Const
 698     */
 699    _mesa_init_point(ctx);
 700
 701    if (intel->gen >= 4) {
 702       ctx->Const.sRGBCapable = true;
 703       if (MAX_WIDTH > 8192)
 704          ctx->Const.MaxRenderbufferSize = 8192;
 705    } else {
 706       if (MAX_WIDTH > 2048)
 707          ctx->Const.MaxRenderbufferSize = 2048;
 708    }
 709
 710    /* Initialize the software rasterizer and helper modules. */
 711    _swrast_CreateContext(ctx);
 712    _vbo_CreateContext(ctx);
 713    _tnl_CreateContext(ctx);
 714    _swsetup_CreateContext(ctx);
 715
 716    /* Configure swrast to match hardware characteristics: */
 717    _swrast_allow_pixel_fog(ctx, false);
 718    _swrast_allow_vertex_fog(ctx, true);
 719
 720    _mesa_meta_init(ctx);
 721
 722    intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
 723    intel->hw_stipple = 1;
 724
 725    /* XXX FBO: this doesn't seem to be used anywhere */
 726    switch (mesaVis->depthBits) {
 727    case 0:                     /* what to do in this case? */
 728    case 16:
 729       intel->polygon_offset_scale = 1.0;
 730       break;
 731    case 24:
 732       intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
 733       break;
 734    default:
 735       assert(0);
 736       break;
 737    }
 738
 739    if (intel->gen >= 4)
 740       intel->polygon_offset_scale /= 0xffff;
 741
 742    intel->RenderIndex = ~0;
 743
 744    switch (ctx->API) {
 745    case API_OPENGL:
 746       intelInitExtensions(ctx);
 747       break;
 748    case API_OPENGLES:
 749       intelInitExtensionsES1(ctx);
 750       break;
 751    case API_OPENGLES2:
 752       intelInitExtensionsES2(ctx);
 753       break;
 754    }
 755
 756    INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
 757    if (INTEL_DEBUG & DEBUG_BUFMGR)
 758       dri_bufmgr_set_debug(intel->bufmgr, true);
 759
 760    intel_batchbuffer_init(intel);
 761
 762    intel_fbo_init(intel);
 763
 764    intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
 765                                                "texture_tiling");
 766    intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
 767
 768    intel->prim.primitive = ~0;
 769
 770    /* Force all software fallbacks */
 771    if (driQueryOptionb(&intel->optionCache, "no_rast")) {
 772       fprintf(stderr, "disabling 3D rasterization\n");
 773       intel->no_rast = 1;
 774    }
 775
 776    if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
 777       fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
 778       intel->always_flush_batch = 1;
 779    }
 780
 781    if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
 782       fprintf(stderr, "flushing GPU caches before/after each draw call\n");
 783       intel->always_flush_cache = 1;
 784    }
 785
 786    return true;
 787 }
 788
 789 void
 790 intelDestroyContext(__DRIcontext * driContextPriv)
 791 {
 792    struct intel_context *intel =
 793       (struct intel_context *) driContextPriv->driverPrivate;
 794
 795    assert(intel);               /* should never be null */
 796    if (intel) {
 797       INTEL_FIREVERTICES(intel);
 798
 799       _mesa_meta_free(&intel->ctx);
 800
 801       intel->vtbl.destroy(intel);
 802
 803       _swsetup_DestroyContext(&intel->ctx);
 804       _tnl_DestroyContext(&intel->ctx);
 805       _vbo_DestroyContext(&intel->ctx);
 806
 807       _swrast_DestroyContext(&intel->ctx);
 808       intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
 809
 810       intel_batchbuffer_free(intel);
 811
 812       free(intel->prim.vb);
 813       intel->prim.vb = NULL;
 814       drm_intel_bo_unreference(intel->prim.vb_bo);
 815       intel->prim.vb_bo = NULL;
 816       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
 817       intel->first_post_swapbuffers_batch = NULL;
 818
 819       driDestroyOptionCache(&intel->optionCache);
 820
 821       /* free the Mesa context */
 822       _mesa_free_context_data(&intel->ctx);
 823
 824       _math_matrix_dtr(&intel->ViewportMatrix);
 825
 826       ralloc_free(intel);
 827       driContextPriv->driverPrivate = NULL;
 828    }
 829 }
 830
 831 GLboolean
 832 intelUnbindContext(__DRIcontext * driContextPriv)
 833 {
 834    /* Unset current context and dispath table */
 835    _mesa_make_current(NULL, NULL, NULL);
 836
 837    return true;
 838 }
 839
 840 GLboolean
 841 intelMakeCurrent(__DRIcontext * driContextPriv,
 842                  __DRIdrawable * driDrawPriv,
 843                  __DRIdrawable * driReadPriv)
 844 {
 845    struct intel_context *intel;
 846    GET_CURRENT_CONTEXT(curCtx);
 847
 848    if (driContextPriv)
 849       intel = (struct intel_context *) driContextPriv->driverPrivate;
 850    else
 851       intel = NULL;
 852
 853    /* According to the glXMakeCurrent() man page: "Pending commands to
 854     * the previous context, if any, are flushed before it is released."
 855     * But only flush if we're actually changing contexts.
 856     */
 857    if (intel_context(curCtx) && intel_context(curCtx) != intel) {
 858       _mesa_flush(curCtx);
 859    }
 860
 861    if (driContextPriv) {
 862       struct gl_framebuffer *fb, *readFb;
 863
 864       if (driDrawPriv == NULL && driReadPriv == NULL) {
 865          fb = _mesa_get_incomplete_framebuffer();
 866          readFb = _mesa_get_incomplete_framebuffer();
 867       } else {
 868          fb = driDrawPriv->driverPrivate;
 869          readFb = driReadPriv->driverPrivate;
 870          driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
 871          driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
 872       }
 873
 874       intel_prepare_render(intel);
 875       _mesa_make_current(&intel->ctx, fb, readFb);
 876
 877       /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
 878        * is NULL at that point.  We can't call _mesa_makecurrent()
 879        * first, since we need the buffer size for the initial
 880        * viewport.  So just call intel_draw_buffer() again here. */
 881       intel_draw_buffer(&intel->ctx);
 882    }
 883    else {
 884       _mesa_make_current(NULL, NULL, NULL);
 885    }
 886
 887    return true;
 888 }
 889
 890 /**
 891  * \brief Query DRI2 to obtain a DRIdrawable's buffers.
 892  *
 893  * To determine which DRI buffers to request, examine the renderbuffers
 894  * attached to the drawable's framebuffer. Then request the buffers with
 895  * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
 896  *
 897  * This is called from intel_update_renderbuffers(). It is used only if either
 898  * the hardware or the X driver lacks separate stencil support.
 899  *
 900  * \param drawable      Drawable whose buffers are queried.
 901  * \param buffers       [out] List of buffers returned by DRI2 query.
 902  * \param buffer_count  [out] Number of buffers returned.
 903  *
 904  * \see intel_update_renderbuffers()
 905  * \see DRI2GetBuffers()
 906  * \see DRI2GetBuffersWithFormat()
 907  */
 908 static void
 909 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
 910                                              __DRIdrawable *drawable,
 911                                              __DRIbuffer **buffers,
 912                                              int *buffer_count)
 913 {
 914    assert(!intel->must_use_separate_stencil);
 915
 916    __DRIscreen *screen = intel->intelScreen->driScrnPriv;
 917    struct gl_framebuffer *fb = drawable->driverPrivate;
 918
 919    if (screen->dri2.loader
 920        && screen->dri2.loader->base.version > 2
 921        && screen->dri2.loader->getBuffersWithFormat != NULL) {
 922
 923       int i = 0;
 924       const int max_attachments = 4;
 925       unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
 926
 927       struct intel_renderbuffer *front_rb;
 928       struct intel_renderbuffer *back_rb;
 929       struct intel_renderbuffer *depth_rb;
 930       struct intel_renderbuffer *stencil_rb;
 931
 932       front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
 933       back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
 934       depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
 935       stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
 936
 937       if ((intel->is_front_buffer_rendering ||
 938            intel->is_front_buffer_reading ||
 939            !back_rb) && front_rb) {
 940          attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
 941          attachments[i++] = intel_bits_per_pixel(front_rb);
 942       }
 943
 944       if (back_rb) {
 945          attachments[i++] = __DRI_BUFFER_BACK_LEFT;
 946          attachments[i++] = intel_bits_per_pixel(back_rb);
 947       }
 948
 949       if (depth_rb && stencil_rb) {
 950          attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
 951          attachments[i++] = intel_bits_per_pixel(depth_rb);
 952       } else if (depth_rb) {
 953          attachments[i++] = __DRI_BUFFER_DEPTH;
 954          attachments[i++] = intel_bits_per_pixel(depth_rb);
 955       } else if (stencil_rb) {
 956          attachments[i++] = __DRI_BUFFER_STENCIL;
 957          attachments[i++] = intel_bits_per_pixel(stencil_rb);
 958       }
 959
 960       assert(i <= 2 * max_attachments);
 961
 962       *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
 963                                                            &drawable->w,
 964                                                            &drawable->h,
 965                                                            attachments, i / 2,
 966                                                            buffer_count,
 967                                                            drawable->loaderPrivate);
 968       free(attachments);
 969
 970    } else if (screen->dri2.loader) {
 971
 972       int i = 0;
 973       const int max_attachments = 4;
 974       unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
 975
 976       if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
 977          attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
 978       if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
 979          attachments[i++] = __DRI_BUFFER_BACK_LEFT;
 980       if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
 981          attachments[i++] = __DRI_BUFFER_DEPTH;
 982       if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
 983          attachments[i++] = __DRI_BUFFER_STENCIL;
 984
 985       assert(i <= max_attachments);
 986
 987       *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
 988                                                            &drawable->w,
 989                                                            &drawable->h,
 990                                                            attachments, i,
 991                                                            buffer_count,
 992                                                            drawable->loaderPrivate);
 993       free(attachments);
 994
 995    } else {
 996       *buffers = NULL;
 997       *buffer_count = 0;
 998    }
 999 }
1000
1001 /**
1002  * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1003  *
1004  * This is called from intel_update_renderbuffers().  It is used only if
1005  * either the hardware or the X driver lacks separate stencil support.
1006  *
1007  * \par Note:
1008  *    DRI buffers whose attachment point is DRI2BufferStencil or
1009  *    DRI2BufferDepthStencil are handled as special cases.
1010  *
1011  * \param buffer_name is a human readable name, such as "dri2 front buffer",
1012  *        that is passed to intel_region_alloc_for_handle().
1013  *
1014  * \see intel_update_renderbuffers()
1015  * \see intel_region_alloc_for_handle()
1016  */
1017 static void
1018 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1019                                               __DRIdrawable *drawable,
1020                                               __DRIbuffer *buffer,
1021                                               struct intel_renderbuffer *rb,
1022                                               const char *buffer_name)
1023 {
1024    assert(!intel->must_use_separate_stencil);
1025
1026    struct gl_framebuffer *fb = drawable->driverPrivate;
1027    struct intel_renderbuffer *depth_rb = NULL;
1028
1029    if (!rb)
1030       return;
1031
1032    if (rb->mt &&
1033        rb->mt->region &&
1034        rb->mt->region->name == buffer->name)
1035       return;
1036
1037    if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1038       fprintf(stderr,
1039               "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1040               buffer->name, buffer->attachment,
1041               buffer->cpp, buffer->pitch);
1042    }
1043
1044    bool identify_depth_and_stencil = false;
1045    if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1046       struct intel_renderbuffer *depth_rb =
1047          intel_get_renderbuffer(fb, BUFFER_DEPTH);
1048       identify_depth_and_stencil = depth_rb && depth_rb->mt;
1049    }
1050
1051    if (identify_depth_and_stencil) {
1052       if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1053          fprintf(stderr, "(reusing depth buffer as stencil)\n");
1054       }
1055       intel_miptree_reference(&rb->mt, depth_rb->mt);
1056    } else {
1057       intel_miptree_release(&rb->mt);
1058       struct intel_region *region =
1059                    intel_region_alloc_for_handle(intel->intelScreen,
1060                                                  buffer->cpp,
1061                                                  drawable->w,
1062                                                  drawable->h,
1063                                                  buffer->pitch / buffer->cpp,
1064                                                  buffer->name,
1065                                                  buffer_name);
1066       if (!region)
1067          return;
1068
1069       rb->mt = intel_miptree_create_for_region(intel,
1070                                                GL_TEXTURE_2D,
1071                                                intel_rb_format(rb),
1072                                                region);
1073       intel_region_release(&region);
1074       if (!rb->mt)
1075          return;
1076    }
1077
1078    if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1079       struct intel_renderbuffer *stencil_rb =
1080          intel_get_renderbuffer(fb, BUFFER_STENCIL);
1081
1082       if (!stencil_rb)
1083          return;
1084
1085       /* The rb passed in is the BUFFER_DEPTH attachment, and we need
1086        * to associate this region to BUFFER_STENCIL as well.
1087        */
1088       intel_miptree_reference(&stencil_rb->mt, rb->mt);
1089    }
1090 }
1091
1092 /**
1093  * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1094  *
1095  * To determine which DRI buffers to request, examine the renderbuffers
1096  * attached to the drawable's framebuffer. Then request the buffers with
1097  * DRI2GetBuffersWithFormat().
1098  *
1099  * This is called from intel_update_renderbuffers(). It is used when 1) the
1100  * hardware supports separate stencil and 2) the X driver's separate stencil
1101  * support has been verified to work or is still unknown.
1102  *
1103  * \param drawable      Drawable whose buffers are queried.
1104  * \param buffers       [out] List of buffers returned by DRI2 query.
1105  * \param buffer_count  [out] Number of buffers returned.
1106  * \param attachments   [out] List of pairs (attachment_point, bits_per_pixel)
1107  *                      that were submitted in the DRI2 query. Number of pairs
1108  *                      is same as buffer_count.
1109  *
1110  * \see intel_update_renderbuffers()
1111  * \see DRI2GetBuffersWithFormat()
1112  * \see enum intel_dri2_has_hiz
1113  */
1114 static void
1115 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1116                                                __DRIdrawable *drawable,
1117                                                __DRIbuffer **buffers,
1118                                                unsigned **attachments,
1119                                                int *count)
1120 {
1121    assert(intel->has_separate_stencil);
1122
1123    __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1124    struct gl_framebuffer *fb = drawable->driverPrivate;
1125
1126    const int max_attachments = 5;
1127    int i = 0;
1128
1129    *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1130    if (!*attachments) {
1131       *buffers = NULL;
1132       *count = 0;
1133       return;
1134    }
1135
1136    struct intel_renderbuffer *front_rb;
1137    struct intel_renderbuffer *back_rb;
1138    struct intel_renderbuffer *depth_rb;
1139    struct intel_renderbuffer *stencil_rb;
1140
1141    front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1142    back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1143    depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1144    stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1145
1146    if ((intel->is_front_buffer_rendering ||
1147         intel->is_front_buffer_reading ||
1148         !back_rb) && front_rb) {
1149       (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1150       (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1151    }
1152
1153    if (back_rb) {
1154       (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1155       (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1156    }
1157
1158    /*
1159     * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1160     * if we do not yet know if the X driver supports it. See the comments for
1161     * 'enum intel_dri2_has_hiz'.
1162     */
1163
1164    if (depth_rb) {
1165       (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1166       (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1167
1168       if (intel->vtbl.is_hiz_depth_format(intel, intel_rb_format(depth_rb))) {
1169          /* Depth and hiz buffer have same bpp. */
1170          (*attachments)[i++] = __DRI_BUFFER_HIZ;
1171          (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1172       }
1173    }
1174
1175    if (stencil_rb) {
1176       assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8);
1177       (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1178       (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1179    }
1180
1181    assert(i <= 2 * max_attachments);
1182
1183    *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1184                                                         &drawable->w,
1185                                                         &drawable->h,
1186                                                         *attachments, i / 2,
1187                                                         count,
1188                                                         drawable->loaderPrivate);
1189
1190    if (!*buffers) {
1191       free(*attachments);
1192       *attachments = NULL;
1193       *count = 0;
1194    }
1195 }
1196
1197 /**
1198  * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1199  *
1200  * This is called from intel_update_renderbuffers().  It is used when 1) the
1201  * hardware supports separate stencil and 2) the X driver's separate stencil
1202  * support has been verified to work or is still unknown.
1203  *
1204  * \par Note:
1205  *    DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1206  *    are handled as special cases.
1207  *
1208  * \param buffer_name is a human readable name, such as "dri2 front buffer",
1209  *        that is passed to intel_region_alloc_for_handle().
1210  *
1211  * \see intel_update_renderbuffers()
1212  * \see intel_region_alloc_for_handle()
1213  * \see enum intel_dri2_has_hiz
1214  */
1215 static void
1216 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1217                                                 __DRIdrawable *drawable,
1218                                                 __DRIbuffer *buffer,
1219                                                 struct intel_renderbuffer *rb,
1220                                                 const char *buffer_name)
1221 {
1222    assert(intel->has_separate_stencil);
1223    assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1224
1225    if (!rb)
1226       return;
1227
1228    /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1229    if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1230         rb->mt &&
1231         rb->mt->region &&
1232         rb->mt->region->name == buffer->name) ||
1233        (buffer->attachment == __DRI_BUFFER_HIZ &&
1234         rb->mt &&
1235         rb->mt->hiz_mt &&
1236         rb->mt->hiz_mt->region->name == buffer->name)) {
1237       return;
1238    }
1239
1240    if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1241       fprintf(stderr,
1242               "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1243               buffer->name, buffer->attachment,
1244               buffer->cpp, buffer->pitch);
1245    }
1246
1247    int buffer_width;
1248    int buffer_height;
1249    if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1250       /* The stencil buffer has quirky pitch requirements.  From Section
1251        * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1252        *    The pitch must be set to 2x the value computed based on width, as
1253        *    the stencil buffer is stored with two rows interleaved.
1254        *
1255        * To satisfy the pitch requirement, the X driver allocated the region
1256        * with the following dimensions.
1257        */
1258        buffer_width = ALIGN(drawable->w, 64);
1259        buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64);
1260    } else {
1261        buffer_width = drawable->w;
1262        buffer_height = drawable->h;
1263    }
1264
1265    /* Release the buffer storage now in case we have to return early
1266     * due to failure to allocate new storage.
1267     */
1268    if (buffer->attachment == __DRI_BUFFER_HIZ) {
1269       intel_miptree_release(&rb->mt->hiz_mt);
1270    } else {
1271       intel_miptree_release(&rb->mt);
1272    }
1273
1274    struct intel_region *region =
1275       intel_region_alloc_for_handle(intel->intelScreen,
1276                                     buffer->cpp,
1277                                     buffer_width,
1278                                     buffer_height,
1279                                     buffer->pitch / buffer->cpp,
1280                                     buffer->name,
1281                                     buffer_name);
1282    if (!region)
1283       return;
1284
1285    struct intel_mipmap_tree *mt =
1286       intel_miptree_create_for_region(intel,
1287                                       GL_TEXTURE_2D,
1288                                       intel_rb_format(rb),
1289                                       region);
1290    intel_region_release(&region);
1291
1292    /* Associate buffer with new storage. */
1293    if (buffer->attachment == __DRI_BUFFER_HIZ) {
1294       rb->mt->hiz_mt = mt;
1295    } else {
1296       rb->mt = mt;
1297    }
1298 }
1299
1300 /**
1301  * \brief Verify that the X driver supports hiz and separate stencil.
1302  *
1303  * This implements the cleanup stage of the handshake described in the
1304  * comments for 'enum intel_dri2_has_hiz'.
1305  *
1306  * This should be called from intel_update_renderbuffers() after 1) the
1307  * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1308  * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1309  * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1310  * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1311  * stencil functionality and 2) it has not yet been determined if the X driver
1312  * supports separate stencil.
1313  *
1314  * If we determine that the X driver does have support, then we set
1315  * intel_screen.dri2_has_hiz to true and return.
1316  *
1317  * If we determine that the X driver lacks support, and we requested
1318  * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1319  * taking the following actions:
1320  *    1. Discard the framebuffer's stencil and depth renderbuffers.
1321  *    2. Create a combined depth/stencil renderbuffer and attach
1322  *       it to the framebuffer's depth and stencil attachment points.
1323  *    3. Query the drawable for a new set of buffers, which consists of the
1324  *       originally requested set plus DRI2BufferDepthStencil.
1325  *    4. Assign the DRI2BufferDepthStencil's DRM region to the new
1326  *       depth/stencil renderbuffer.
1327  *
1328  * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1329  *
1330  * \param drawable      Drawable whose buffers were queried.
1331  *
1332  * \param buffers       [in/out] As input, the buffer list returned by the
1333  *                      original DRI2 query. As output, the current buffer
1334  *                      list, which may have been altered by a new DRI2 query.
1335  *
1336  * \param attachments   [in/out] As input, the attachment list submitted
1337  *                      in the original DRI2 query. As output, the attachment
1338  *                      list that was submitted in the DRI2 query that
1339  *                      obtained the current buffer list, as returned in the
1340  *                      output parameter \c buffers.  (Note: If no new query
1341  *                      was made, then the list remains unaltered).
1342  *
1343  * \param count         [out] Number of buffers in the current buffer list, as
1344  *                      returned in the output parameter \c buffers.
1345  *
1346  * \see enum intel_dri2_has_hiz
1347  * \see struct intel_screen::dri2_has_hiz
1348  * \see intel_update_renderbuffers
1349  */
1350 static void
1351 intel_verify_dri2_has_hiz(struct intel_context *intel,
1352                           __DRIdrawable *drawable,
1353                           __DRIbuffer **buffers,
1354                           unsigned **attachments,
1355                           int *count)
1356 {
1357    assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1358
1359    struct gl_framebuffer *fb = drawable->driverPrivate;
1360    struct intel_renderbuffer *stencil_rb =
1361       intel_get_renderbuffer(fb, BUFFER_STENCIL);
1362
1363    if (stencil_rb) {
1364       /*
1365        * We requested a DRI2BufferStencil without knowing if the X driver
1366        * supports it. Now, check if X handled the request correctly and clean
1367        * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1368        */
1369       struct intel_renderbuffer *depth_rb =
1370          intel_get_renderbuffer(fb, BUFFER_DEPTH);
1371       assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8);
1372       assert(depth_rb && intel_rb_format(depth_rb) == MESA_FORMAT_X8_Z24);
1373
1374       if (stencil_rb->mt->region->tiling == I915_TILING_NONE) {
1375          /*
1376           * The stencil buffer is actually W tiled. The region's tiling is
1377           * I915_TILING_NONE, however, because the GTT is incapable of W
1378           * fencing.
1379           */
1380          intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1381          return;
1382       } else {
1383          /*
1384           * Oops... the screen doesn't support separate stencil. Discard the
1385           * separate depth and stencil buffers and replace them with
1386           * a combined depth/stencil buffer. Discard the hiz buffer too.
1387           */
1388          intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1389          if (intel->must_use_separate_stencil) {
1390             _mesa_problem(&intel->ctx,
1391                           "intel_context requires separate stencil, but the "
1392                           "DRIscreen does not support it. You may need to "
1393                           "upgrade the Intel X driver to 2.16.0");
1394             abort();
1395          }
1396
1397          /* 1. Discard depth and stencil renderbuffers. */
1398          _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1399          depth_rb = NULL;
1400          _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1401          stencil_rb = NULL;
1402
1403          /* 2. Create new depth/stencil renderbuffer. */
1404          struct intel_renderbuffer *depth_stencil_rb =
1405             intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1406          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base.Base);
1407          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base.Base);
1408
1409          /* 3. Append DRI2BufferDepthStencil to attachment list. */
1410          int old_count = *count;
1411          unsigned int *old_attachments = *attachments;
1412          *count = old_count + 1;
1413          *attachments = malloc(2 * (*count) * sizeof(unsigned));
1414          memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1415          free(old_attachments);
1416          (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1417          (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1418
1419          /* 4. Request new set of DRI2 attachments. */
1420          __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1421          *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1422                                                               &drawable->w,
1423                                                               &drawable->h,
1424                                                               *attachments,
1425                                                               *count,
1426                                                               count,
1427                                                               drawable->loaderPrivate);
1428          if (!*buffers)
1429             return;
1430
1431          /*
1432           * I don't know how to recover from the failure assertion below.
1433           * Rather than fail gradually and unexpectedly, we should just die
1434           * now.
1435           */
1436          assert(*count == old_count + 1);
1437
1438          /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1439          __DRIbuffer *depth_stencil_buffer = NULL;
1440          for (int i = 0; i < *count; ++i) {
1441             if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1442                depth_stencil_buffer = &(*buffers)[i];
1443                break;
1444             }
1445          }
1446          struct intel_region *region =
1447             intel_region_alloc_for_handle(intel->intelScreen,
1448                                           depth_stencil_buffer->cpp,
1449                                           drawable->w,
1450                                           drawable->h,
1451                                           depth_stencil_buffer->pitch
1452                                              / depth_stencil_buffer->cpp,
1453                                           depth_stencil_buffer->name,
1454                                           "dri2 depth / stencil buffer");
1455          if (!region)
1456             return;
1457
1458          struct intel_mipmap_tree *mt =
1459                intel_miptree_create_for_region(intel,
1460                                                GL_TEXTURE_2D,
1461                                                intel_rb_format(depth_stencil_rb),
1462                                                region);
1463          intel_region_release(&region);
1464          if (!mt)
1465             return;
1466
1467          intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->mt, mt);
1468          intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->mt, mt);
1469          intel_miptree_release(&mt);
1470       }
1471    }
1472
1473    if (intel_framebuffer_has_hiz(fb)) {
1474       /*
1475        * In the future, the driver may advertise a GL config with hiz
1476        * compatible depth bits and 0 stencil bits (for example, when the
1477        * driver gains support for float32 depth buffers). When that day comes,
1478        * here we need to verify that the X driver does in fact support hiz and
1479        * clean up if it doesn't.
1480        *
1481        * Presently, however, no verification or clean up is necessary, and
1482        * execution should not reach here. If the framebuffer still has a hiz
1483        * region, then we have already set dri2_has_hiz to true after
1484        * confirming above that the stencil buffer is W tiled.
1485        */
1486       assert(0);
1487    }
1488 }