1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/hash.h"
34 #include "main/fbobject.h"
35 #include "main/mfeatures.h"
36 #include "main/version.h"
37 #include "swrast/s_renderbuffer.h"
42 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_SECTION_PERFORMANCE
45 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
46 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
47 * DRI_CONF_BO_REUSE_ALL
49 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
50 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
51 DRI_CONF_ENUM(0, "Disable buffer object reuse")
52 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
56 DRI_CONF_OPT_BEGIN(texture_tiling, bool, true)
57 DRI_CONF_DESC(en, "Enable texture tiling")
60 DRI_CONF_OPT_BEGIN(hiz, bool, true)
61 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
64 DRI_CONF_OPT_BEGIN(early_z, bool, false)
65 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
68 DRI_CONF_OPT_BEGIN(fragment_shader, bool, true)
69 DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.")
73 DRI_CONF_SECTION_QUALITY
74 DRI_CONF_FORCE_S3TC_ENABLE(false)
75 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
77 DRI_CONF_SECTION_DEBUG
78 DRI_CONF_NO_RAST(false)
79 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
80 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
81 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
82 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
84 DRI_CONF_OPT_BEGIN(stub_occlusion_query, bool, false)
85 DRI_CONF_DESC(en, "Enable stub ARB_occlusion_query support on 915/945.")
88 DRI_CONF_OPT_BEGIN(shader_precompile, bool, true)
89 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
94 const GLuint __driNConfigOptions = 15;
96 #include "intel_batchbuffer.h"
97 #include "intel_buffers.h"
98 #include "intel_bufmgr.h"
99 #include "intel_chipset.h"
100 #include "intel_fbo.h"
101 #include "intel_mipmap_tree.h"
102 #include "intel_screen.h"
103 #include "intel_tex.h"
104 #include "intel_regions.h"
106 #include "i915_drm.h"
108 #ifdef USE_NEW_INTERFACE
109 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
110 #endif /*USE_NEW_INTERFACE */
113 * For debugging purposes, this returns a time in seconds.
120 clock_gettime(CLOCK_MONOTONIC, &tp);
122 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
126 aub_dump_bmp(struct gl_context *ctx)
128 struct gl_framebuffer *fb = ctx->DrawBuffer;
130 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
131 struct intel_renderbuffer *irb =
132 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
134 if (irb && irb->mt) {
135 enum aub_dump_bmp_format format;
137 switch (irb->Base.Base.Format) {
138 case MESA_FORMAT_ARGB8888:
139 case MESA_FORMAT_XRGB8888:
140 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
146 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
149 irb->Base.Base.Width,
150 irb->Base.Base.Height,
152 irb->mt->region->pitch *
153 irb->mt->region->cpp,
159 static const __DRItexBufferExtension intelTexBufferExtension = {
160 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
166 intelDRI2Flush(__DRIdrawable *drawable)
168 GET_CURRENT_CONTEXT(ctx);
169 struct intel_context *intel = intel_context(ctx);
174 INTEL_FIREVERTICES(intel);
176 intel_downsample_for_dri2_flush(intel, drawable);
177 intel->need_throttle = true;
179 if (intel->batch.used)
180 intel_batchbuffer_flush(intel);
182 if (INTEL_DEBUG & DEBUG_AUB) {
187 static const struct __DRI2flushExtensionRec intelFlushExtension = {
188 { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
190 dri2InvalidateDrawable,
193 struct intel_image_format intel_image_formats[] = {
194 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
195 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
197 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
198 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
200 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
201 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
202 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
203 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
205 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
206 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
207 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
208 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
210 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
212 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
213 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
215 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
216 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
217 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
218 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
220 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
221 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
222 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
223 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
225 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
226 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
227 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
229 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
230 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
231 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
233 /* For YUYV buffers, we set up two overlapping DRI images and treat
234 * them as planar buffers in the compositors. Plane 0 is GR88 and
235 * samples YU or YV pairs and places Y into the R component, while
236 * plane 1 is ARGB and samples YUYV clusters and places pairs and
237 * places U into the G component and V into A. This lets the
238 * texture sampler interpolate the Y components correctly when
239 * sampling from plane 0, and interpolate U and V correctly when
240 * sampling from plane 1. */
241 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
242 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
243 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
247 intel_allocate_image(int dri_format, void *loaderPrivate)
251 image = CALLOC(sizeof *image);
255 image->dri_format = dri_format;
258 switch (dri_format) {
259 case __DRI_IMAGE_FORMAT_RGB565:
260 image->format = MESA_FORMAT_RGB565;
262 case __DRI_IMAGE_FORMAT_XRGB8888:
263 image->format = MESA_FORMAT_XRGB8888;
265 case __DRI_IMAGE_FORMAT_ARGB8888:
266 image->format = MESA_FORMAT_ARGB8888;
268 case __DRI_IMAGE_FORMAT_ABGR8888:
269 image->format = MESA_FORMAT_RGBA8888_REV;
271 case __DRI_IMAGE_FORMAT_XBGR8888:
272 image->format = MESA_FORMAT_RGBX8888_REV;
274 case __DRI_IMAGE_FORMAT_R8:
275 image->format = MESA_FORMAT_R8;
277 case __DRI_IMAGE_FORMAT_GR88:
278 image->format = MESA_FORMAT_GR88;
280 case __DRI_IMAGE_FORMAT_NONE:
281 image->format = MESA_FORMAT_NONE;
288 image->internal_format = _mesa_get_format_base_format(image->format);
289 image->data = loaderPrivate;
295 intel_create_image_from_name(__DRIscreen *screen,
296 int width, int height, int format,
297 int name, int pitch, void *loaderPrivate)
299 struct intel_screen *intelScreen = screen->driverPrivate;
303 image = intel_allocate_image(format, loaderPrivate);
304 if (image->format == MESA_FORMAT_NONE)
307 cpp = _mesa_get_format_bytes(image->format);
308 image->region = intel_region_alloc_for_handle(intelScreen,
310 pitch, name, "image");
311 if (image->region == NULL) {
320 intel_create_image_from_renderbuffer(__DRIcontext *context,
321 int renderbuffer, void *loaderPrivate)
324 struct intel_context *intel = context->driverPrivate;
325 struct gl_renderbuffer *rb;
326 struct intel_renderbuffer *irb;
328 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
330 _mesa_error(&intel->ctx,
331 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
335 irb = intel_renderbuffer(rb);
336 image = CALLOC(sizeof *image);
340 image->internal_format = rb->InternalFormat;
341 image->format = rb->Format;
343 image->data = loaderPrivate;
344 intel_region_reference(&image->region, irb->mt->region);
346 switch (image->format) {
347 case MESA_FORMAT_RGB565:
348 image->dri_format = __DRI_IMAGE_FORMAT_RGB565;
350 case MESA_FORMAT_XRGB8888:
351 image->dri_format = __DRI_IMAGE_FORMAT_XRGB8888;
353 case MESA_FORMAT_ARGB8888:
354 image->dri_format = __DRI_IMAGE_FORMAT_ARGB8888;
356 case MESA_FORMAT_RGBA8888_REV:
357 image->dri_format = __DRI_IMAGE_FORMAT_ABGR8888;
360 image->dri_format = __DRI_IMAGE_FORMAT_R8;
362 case MESA_FORMAT_RG88:
363 image->dri_format = __DRI_IMAGE_FORMAT_GR88;
371 intel_destroy_image(__DRIimage *image)
373 intel_region_release(&image->region);
378 intel_create_image(__DRIscreen *screen,
379 int width, int height, int format,
384 struct intel_screen *intelScreen = screen->driverPrivate;
388 tiling = I915_TILING_X;
389 if (use & __DRI_IMAGE_USE_CURSOR) {
390 if (width != 64 || height != 64)
392 tiling = I915_TILING_NONE;
395 image = intel_allocate_image(format, loaderPrivate);
396 cpp = _mesa_get_format_bytes(image->format);
398 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
399 if (image->region == NULL) {
408 intel_query_image(__DRIimage *image, int attrib, int *value)
411 case __DRI_IMAGE_ATTRIB_STRIDE:
412 *value = image->region->pitch * image->region->cpp;
414 case __DRI_IMAGE_ATTRIB_HANDLE:
415 *value = image->region->bo->handle;
417 case __DRI_IMAGE_ATTRIB_NAME:
418 return intel_region_flink(image->region, (uint32_t *) value);
419 case __DRI_IMAGE_ATTRIB_FORMAT:
420 *value = image->dri_format;
422 case __DRI_IMAGE_ATTRIB_WIDTH:
423 *value = image->region->width;
425 case __DRI_IMAGE_ATTRIB_HEIGHT:
426 *value = image->region->height;
428 case __DRI_IMAGE_ATTRIB_COMPONENTS:
429 if (image->planar_format == NULL)
431 *value = image->planar_format->components;
439 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
443 image = CALLOC(sizeof *image);
447 intel_region_reference(&image->region, orig_image->region);
448 if (image->region == NULL) {
453 image->internal_format = orig_image->internal_format;
454 image->planar_format = orig_image->planar_format;
455 image->dri_format = orig_image->dri_format;
456 image->format = orig_image->format;
457 image->offset = orig_image->offset;
458 image->data = loaderPrivate;
460 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
461 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
467 intel_validate_usage(__DRIimage *image, unsigned int use)
469 if (use & __DRI_IMAGE_USE_CURSOR) {
470 if (image->region->width != 64 || image->region->height != 64)
478 intel_create_image_from_names(__DRIscreen *screen,
479 int width, int height, int fourcc,
480 int *names, int num_names,
481 int *strides, int *offsets,
484 struct intel_image_format *f = NULL;
488 if (screen == NULL || names == NULL || num_names != 1)
491 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
492 if (intel_image_formats[i].fourcc == fourcc) {
493 f = &intel_image_formats[i];
500 image = intel_create_image_from_name(screen, width, height,
501 __DRI_IMAGE_FORMAT_NONE,
502 names[0], strides[0],
508 image->planar_format = f;
509 for (i = 0; i < f->nplanes; i++) {
510 index = f->planes[i].buffer_index;
511 image->offsets[index] = offsets[index];
512 image->strides[index] = strides[index];
519 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
521 int width, height, offset, stride, dri_format, cpp, index, pitch;
522 struct intel_image_format *f;
523 uint32_t mask_x, mask_y;
526 if (parent == NULL || parent->planar_format == NULL)
529 f = parent->planar_format;
531 if (plane >= f->nplanes)
534 width = parent->region->width >> f->planes[plane].width_shift;
535 height = parent->region->height >> f->planes[plane].height_shift;
536 dri_format = f->planes[plane].dri_format;
537 index = f->planes[plane].buffer_index;
538 offset = parent->offsets[index];
539 stride = parent->strides[index];
541 image = intel_allocate_image(dri_format, loaderPrivate);
542 cpp = _mesa_get_format_bytes(image->format); /* safe since no none format */
543 pitch = stride / cpp;
544 if (offset + height * cpp * pitch > parent->region->bo->size) {
545 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
550 image->region = calloc(sizeof(*image->region), 1);
551 if (image->region == NULL) {
556 image->region->cpp = _mesa_get_format_bytes(image->format);
557 image->region->width = width;
558 image->region->height = height;
559 image->region->pitch = pitch;
560 image->region->refcount = 1;
561 image->region->bo = parent->region->bo;
562 drm_intel_bo_reference(image->region->bo);
563 image->region->tiling = parent->region->tiling;
564 image->region->screen = parent->region->screen;
565 image->offset = offset;
567 intel_region_get_tile_masks(image->region, &mask_x, &mask_y);
570 "intel_create_sub_image: offset not on tile boundary");
575 static struct __DRIimageExtensionRec intelImageExtension = {
577 intel_create_image_from_name,
578 intel_create_image_from_renderbuffer,
583 intel_validate_usage,
584 intel_create_image_from_names,
588 static const __DRIextension *intelScreenExtensions[] = {
589 &intelTexBufferExtension.base,
590 &intelFlushExtension.base,
591 &intelImageExtension.base,
592 &dri2ConfigQueryExtension.base,
597 intel_get_param(__DRIscreen *psp, int param, int *value)
600 struct drm_i915_getparam gp;
602 memset(&gp, 0, sizeof(gp));
606 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
609 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
617 intel_get_boolean(__DRIscreen *psp, int param)
620 return intel_get_param(psp, param, &value) && value;
624 nop_callback(GLuint key, void *data, void *userData)
629 intelDestroyScreen(__DRIscreen * sPriv)
631 struct intel_screen *intelScreen = sPriv->driverPrivate;
633 dri_bufmgr_destroy(intelScreen->bufmgr);
634 driDestroyOptionInfo(&intelScreen->optionCache);
636 /* Some regions may still have references to them at this point, so
637 * flush the hash table to prevent _mesa_DeleteHashTable() from
638 * complaining about the hash not being empty; */
639 _mesa_HashDeleteAll(intelScreen->named_regions, nop_callback, NULL);
640 _mesa_DeleteHashTable(intelScreen->named_regions);
643 sPriv->driverPrivate = NULL;
648 * This is called when we need to set up GL rendering to a new X window.
651 intelCreateBuffer(__DRIscreen * driScrnPriv,
652 __DRIdrawable * driDrawPriv,
653 const struct gl_config * mesaVis, GLboolean isPixmap)
655 struct intel_renderbuffer *rb;
656 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
658 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
659 struct gl_framebuffer *fb;
664 fb = CALLOC_STRUCT(gl_framebuffer);
668 _mesa_initialize_window_framebuffer(fb, mesaVis);
670 if (mesaVis->redBits == 5)
671 rgbFormat = MESA_FORMAT_RGB565;
672 else if (mesaVis->alphaBits == 0)
673 rgbFormat = MESA_FORMAT_XRGB8888;
675 rgbFormat = MESA_FORMAT_ARGB8888;
677 /* setup the hardware-based renderbuffers */
678 rb = intel_create_renderbuffer(rgbFormat, num_samples);
679 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
681 if (mesaVis->doubleBufferMode) {
682 rb = intel_create_renderbuffer(rgbFormat, num_samples);
683 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
687 * Assert here that the gl_config has an expected depth/stencil bit
688 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
689 * which constructs the advertised configs.)
691 if (mesaVis->depthBits == 24) {
692 assert(mesaVis->stencilBits == 8);
694 if (screen->hw_has_separate_stencil) {
695 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
697 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
698 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
700 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
703 * Use combined depth/stencil. Note that the renderbuffer is
704 * attached to two attachment points.
706 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
708 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
709 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
712 else if (mesaVis->depthBits == 16) {
713 assert(mesaVis->stencilBits == 0);
714 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
716 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
719 assert(mesaVis->depthBits == 0);
720 assert(mesaVis->stencilBits == 0);
723 /* now add any/all software-based renderbuffers we may need */
724 _swrast_add_soft_renderbuffers(fb,
725 false, /* never sw color */
726 false, /* never sw depth */
727 false, /* never sw stencil */
728 mesaVis->accumRedBits > 0,
729 false, /* never sw alpha */
730 false /* never sw aux */ );
731 driDrawPriv->driverPrivate = fb;
737 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
739 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
741 _mesa_reference_framebuffer(&fb, NULL);
744 /* There are probably better ways to do this, such as an
745 * init-designated function to register chipids and createcontext
749 i830CreateContext(const struct gl_config *mesaVis,
750 __DRIcontext *driContextPriv,
751 void *sharedContextPrivate);
754 i915CreateContext(int api,
755 const struct gl_config *mesaVis,
756 __DRIcontext *driContextPriv,
757 unsigned major_version,
758 unsigned minor_version,
760 void *sharedContextPrivate);
762 brwCreateContext(int api,
763 const struct gl_config *mesaVis,
764 __DRIcontext *driContextPriv,
765 unsigned major_version,
766 unsigned minor_version,
769 void *sharedContextPrivate);
772 intelCreateContext(gl_api api,
773 const struct gl_config * mesaVis,
774 __DRIcontext * driContextPriv,
775 unsigned major_version,
776 unsigned minor_version,
779 void *sharedContextPrivate)
781 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
782 struct intel_screen *intelScreen = sPriv->driverPrivate;
783 bool success = false;
786 if (IS_9XX(intelScreen->deviceID)) {
787 success = i915CreateContext(api, mesaVis, driContextPriv,
788 major_version, minor_version, error,
789 sharedContextPrivate);
793 if (major_version > 1 || minor_version > 3) {
794 *error = __DRI_CTX_ERROR_BAD_VERSION;
801 *error = __DRI_CTX_ERROR_BAD_API;
806 intelScreen->no_vbo = true;
807 success = i830CreateContext(mesaVis, driContextPriv,
808 sharedContextPrivate);
810 *error = __DRI_CTX_ERROR_NO_MEMORY;
814 success = brwCreateContext(api, mesaVis,
816 major_version, minor_version, flags,
817 error, sharedContextPrivate);
823 intelDestroyContext(driContextPriv);
828 intel_init_bufmgr(struct intel_screen *intelScreen)
830 __DRIscreen *spriv = intelScreen->driScrnPriv;
833 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
835 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
836 if (intelScreen->bufmgr == NULL) {
837 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
842 if (!intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences) ||
844 fprintf(stderr, "[%s: %u] Kernel 2.6.29 required.\n", __func__, __LINE__);
848 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
850 intelScreen->named_regions = _mesa_NewHashTable();
852 intelScreen->relaxed_relocations = 0;
853 intelScreen->relaxed_relocations |=
854 intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA) << 0;
860 * Override intel_screen.hw_has_separate_stencil with environment variable
861 * INTEL_SEPARATE_STENCIL.
863 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
864 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
868 intel_override_separate_stencil(struct intel_screen *screen)
870 const char *s = getenv("INTEL_SEPARATE_STENCIL");
873 } else if (!strncmp("0", s, 2)) {
874 screen->hw_has_separate_stencil = false;
875 } else if (!strncmp("1", s, 2)) {
876 screen->hw_has_separate_stencil = true;
879 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
880 "invalid value and is ignored", s);
885 intel_detect_swizzling(struct intel_screen *screen)
887 drm_intel_bo *buffer;
888 unsigned long flags = 0;
889 unsigned long aligned_pitch;
890 uint32_t tiling = I915_TILING_X;
891 uint32_t swizzle_mode = 0;
893 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
895 &tiling, &aligned_pitch, flags);
899 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
900 drm_intel_bo_unreference(buffer);
902 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
909 intel_screen_make_configs(__DRIscreen *dri_screen)
911 static const GLenum back_buffer_modes[] = {
912 GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
915 static const uint8_t singlesample_samples[1] = {0};
916 static const uint8_t multisample_samples[2] = {4, 8};
918 struct intel_screen *screen = dri_screen->driverPrivate;
921 uint8_t depth_bits[4], stencil_bits[4];
922 __DRIconfig **configs = NULL;
924 fb_format[0] = GL_RGB;
925 fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
927 fb_format[1] = GL_BGR;
928 fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
930 fb_format[2] = GL_BGRA;
931 fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
933 /* Generate singlesample configs without accumulation buffer. */
934 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
935 __DRIconfig **new_configs;
936 const int num_depth_stencil_bits = 2;
938 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
939 * buffer that has a different number of bits per pixel than the color
940 * buffer. This isn't yet supported here.
945 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
953 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
956 num_depth_stencil_bits,
958 ARRAY_SIZE(back_buffer_modes),
959 singlesample_samples, 1,
961 configs = driConcatConfigs(configs, new_configs);
964 /* Generate the minimum possible set of configs that include an
965 * accumulation buffer.
967 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
968 __DRIconfig **new_configs;
970 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
978 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
979 depth_bits, stencil_bits, 1,
980 back_buffer_modes + 1, 1,
981 singlesample_samples, 1,
983 configs = driConcatConfigs(configs, new_configs);
986 /* Generate multisample configs.
988 * This loop breaks early, and hence is a no-op, on gen < 6.
990 * Multisample configs must follow the singlesample configs in order to
991 * work around an X server bug present in 1.12. The X server chooses to
992 * associate the first listed RGBA888-Z24S8 config, regardless of its
993 * sample count, with the 32-bit depth visual used for compositing.
995 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
996 * supported. Singlebuffer configs are not supported because no one wants
997 * them. GLX_SWAP_COPY_OML is not supported due to page flipping.
999 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
1000 if (screen->gen < 6)
1003 __DRIconfig **new_configs;
1004 const int num_depth_stencil_bits = 2;
1005 int num_msaa_modes = 0;
1008 stencil_bits[0] = 0;
1010 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
1012 stencil_bits[1] = 0;
1015 stencil_bits[1] = 8;
1018 if (screen->gen >= 7)
1020 else if (screen->gen == 6)
1023 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
1026 num_depth_stencil_bits,
1027 back_buffer_modes + 1, 1,
1028 multisample_samples,
1031 configs = driConcatConfigs(configs, new_configs);
1034 if (configs == NULL) {
1035 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1044 * This is the driver specific part of the createNewScreen entry point.
1045 * Called when using DRI2.
1047 * \return the struct gl_config supported by this driver
1050 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1052 struct intel_screen *intelScreen;
1053 unsigned int api_mask;
1055 if (psp->dri2.loader->base.version <= 2 ||
1056 psp->dri2.loader->getBuffersWithFormat == NULL) {
1058 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1059 "support required\n");
1063 /* Allocate the private area */
1064 intelScreen = CALLOC(sizeof *intelScreen);
1066 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1069 /* parse information in __driConfigOptions */
1070 driParseOptionInfo(&intelScreen->optionCache,
1071 __driConfigOptions, __driNConfigOptions);
1073 intelScreen->driScrnPriv = psp;
1074 psp->driverPrivate = (void *) intelScreen;
1076 if (!intel_init_bufmgr(intelScreen))
1079 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1081 intelScreen->kernel_has_gen7_sol_reset =
1082 intel_get_boolean(intelScreen->driScrnPriv,
1083 I915_PARAM_HAS_GEN7_SOL_RESET);
1085 if (IS_GEN7(intelScreen->deviceID)) {
1086 intelScreen->gen = 7;
1087 } else if (IS_GEN6(intelScreen->deviceID)) {
1088 intelScreen->gen = 6;
1089 } else if (IS_GEN5(intelScreen->deviceID)) {
1090 intelScreen->gen = 5;
1091 } else if (IS_965(intelScreen->deviceID)) {
1092 intelScreen->gen = 4;
1093 } else if (IS_9XX(intelScreen->deviceID)) {
1094 intelScreen->gen = 3;
1096 intelScreen->gen = 2;
1099 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1100 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1103 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1105 if (success && has_llc)
1106 intelScreen->hw_has_llc = true;
1107 else if (!success && intelScreen->gen >= 6)
1108 intelScreen->hw_has_llc = true;
1110 intel_override_separate_stencil(intelScreen);
1112 api_mask = (1 << __DRI_API_OPENGL);
1114 api_mask |= (1 << __DRI_API_GLES);
1117 api_mask |= (1 << __DRI_API_GLES2);
1120 if (IS_9XX(intelScreen->deviceID) || IS_965(intelScreen->deviceID))
1121 psp->api_mask = api_mask;
1123 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1125 psp->extensions = intelScreenExtensions;
1127 return (const __DRIconfig**) intel_screen_make_configs(psp);
1130 struct intel_buffer {
1132 struct intel_region *region;
1135 static __DRIbuffer *
1136 intelAllocateBuffer(__DRIscreen *screen,
1137 unsigned attachment, unsigned format,
1138 int width, int height)
1140 struct intel_buffer *intelBuffer;
1141 struct intel_screen *intelScreen = screen->driverPrivate;
1143 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1144 attachment == __DRI_BUFFER_BACK_LEFT);
1146 intelBuffer = CALLOC(sizeof *intelBuffer);
1147 if (intelBuffer == NULL)
1150 /* The front and back buffers are color buffers, which are X tiled. */
1151 intelBuffer->region = intel_region_alloc(intelScreen,
1158 if (intelBuffer->region == NULL) {
1163 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1165 intelBuffer->base.attachment = attachment;
1166 intelBuffer->base.cpp = intelBuffer->region->cpp;
1167 intelBuffer->base.pitch =
1168 intelBuffer->region->pitch * intelBuffer->region->cpp;
1170 return &intelBuffer->base;
1174 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1176 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1178 intel_region_release(&intelBuffer->region);
1183 const struct __DriverAPIRec driDriverAPI = {
1184 .InitScreen = intelInitScreen2,
1185 .DestroyScreen = intelDestroyScreen,
1186 .CreateContext = intelCreateContext,
1187 .DestroyContext = intelDestroyContext,
1188 .CreateBuffer = intelCreateBuffer,
1189 .DestroyBuffer = intelDestroyBuffer,
1190 .MakeCurrent = intelMakeCurrent,
1191 .UnbindContext = intelUnbindContext,
1192 .AllocateBuffer = intelAllocateBuffer,
1193 .ReleaseBuffer = intelReleaseBuffer
1196 /* This is the table of extensions that the loader will dlsym() for. */
1197 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1198 &driCoreExtension.base,
1199 &driDRI2Extension.base,