OSDN Git Service

93b7feb02c78270e23d06f607c337d82a9e3a0a6
[android-x86/external-mesa.git] / src / mesa / drivers / dri / r128 / server / r128_macros.h
1 /**
2  * \file server/R128_macros.h
3  * \brief Macros for R128 MMIO operation.
4  *
5  * \authors Kevin E. Martin <martin@xfree86.org>
6  * \authors Rickard E. Faith <faith@valinux.com>
7  * \authors Alan Hourihane <alanh@fairlite.demon.co.uk>
8  */
9
10 /*
11  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
12  *                VA Linux Systems Inc., Fremont, California.
13  *
14  * All Rights Reserved.
15  *
16  * Permission is hereby granted, free of charge, to any person obtaining
17  * a copy of this software and associated documentation files (the
18  * "Software"), to deal in the Software without restriction, including
19  * without limitation on the rights to use, copy, modify, merge,
20  * publish, distribute, sublicense, and/or sell copies of the Software,
21  * and to permit persons to whom the Software is furnished to do so,
22  * subject to the following conditions:
23  *
24  * The above copyright notice and this permission notice (including the
25  * next paragraph) shall be included in all copies or substantial
26  * portions of the Software.
27  *
28  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
29  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
30  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
31  * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
32  * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
33  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
34  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
35  * DEALINGS IN THE SOFTWARE.
36  */
37
38 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/R128_reg.h,v 1.20 2002/10/12 01:38:07 martin Exp $ */
39
40 #ifndef _R128_MACROS_H_
41 #define _R128_MACROS_H_
42
43
44
45 #  define MMIO_IN8(base, offset) \
46         *(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
47 #  define MMIO_IN16(base, offset) \
48         *(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset))
49 #  define MMIO_IN32(base, offset) \
50         *(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset))
51 #  define MMIO_OUT8(base, offset, val) \
52         *(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val)
53 #  define MMIO_OUT16(base, offset, val) \
54         *(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset)) = (val)
55 #  define MMIO_OUT32(base, offset, val) \
56         *(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = (val)
57
58
59                                 /* Memory mapped register access macros */
60 #define INREG8(addr)        MMIO_IN8(R128MMIO, addr)
61 #define INREG16(addr)       MMIO_IN16(R128MMIO, addr)
62 #define INREG(addr)         MMIO_IN32(R128MMIO, addr)
63 #define OUTREG8(addr, val)  MMIO_OUT8(R128MMIO, addr, val)
64 #define OUTREG16(addr, val) MMIO_OUT16(R128MMIO, addr, val)
65 #define OUTREG(addr, val)   MMIO_OUT32(R128MMIO, addr, val)
66
67 #define ADDRREG(addr)       ((volatile GLuint *)(pointer)(R128MMIO + (addr)))
68
69
70 #define OUTREGP(addr, val, mask)                                        \
71 do {                                                                    \
72     GLuint tmp = INREG(addr);                                           \
73     tmp &= (mask);                                                      \
74     tmp |= (val);                                                       \
75     OUTREG(addr, tmp);                                                  \
76 } while (0)
77
78 #define INPLL(dpy, addr) r128INPLL(dpy, addr)
79
80 #define OUTPLL(addr, val)                                               \
81 do {                                                                    \
82     OUTREG8(R128_CLOCK_CNTL_INDEX, (((addr) & 0x3f) |                   \
83                                       R128_PLL_WR_EN));         \
84     OUTREG(R128_CLOCK_CNTL_DATA, val);                          \
85 } while (0)
86
87 #define OUTPLLP(dpy, addr, val, mask)                                   \
88 do {                                                                    \
89     GLuint tmp = INPLL(dpy, addr);                                      \
90     tmp &= (mask);                                                      \
91     tmp |= (val);                                                       \
92     OUTPLL(addr, tmp);                                                  \
93 } while (0)
94
95 #define OUTPAL_START(idx)                                               \
96 do {                                                                    \
97     OUTREG8(R128_PALETTE_INDEX, (idx));                         \
98 } while (0)
99
100 #define OUTPAL_NEXT(r, g, b)                                            \
101 do {                                                                    \
102     OUTREG(R128_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));  \
103 } while (0)
104
105 #define OUTPAL_NEXT_CARD32(v)                                           \
106 do {                                                                    \
107     OUTREG(R128_PALETTE_DATA, (v & 0x00ffffff));                        \
108 } while (0)
109
110 #define OUTPAL(idx, r, g, b)                                            \
111 do {                                                                    \
112     OUTPAL_START((idx));                                                \
113     OUTPAL_NEXT((r), (g), (b));                                         \
114 } while (0)
115
116 #define INPAL_START(idx)                                                \
117 do {                                                                    \
118     OUTREG(R128_PALETTE_INDEX, (idx) << 16);                            \
119 } while (0)
120
121 #define INPAL_NEXT() INREG(R128_PALETTE_DATA)
122
123 #define PAL_SELECT(idx)                                                 \
124 do {                                                                    \
125     if (!idx) {                                                         \
126         OUTREG(R128_DAC_CNTL2, INREG(R128_DAC_CNTL2) &          \
127                (GLuint)~R128_DAC2_PALETTE_ACC_CTL);                     \
128     } else {                                                            \
129         OUTREG(R128_DAC_CNTL2, INREG(R128_DAC_CNTL2) |          \
130                R128_DAC2_PALETTE_ACC_CTL);                              \
131     }                                                                   \
132 } while (0)
133
134
135 #endif