2 * Copyright © <2010>, Intel Corporation.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * Authors: Zhao Yakui <yakui.zhao@intel.com>
25 // Modual name: Inter_bframe_haswell.asm
27 // Make inter predition estimation for Inter frame for B-frame
31 // Now, begin source code....
34 #define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud
35 #define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud
41 mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1};
42 mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1};
43 mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ;
44 mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ;
46 shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */
47 add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */
48 add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */
49 mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1};
50 mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */
52 shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */
53 add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */
54 mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1};
55 mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */
57 shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */
58 mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
60 mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1};
61 add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1};
62 mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1};
63 mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
66 * Media Read Message -- fetch Luma neighbor edge pixels
69 mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1};
70 send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1};
73 mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1};
74 send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1};
77 * Media Read Message -- fetch Chroma neighbor edge pixels
80 shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */
81 mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1};
82 add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */
83 add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */
84 mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1};
85 send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1};
88 shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */
89 mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1};
90 add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */
91 mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1};
92 mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1};
93 send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1};
95 mov (8) vme_m1.0<1>:ud 0:ud {align1};
96 mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1};
97 mov (8) mb_ref_win.0<1>:ud 0:ud {align1};
98 and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1};
99 (f0.0) jmpi (1) __mb_hwdep_end;
101 /* read back the data for MB A */
102 /* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag),
103 * rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID)
105 mov (8) mba_result.0<1>:ud 0x0:ud {align1};
106 mov (8) mbb_result.0<1>:ud 0x0:ud {align1};
107 mov (8) mbc_result.0<1>:ud 0x0:ud {align1};
109 mov (8) mb_msg0.0<1>:ud 0:ud {align1};
110 and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1};
111 /* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */
112 (f0.0) mov (2) mba_result.20<1>:w -1:w {align1};
113 (f0.0) jmpi (1) mbb_start;
114 mov (1) mba_result.0<1>:d MB_AVAIL {align1};
115 mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
116 add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1};
117 mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
118 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
119 mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
120 mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
122 /* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
132 OBR_WRITE_COMMIT_CATEGORY,
139 /* TODO: RefID is required after multi-references are added */
140 cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
141 (f0.0) mov (2) mba_result.20<1>:w -1:w {align1};
142 (f0.0) jmpi (1) mbb_start;
144 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
145 /* Read MV for MB A */
146 /* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
156 OBR_WRITE_COMMIT_CATEGORY,
162 /* TODO: RefID is required after multi-references are added */
164 mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1};
165 mov (2) mba_result.20<1>:w -1:w {align1};
166 mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1};
167 mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1};
168 mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK1:ud {align1};
170 jmpi (1) mb_pred_func;
171 mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1};
172 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1};
173 (f0.0) mov (1) mba_result.16<1>:uw MB_PRED_FLAG {align1};
174 (f0.0) mov (1) mba_result.20<1>:w 0:w {align1};
175 (f0.0) jmpi (1) mbb_start;
176 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1};
177 (f0.0) mov (1) mba_result.18<1>:uw MB_PRED_FLAG {align1};
178 (f0.0) mov (1) mba_result.22<1>:w 0:w {align1};
179 (f0.0) jmpi (1) mbb_start;
180 mov (2) mba_result.16<1>:uw MB_PRED_FLAG {align1};
181 mov (2) mba_result.20<1>:w 0:w {align1};
184 mov (8) mb_msg0.0<1>:ud 0:ud {align1};
185 and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1};
186 /* MB B doesn't exist. Zero MV. mba_flag is zero */
187 /* If MB B doesn't exist, neither MB C nor D exists */
188 (f0.0) mov (2) mbb_result.20<1>:w -1:w {align1};
189 (f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
190 (f0.0) jmpi (1) mb_mvp_start;
191 mov (1) mbb_result.0<1>:d MB_AVAIL {align1};
192 mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
193 add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1};
194 mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
195 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
196 mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
197 mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
199 /* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
209 OBR_WRITE_COMMIT_CATEGORY,
216 /* TODO: RefID is required after multi-references are added */
217 cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
218 (f0.0) mov (2) mbb_result.20<1>:w -1:w {align1};
219 (f0.0) jmpi (1) mbc_start;
220 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
221 /* Read MV for MB B */
222 /* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
232 OBR_WRITE_COMMIT_CATEGORY,
238 /* TODO: RefID is required after multi-references are added */
239 mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1};
240 mov (2) mbb_result.20<1>:w -1:w {align1};
241 mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1};
242 mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1};
243 mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1};
245 jmpi (1) mb_pred_func;
246 mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1};
247 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1};
248 (f0.0) mov (1) mbb_result.16<1>:uw MB_PRED_FLAG {align1};
249 (f0.0) mov (1) mbb_result.20<1>:w 0:w {align1};
250 (f0.0) jmpi (1) mbc_start;
251 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1};
252 (f0.0) mov (1) mbb_result.18<1>:uw MB_PRED_FLAG {align1};
253 (f0.0) mov (1) mbb_result.22<1>:w 0:w {align1};
254 (f0.0) jmpi (1) mbc_start;
255 mov (2) mbb_result.16<1>:uw MB_PRED_FLAG {align1};
256 mov (2) mbb_result.20<1>:w 0:w {align1};
259 mov (8) mb_msg0.0<1>:ud 0:ud {align1};
260 and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1};
261 /* MB C doesn't exist. Zero MV. mba_flag is zero */
262 /* Based on h264 spec the MB D will be replaced if MB C doesn't exist */
263 (f0.0) jmpi (1) mbd_start;
264 mov (1) mbc_result.0<1>:d MB_AVAIL {align1};
265 mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
266 add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1};
267 add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1};
268 mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
269 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
270 mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
271 mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
273 /* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
283 OBR_WRITE_COMMIT_CATEGORY,
290 /* TODO: RefID is required after multi-references are added */
291 cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
292 (f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
293 (f0.0) jmpi (1) mb_mvp_start;
294 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
295 /* Read MV for MB C */
296 /* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
306 OBR_WRITE_COMMIT_CATEGORY,
312 /* TODO: RefID is required after multi-references are added */
314 mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1};
315 mov (2) mbc_result.20<1>:w -1:w {align1};
316 mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1};
317 mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1};
318 mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1};
320 jmpi (1) mb_pred_func;
321 mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1};
322 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1};
323 (f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1};
324 (f0.0) mov (1) mbc_result.20<1>:w 0:w {align1};
325 (f0.0) jmpi (1) mb_mvp_start;
326 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1};
327 (f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1};
328 (f0.0) mov (1) mbc_result.22<1>:w 0:w {align1};
329 (f0.0) jmpi (1) mb_mvp_start;
330 mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1};
331 mov (2) mbc_result.20<1>:w 0:w {align1};
333 jmpi (1) mb_mvp_start;
335 mov (8) mb_msg0.0<1>:ud 0:ud {align1};
336 and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1};
337 (f0.0) jmpi (1) mb_mvp_start;
338 mov (1) mbc_result.0<1>:d MB_AVAIL {align1};
339 mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
340 add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1};
341 mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
342 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
343 mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
344 mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
346 /* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
356 OBR_WRITE_COMMIT_CATEGORY,
363 cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
364 (f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
365 (f0.0) jmpi (1) mb_mvp_start;
367 add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
368 /* Read MV for MB D */
369 /* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
379 OBR_WRITE_COMMIT_CATEGORY,
386 /* TODO: RefID is required after multi-references are added */
389 mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1};
390 mov (2) mbc_result.20<1>:w -1:w {align1};
391 mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1};
392 mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1};
393 mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK3:ud {align1};
395 jmpi (1) mb_pred_func;
396 mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1};
397 mov (1) mbc_result.18<1>:w MB_PRED_FLAG {align1};
398 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1};
399 (f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1};
400 (f0.0) mov (1) mbc_result.20<1>:w 0:w {align1};
401 (f0.0) jmpi (1) mb_mvp_start;
402 cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1};
403 (f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1};
404 (f0.0) mov (1) mbc_result.22<1>:w 0:w {align1};
405 (f0.0) jmpi (1) mb_mvp_start;
406 mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1};
407 mov (2) mbc_result.20<1>:w 0:w {align1};
410 /*TODO: Add the skip prediction */
411 /* Check whether both MB B and C are inavailable */
412 add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1};
413 cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1};
414 (-f0.0) jmpi (1) mb_median_start;
415 cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1};
416 (f0.0) mov (2) mbb_result.4<1>:ud mba_result.4<2,2,1>:ud {align1};
417 (f0.0) mov (2) mbc_result.4<1>:ud mba_result.4<2,2,1>:ud {align1};
418 (f0.0) mov (2) mbb_result.20<1>:uw mba_result.20<2,2,1>:uw {align1};
419 (f0.0) mov (2) mbc_result.20<1>:uw mba_result.20<2,2,1>:uw {align1};
420 (f0.0) mov (2) mb_mvp_ref.0<1>:ud mba_result.4<2,2,1>:ud {align1};
421 (-f0.0) mov (2) mb_mvp_ref.0<1>:ud 0:ud {align1};
422 jmpi (1) __mb_hwdep_end;
426 /* check whether only one neighbour MB has the same ref ID with the current MB */
427 mov (8) tmp_reg0.0<1>:ud 0:ud {align1};
428 cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1};
429 (f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1};
430 (f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1};
431 cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1};
432 (f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1};
433 (f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1};
434 cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1};
435 (f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1};
436 (f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1};
437 cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1};
438 (f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1};
439 (f0.0) jmpi (1) mvp_backward;
441 mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1};
442 mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1};
443 mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1};
445 jmpi (1) word_imedian;
446 mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1};
447 mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1};
448 mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1};
449 mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1};
451 jmpi (1) word_imedian;
452 mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1};
456 /* check whether only one neighbour MB has the same ref ID with the current MB */
457 mov (8) tmp_reg0.0<1>:ud 0:ud {align1};
458 cmp.z.f0.0 (1) null:d mba_result.22<1>:w 0:w {align1};
459 (f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1};
460 (f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.8<0,1,0>:ud {align1};
461 cmp.z.f0.0 (1) null:d mbb_result.22<1>:w 0:w {align1};
462 (f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1};
463 (f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.8<0,1,0>:ud {align1};
464 cmp.z.f0.0 (1) null:d mbc_result.22<1>:w 0:w {align1};
465 (f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1};
466 (f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.8<0,1,0>:ud {align1};
467 cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1};
468 (f0.0) mov (1) mb_mvp_ref.4<1>:ud tmp_reg0.4<0,1,0>:ud {align1};
469 (f0.0) jmpi (1) __mb_hwdep_end;
471 mov (1) INPUT_ARG0.0<1>:w mba_result.8<0,1,0>:w {align1};
472 mov (1) INPUT_ARG0.4<1>:w mbb_result.8<0,1,0>:w {align1};
473 mov (1) INPUT_ARG0.8<1>:w mbc_result.8<0,1,0>:w {align1};
475 jmpi (1) word_imedian;
476 mov (1) mb_mvp_ref.4<1>:w RET_ARG<0,1,0>:w {align1};
477 mov (1) INPUT_ARG0.0<1>:w mba_result.10<0,1,0>:w {align1};
478 mov (1) INPUT_ARG0.4<1>:w mbb_result.10<0,1,0>:w {align1};
479 mov (1) INPUT_ARG0.8<1>:w mbc_result.10<0,1,0>:w {align1};
481 jmpi (1) word_imedian;
482 mov (1) mb_mvp_ref.6<1>:w RET_ARG<0,1,0>:w {align1};
485 asr (4) mb_ref_win.0<1>:w mb_mvp_ref.0<4,4,1>:w 2:w {align1};
486 add (4) mb_ref_win.8<1>:w mb_ref_win.0<4,4,1>:w 3:w {align1};
487 and (4) mb_ref_win.16<1>:uw mb_ref_win.8<4,4,1>:uw 0xFFFC:uw {align1};
489 mov (8) msg_reg0.0<1>:ud 0:ud {align1};
490 mov (1) msg_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
491 mov (1) tmp_reg0.0<1>:UD qp_ub<0,1,0>:ub {align1};
492 mul (1) msg_reg0.8<1>:ud tmp_reg0.0<1>:ud 2:ud {align1};
503 OBR_WRITE_COMMIT_CATEGORY,
510 /* m2, get the MV/Mb cost passed from constant buffer when
511 spawning thread by MEDIA_OBJECT */
512 mov (8) vme_m2<1>:UD vme_cost_wb.0<8,8,1>:UD {align1};
514 mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1};
517 mov (8) vme_msg_3<1>:UD 0x0:UD {align1};
520 mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1};
521 and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1};
522 mov (8) vme_msg_4<1>:UD INEP_ROW.0<8,8,1>:UD {align1};
525 mov (8) vme_msg_5<1>:UD 0x0:UD {align1};
526 mov (16) vme_msg_5.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1};
527 mov (1) vme_msg_5.16<1>:UD INTRA_PREDICTORE_MODE {align1};
529 /* the penalty for Intra mode */
530 mov (1) vme_msg_5.28<1>:UD 0x010101:UD {align1};
531 mov (1) vme_msg_5.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1};
536 mov (4) vme_msg_6.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1};
537 mov (8) vme_msg_6.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1};
543 mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
544 mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1};
545 /* Use the Luma mode */
546 mov (1) vme_msg_4.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1};
549 mov (1) intra_flag<1>:UW 0x0:UW {align1} ;
550 and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1};
551 (f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1};
553 /* assign MB intra struct from the thread payload*/
554 mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1};
556 /* Disable DC HAAR component when calculating HARR SATD block */
557 mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1};
558 mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1};
560 mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */
562 mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
563 mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1};
565 /* after verification it will be passed by using payload */
574 mlen sic_vme_msg_length
578 * Oword Block Write message
580 mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1};
582 mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1};
583 mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1};
584 mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1};
585 mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1};
587 /* Distortion, Intra (17-16), */
588 mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1};
590 mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1};
591 /* VME clock counts */
592 mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1};
594 mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1};
596 /* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */
606 OBW_WRITE_COMMIT_CATEGORY,
614 mov (1) vme_m0.12<1>:UD SEARCH_CTRL_DUAL_REFERENCE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */
615 mov (1) vme_m0.22<1>:UW DREF_REGION_SIZE {align1};
616 /* Dual Reference Width&Height,32x32 */
618 mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1};
620 /* Reference = (x-8,y-8)-(x+8,y+8) */
621 add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -8:W {align1};
622 add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -8:W {align1};
624 mov (1) vme_m0.0<1>:W -8:W {align1};
625 mov (1) vme_m0.2<1>:W -8:W {align1};
627 mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1};
628 and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1};
629 (f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1};
630 (f0.0) add (1) vme_m0.4<1>:w vme_m0.4<0,1,0>:w 4:w {align1};
631 and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1};
632 (f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1};
633 (f0.0) add (1) vme_m0.6<1>:w vme_m0.6<0,1,0>:w 4:w {align1};
635 add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1};
636 add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.20<2,2,1>:w {align1};
638 mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
640 mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ;
641 /* the Max MV number is passed by constant buffer */
642 mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1};
643 mov (1) vme_m1.8<1>:UD DSTART_CENTER + DSEARCH_PATH_LEN:UD {align1};
644 /* Set the MV cost center */
645 mov (1) vme_m1.16<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1};
646 mov (1) vme_m1.20<1>:ud mb_mvp_ref.4<0,1,0>:ud {align1};
647 mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
649 mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1};
650 /* M3/M4 search path */
652 mov (1) vme_msg_3.0<1>:UD 0x10010101:UD {align1};
653 mov (1) vme_msg_3.4<1>:UD 0x100F0F0F:UD {align1};
654 mov (1) vme_msg_3.8<1>:UD 0x10010101:UD {align1};
655 mov (1) vme_msg_3.12<1>:UD 0x000F0F0F:UD {align1};
657 mov (4) vme_msg_3.16<1>:UD 0x0:UD {align1};
658 mov (8) vme_msg_4.16<1>:UD 0x0:UD {align1};
670 mlen ime_vme_msg_length
671 rlen vme_wb_length {align1};
673 /* Set Macroblock-shape/mode for FBR */
675 mov (1) vme_m2.20<1>:UD 0x0:UD {align1};
676 mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1};
677 mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1};
679 and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1};
680 mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1};
682 /* Send FBR message into CRE */
684 mov (8) vme_msg_3.0<1>:UD vme_wb1.0<8,8,1>:UD {align1};
685 mov (8) vme_msg_4.0<1>:ud vme_wb2.0<8,8,1>:ud {align1};
686 mov (8) vme_msg_5.0<1>:ud vme_wb3.0<8,8,1>:ud {align1};
687 mov (8) vme_msg_6.0<1>:ud vme_wb4.0<8,8,1>:ud {align1};
689 /* 16x16 Source, 1/4 pixel, harr, BME ENABLE */
690 mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_ENABLE:UD {align1};
692 mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
694 mov (1) tmp_reg0.0<1>:uw BI_WEIGHT {align1};
695 mov (1) vme_m1.6<1>:UB tmp_reg0.0<0,1,0>:ub {align1};
696 mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
698 mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1};
700 /* after verification it will be passed by using payload */
709 mlen fbr_vme_msg_length
713 add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1};
714 mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1};
716 mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1};
718 mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1};
719 /* Inter distortion of FME */
720 mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1};
722 mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1};
724 /* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */
734 OBW_WRITE_COMMIT_CATEGORY,
741 /* Write FME/BME MV */
742 add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1};
743 mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1};
746 mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1};
747 mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1};
748 mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1};
749 mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1};
750 /* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */
760 OBW_WRITE_COMMIT_CATEGORY,
767 /* Write FME/BME RefID */
768 add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1};
769 mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1};
771 mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1};
773 /* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */
783 OBW_WRITE_COMMIT_CATEGORY,
791 /* Issue message fence so that the previous write message is committed */
801 OBR_WRITE_COMMIT_CATEGORY,
812 mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1};
813 send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
818 /* Compare three word data to get the min value */
820 cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1};
821 (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
822 (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
823 cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
824 (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1};
825 (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
828 /* Compare three word data to get the max value */
830 cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1};
831 (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
832 (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
833 cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
834 (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1};
835 (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
839 cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1};
840 (f0.0) jmpi (1) cmp_a_ge_b;
841 cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
842 (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
843 (f0.0) jmpi (1) cmp_end;
844 cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
845 (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
846 (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
849 cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
850 (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
851 (f0.0) jmpi (1) cmp_end;
852 cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
853 (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
854 (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
859 mov (8) TEMP_VAR0.0<1>:ud 0:ud {align1};
860 mov (1) TEMP_VAR0.0<1>:ub INPUT_ARG0.2<0,1,0>:ub {align1};
861 and (1) TEMP_VAR0.4<1>:uw INPUT_ARG0.4<0,1,0>:uw INTER_MASK:uw {align1};
862 /* INTER16x16 mode. The bit1-0 is the prediction mode */
863 cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_16X16MODE:uw {align1};
864 (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1};
865 (f0.0) jmpi (1) end_mb_pred;
866 /* Check whether it is INTER8x8 mode. */
867 cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_8X8MODE:uw {align1};
868 (f0.0) jmpi (1) mb_pred_func_8;
870 /* Check whether it is INTER16x8 mode. */
871 cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_16X8MODE:uw {align1};
872 (f0.0) jmpi (1) mb_pred_func_168;
874 /* Block 0/2 uses the bit1-0. Block 1/3 uses the bit3-2 */
875 mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1};
876 and.z.f0.0 (1) null:uw TEMP_VAR0.8<1>:uw INTER_BLOCK1:uw {align1};
877 (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1};
878 (f0.0) jmpi (1) end_mb_pred;
879 shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1};
880 and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1};
881 jmpi (1) end_mb_pred;
884 /* Block 0/1 uses the bit1-0. Block 2/3 uses the bit3-2 */
885 mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1};
886 cmp.l.f0.0 (1) null:uw TEMP_VAR0.8<1>:uw INTER_BLOCK2:uw {align1};
887 (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1};
888 (f0.0) jmpi (1) end_mb_pred;
889 shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1};
890 and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1};
891 jmpi (1) end_mb_pred;
894 /* 8X8 mode. Every block uses two bits as the prediction mode. */
895 mul (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw 2:uw {align1};
896 shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw TEMP_VAR0.8<0,1,0>:uw {align1};
897 and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1};