2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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24 #include "anv_private.h"
27 # include "genxml/gen9_pack.h"
29 # include "genxml/gen8_pack.h"
30 #elif (ANV_IS_HASWELL)
31 # include "genxml/gen75_pack.h"
33 # include "genxml/gen7_pack.h"
37 genX(compute_pipeline_create)(
39 struct anv_pipeline_cache * cache,
40 const VkComputePipelineCreateInfo* pCreateInfo,
41 const VkAllocationCallbacks* pAllocator,
42 VkPipeline* pPipeline)
44 ANV_FROM_HANDLE(anv_device, device, _device);
45 struct anv_pipeline *pipeline;
48 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO);
50 pipeline = anv_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8,
51 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
53 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
55 pipeline->device = device;
56 pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
58 pipeline->blend_state.map = NULL;
60 result = anv_reloc_list_init(&pipeline->batch_relocs,
61 pAllocator ? pAllocator : &device->alloc);
62 if (result != VK_SUCCESS) {
63 anv_free2(&device->alloc, pAllocator, pipeline);
66 pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
67 pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
68 pipeline->batch.relocs = &pipeline->batch_relocs;
70 /* When we free the pipeline, we detect stages based on the NULL status
71 * of various prog_data pointers. Make them NULL by default.
73 memset(pipeline->prog_data, 0, sizeof(pipeline->prog_data));
74 memset(pipeline->scratch_start, 0, sizeof(pipeline->scratch_start));
76 pipeline->vs_simd8 = NO_KERNEL;
77 pipeline->vs_vec4 = NO_KERNEL;
78 pipeline->gs_kernel = NO_KERNEL;
80 pipeline->active_stages = 0;
81 pipeline->total_scratch = 0;
83 assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT);
84 ANV_FROM_HANDLE(anv_shader_module, module, pCreateInfo->stage.module);
85 anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module,
86 pCreateInfo->stage.pName,
87 pCreateInfo->stage.pSpecializationInfo);
89 pipeline->use_repclear = false;
91 const struct brw_cs_prog_data *cs_prog_data = &pipeline->cs_prog_data;
93 anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE),
94 .ScratchSpaceBasePointer = pipeline->scratch_start[MESA_SHADER_COMPUTE],
95 .PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
97 .ScratchSpaceBasePointerHigh = 0,
102 .MaximumNumberofThreads = device->info.max_cs_threads - 1,
103 .NumberofURBEntries = ANV_GEN <= 7 ? 0 : 2,
104 .ResetGatewayTimer = true,
106 .BypassGatewayControl = true,
108 .URBEntryAllocationSize = ANV_GEN <= 7 ? 0 : 2,
109 .CURBEAllocationSize = 0);
111 struct brw_cs_prog_data *prog_data = &pipeline->cs_prog_data;
112 uint32_t group_size = prog_data->local_size[0] *
113 prog_data->local_size[1] * prog_data->local_size[2];
114 pipeline->cs_thread_width_max = DIV_ROUND_UP(group_size, prog_data->simd_size);
115 uint32_t remainder = group_size & (prog_data->simd_size - 1);
118 pipeline->cs_right_mask = ~0u >> (32 - remainder);
120 pipeline->cs_right_mask = ~0u >> (32 - prog_data->simd_size);
123 *pPipeline = anv_pipeline_to_handle(pipeline);