1 /******************************************************************************
3 * Copyright 1999-2012 Broadcom Corporation
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 ******************************************************************************/
19 /******************************************************************************
21 * This file contains function of the HCIC unit to format and send HCI
24 ******************************************************************************/
26 #define LOG_TAG "bt_hciblecmds"
28 #include "bt_common.h"
29 #include "bt_target.h"
33 #include "osi/include/log.h"
35 #include <base/bind.h>
39 void btsnd_hcic_ble_set_local_used_feat(uint8_t feat_set[8]) {
40 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
41 uint8_t* pp = (uint8_t*)(p + 1);
43 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_USED_FEAT_CMD;
46 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_LOCAL_SPT_FEAT);
47 ARRAY_TO_STREAM(pp, feat_set, HCIC_PARAM_SIZE_SET_USED_FEAT_CMD);
49 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
52 void btsnd_hcic_ble_set_random_addr(const RawAddress& random_bda) {
53 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
54 uint8_t* pp = (uint8_t*)(p + 1);
56 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD;
59 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_RANDOM_ADDR);
60 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD);
62 BDADDR_TO_STREAM(pp, random_bda);
64 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
67 void btsnd_hcic_ble_write_adv_params(uint16_t adv_int_min, uint16_t adv_int_max,
68 uint8_t adv_type, uint8_t addr_type_own,
69 uint8_t addr_type_dir,
70 const RawAddress& direct_bda,
72 uint8_t adv_filter_policy) {
73 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
74 uint8_t* pp = (uint8_t*)(p + 1);
76 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS;
79 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_ADV_PARAMS);
80 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS);
82 UINT16_TO_STREAM(pp, adv_int_min);
83 UINT16_TO_STREAM(pp, adv_int_max);
84 UINT8_TO_STREAM(pp, adv_type);
85 UINT8_TO_STREAM(pp, addr_type_own);
86 UINT8_TO_STREAM(pp, addr_type_dir);
87 BDADDR_TO_STREAM(pp, direct_bda);
88 UINT8_TO_STREAM(pp, channel_map);
89 UINT8_TO_STREAM(pp, adv_filter_policy);
91 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
93 void btsnd_hcic_ble_read_adv_chnl_tx_power(void) {
94 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
95 uint8_t* pp = (uint8_t*)(p + 1);
97 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
100 UINT16_TO_STREAM(pp, HCI_BLE_READ_ADV_CHNL_TX_POWER);
101 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
103 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
106 void btsnd_hcic_ble_set_adv_data(uint8_t data_len, uint8_t* p_data) {
107 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
108 uint8_t* pp = (uint8_t*)(p + 1);
110 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA + 1;
113 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_ADV_DATA);
114 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA + 1);
116 memset(pp, 0, HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA);
118 if (p_data != NULL && data_len > 0) {
119 if (data_len > HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA)
120 data_len = HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA;
122 UINT8_TO_STREAM(pp, data_len);
124 ARRAY_TO_STREAM(pp, p_data, data_len);
126 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
128 void btsnd_hcic_ble_set_scan_rsp_data(uint8_t data_len, uint8_t* p_scan_rsp) {
129 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
130 uint8_t* pp = (uint8_t*)(p + 1);
132 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP + 1;
135 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_SCAN_RSP_DATA);
136 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP + 1);
138 memset(pp, 0, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP);
140 if (p_scan_rsp != NULL && data_len > 0) {
141 if (data_len > HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP)
142 data_len = HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP;
144 UINT8_TO_STREAM(pp, data_len);
146 ARRAY_TO_STREAM(pp, p_scan_rsp, data_len);
149 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
152 void btsnd_hcic_ble_set_adv_enable(uint8_t adv_enable) {
153 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
154 uint8_t* pp = (uint8_t*)(p + 1);
156 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_ADV_ENABLE;
159 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_ADV_ENABLE);
160 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_ADV_ENABLE);
162 UINT8_TO_STREAM(pp, adv_enable);
164 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
166 void btsnd_hcic_ble_set_scan_params(uint8_t scan_type, uint16_t scan_int,
167 uint16_t scan_win, uint8_t addr_type_own,
168 uint8_t scan_filter_policy) {
169 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
170 uint8_t* pp = (uint8_t*)(p + 1);
172 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM;
175 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_SCAN_PARAMS);
176 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM);
178 UINT8_TO_STREAM(pp, scan_type);
179 UINT16_TO_STREAM(pp, scan_int);
180 UINT16_TO_STREAM(pp, scan_win);
181 UINT8_TO_STREAM(pp, addr_type_own);
182 UINT8_TO_STREAM(pp, scan_filter_policy);
184 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
187 void btsnd_hcic_ble_set_scan_enable(uint8_t scan_enable, uint8_t duplicate) {
188 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
189 uint8_t* pp = (uint8_t*)(p + 1);
191 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE;
194 UINT16_TO_STREAM(pp, HCI_BLE_WRITE_SCAN_ENABLE);
195 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE);
197 UINT8_TO_STREAM(pp, scan_enable);
198 UINT8_TO_STREAM(pp, duplicate);
200 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
203 /* link layer connection management commands */
204 void btsnd_hcic_ble_create_ll_conn(
205 uint16_t scan_int, uint16_t scan_win, uint8_t init_filter_policy,
206 uint8_t addr_type_peer, const RawAddress& bda_peer, uint8_t addr_type_own,
207 uint16_t conn_int_min, uint16_t conn_int_max, uint16_t conn_latency,
208 uint16_t conn_timeout, uint16_t min_ce_len, uint16_t max_ce_len) {
209 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
210 uint8_t* pp = (uint8_t*)(p + 1);
212 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN;
215 UINT16_TO_STREAM(pp, HCI_BLE_CREATE_LL_CONN);
216 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN);
218 UINT16_TO_STREAM(pp, scan_int);
219 UINT16_TO_STREAM(pp, scan_win);
220 UINT8_TO_STREAM(pp, init_filter_policy);
222 UINT8_TO_STREAM(pp, addr_type_peer);
223 BDADDR_TO_STREAM(pp, bda_peer);
224 UINT8_TO_STREAM(pp, addr_type_own);
226 UINT16_TO_STREAM(pp, conn_int_min);
227 UINT16_TO_STREAM(pp, conn_int_max);
228 UINT16_TO_STREAM(pp, conn_latency);
229 UINT16_TO_STREAM(pp, conn_timeout);
231 UINT16_TO_STREAM(pp, min_ce_len);
232 UINT16_TO_STREAM(pp, max_ce_len);
234 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
237 void btsnd_hcic_ble_create_conn_cancel(void) {
238 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
239 uint8_t* pp = (uint8_t*)(p + 1);
241 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL;
244 UINT16_TO_STREAM(pp, HCI_BLE_CREATE_CONN_CANCEL);
245 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL);
247 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
250 void btsnd_hcic_ble_clear_white_list(void) {
251 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
252 uint8_t* pp = (uint8_t*)(p + 1);
254 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CLEAR_WHITE_LIST;
257 UINT16_TO_STREAM(pp, HCI_BLE_CLEAR_WHITE_LIST);
258 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CLEAR_WHITE_LIST);
260 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
263 void btsnd_hcic_ble_add_white_list(uint8_t addr_type, const RawAddress& bda) {
264 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
265 uint8_t* pp = (uint8_t*)(p + 1);
267 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ADD_WHITE_LIST;
270 UINT16_TO_STREAM(pp, HCI_BLE_ADD_WHITE_LIST);
271 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ADD_WHITE_LIST);
273 UINT8_TO_STREAM(pp, addr_type);
274 BDADDR_TO_STREAM(pp, bda);
276 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
279 void btsnd_hcic_ble_remove_from_white_list(uint8_t addr_type,
280 const RawAddress& bda) {
281 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
282 uint8_t* pp = (uint8_t*)(p + 1);
284 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REMOVE_WHITE_LIST;
287 UINT16_TO_STREAM(pp, HCI_BLE_REMOVE_WHITE_LIST);
288 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REMOVE_WHITE_LIST);
290 UINT8_TO_STREAM(pp, addr_type);
291 BDADDR_TO_STREAM(pp, bda);
293 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
296 void btsnd_hcic_ble_upd_ll_conn_params(uint16_t handle, uint16_t conn_int_min,
297 uint16_t conn_int_max,
298 uint16_t conn_latency,
299 uint16_t conn_timeout,
301 uint16_t max_ce_len) {
302 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
303 uint8_t* pp = (uint8_t*)(p + 1);
305 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS;
308 UINT16_TO_STREAM(pp, HCI_BLE_UPD_LL_CONN_PARAMS);
309 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS);
311 UINT16_TO_STREAM(pp, handle);
313 UINT16_TO_STREAM(pp, conn_int_min);
314 UINT16_TO_STREAM(pp, conn_int_max);
315 UINT16_TO_STREAM(pp, conn_latency);
316 UINT16_TO_STREAM(pp, conn_timeout);
317 UINT16_TO_STREAM(pp, min_ce_len);
318 UINT16_TO_STREAM(pp, max_ce_len);
320 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
323 void btsnd_hcic_ble_set_host_chnl_class(
324 uint8_t chnl_map[HCIC_BLE_CHNL_MAP_SIZE]) {
325 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
326 uint8_t* pp = (uint8_t*)(p + 1);
328 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS;
331 UINT16_TO_STREAM(pp, HCI_BLE_SET_HOST_CHNL_CLASS);
332 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS);
334 ARRAY_TO_STREAM(pp, chnl_map, HCIC_BLE_CHNL_MAP_SIZE);
336 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
339 void btsnd_hcic_ble_read_chnl_map(uint16_t handle) {
340 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
341 uint8_t* pp = (uint8_t*)(p + 1);
343 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CHNL_MAP;
346 UINT16_TO_STREAM(pp, HCI_BLE_READ_CHNL_MAP);
347 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CHNL_MAP);
349 UINT16_TO_STREAM(pp, handle);
351 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
354 void btsnd_hcic_ble_read_remote_feat(uint16_t handle) {
355 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
356 uint8_t* pp = (uint8_t*)(p + 1);
358 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT;
361 UINT16_TO_STREAM(pp, HCI_BLE_READ_REMOTE_FEAT);
362 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT);
364 UINT16_TO_STREAM(pp, handle);
366 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
369 /* security management commands */
370 void btsnd_hcic_ble_encrypt(uint8_t* key, uint8_t key_len, uint8_t* plain_text,
371 uint8_t pt_len, void* p_cmd_cplt_cback) {
372 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
373 uint8_t* pp = (uint8_t*)(p + 1);
375 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENCRYPT;
376 p->offset = sizeof(void*);
379 p_cmd_cplt_cback; /* Store command complete callback in buffer */
380 pp += sizeof(void*); /* Skip over callback pointer */
382 UINT16_TO_STREAM(pp, HCI_BLE_ENCRYPT);
383 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ENCRYPT);
385 memset(pp, 0, HCIC_PARAM_SIZE_BLE_ENCRYPT);
387 if (key_len > HCIC_BLE_ENCRYT_KEY_SIZE) key_len = HCIC_BLE_ENCRYT_KEY_SIZE;
388 if (pt_len > HCIC_BLE_ENCRYT_KEY_SIZE) pt_len = HCIC_BLE_ENCRYT_KEY_SIZE;
390 ARRAY_TO_STREAM(pp, key, key_len);
391 pp += (HCIC_BLE_ENCRYT_KEY_SIZE - key_len);
392 ARRAY_TO_STREAM(pp, plain_text, pt_len);
394 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
397 void btsnd_hcic_ble_rand(base::Callback<void(BT_OCTET8)> cb) {
398 btu_hcif_send_cmd_with_cb(FROM_HERE, HCI_BLE_RAND, nullptr, 0,
400 [](base::Callback<void(BT_OCTET8)> cb,
401 uint8_t* param, uint16_t param_len) {
403 "LE Rand return status is not zero: %u", param[0]);
404 cb.Run(param + 1 /* skip status */);
409 void btsnd_hcic_ble_start_enc(uint16_t handle,
410 uint8_t rand[HCIC_BLE_RAND_DI_SIZE],
412 uint8_t ltk[HCIC_BLE_ENCRYT_KEY_SIZE]) {
413 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
414 uint8_t* pp = (uint8_t*)(p + 1);
416 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_START_ENC;
419 UINT16_TO_STREAM(pp, HCI_BLE_START_ENC);
420 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_START_ENC);
422 UINT16_TO_STREAM(pp, handle);
423 ARRAY_TO_STREAM(pp, rand, HCIC_BLE_RAND_DI_SIZE);
424 UINT16_TO_STREAM(pp, ediv);
425 ARRAY_TO_STREAM(pp, ltk, HCIC_BLE_ENCRYT_KEY_SIZE);
427 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
430 void btsnd_hcic_ble_ltk_req_reply(uint16_t handle,
431 uint8_t ltk[HCIC_BLE_ENCRYT_KEY_SIZE]) {
432 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
433 uint8_t* pp = (uint8_t*)(p + 1);
435 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LTK_REQ_REPLY;
438 UINT16_TO_STREAM(pp, HCI_BLE_LTK_REQ_REPLY);
439 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LTK_REQ_REPLY);
441 UINT16_TO_STREAM(pp, handle);
442 ARRAY_TO_STREAM(pp, ltk, HCIC_BLE_ENCRYT_KEY_SIZE);
444 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
447 void btsnd_hcic_ble_ltk_req_neg_reply(uint16_t handle) {
448 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
449 uint8_t* pp = (uint8_t*)(p + 1);
451 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY;
454 UINT16_TO_STREAM(pp, HCI_BLE_LTK_REQ_NEG_REPLY);
455 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY);
457 UINT16_TO_STREAM(pp, handle);
459 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
462 void btsnd_hcic_ble_receiver_test(uint8_t rx_freq) {
463 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
464 uint8_t* pp = (uint8_t*)(p + 1);
466 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
469 UINT16_TO_STREAM(pp, HCI_BLE_RECEIVER_TEST);
470 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
472 UINT8_TO_STREAM(pp, rx_freq);
474 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
477 void btsnd_hcic_ble_transmitter_test(uint8_t tx_freq, uint8_t test_data_len,
479 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
480 uint8_t* pp = (uint8_t*)(p + 1);
482 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM3;
485 UINT16_TO_STREAM(pp, HCI_BLE_TRANSMITTER_TEST);
486 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM3);
488 UINT8_TO_STREAM(pp, tx_freq);
489 UINT8_TO_STREAM(pp, test_data_len);
490 UINT8_TO_STREAM(pp, payload);
492 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
495 void btsnd_hcic_ble_test_end(void) {
496 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
497 uint8_t* pp = (uint8_t*)(p + 1);
499 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
502 UINT16_TO_STREAM(pp, HCI_BLE_TEST_END);
503 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
505 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
508 void btsnd_hcic_ble_read_host_supported(void) {
509 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
510 uint8_t* pp = (uint8_t*)(p + 1);
512 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
515 UINT16_TO_STREAM(pp, HCI_READ_LE_HOST_SUPPORT);
516 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
518 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
521 #if (BLE_LLT_INCLUDED == TRUE)
523 void btsnd_hcic_ble_rc_param_req_reply(uint16_t handle, uint16_t conn_int_min,
524 uint16_t conn_int_max,
525 uint16_t conn_latency,
526 uint16_t conn_timeout,
528 uint16_t max_ce_len) {
529 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
530 uint8_t* pp = (uint8_t*)(p + 1);
532 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY;
535 UINT16_TO_STREAM(pp, HCI_BLE_RC_PARAM_REQ_REPLY);
536 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY);
538 UINT16_TO_STREAM(pp, handle);
539 UINT16_TO_STREAM(pp, conn_int_min);
540 UINT16_TO_STREAM(pp, conn_int_max);
541 UINT16_TO_STREAM(pp, conn_latency);
542 UINT16_TO_STREAM(pp, conn_timeout);
543 UINT16_TO_STREAM(pp, min_ce_len);
544 UINT16_TO_STREAM(pp, max_ce_len);
546 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
549 void btsnd_hcic_ble_rc_param_req_neg_reply(uint16_t handle, uint8_t reason) {
550 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
551 uint8_t* pp = (uint8_t*)(p + 1);
553 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY;
556 UINT16_TO_STREAM(pp, HCI_BLE_RC_PARAM_REQ_NEG_REPLY);
557 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY);
559 UINT16_TO_STREAM(pp, handle);
560 UINT8_TO_STREAM(pp, reason);
562 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
566 void btsnd_hcic_ble_add_device_resolving_list(
567 uint8_t addr_type_peer, const RawAddress& bda_peer,
568 uint8_t irk_peer[HCIC_BLE_IRK_SIZE], uint8_t irk_local[HCIC_BLE_IRK_SIZE]) {
569 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
570 uint8_t* pp = (uint8_t*)(p + 1);
572 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST;
575 UINT16_TO_STREAM(pp, HCI_BLE_ADD_DEV_RESOLVING_LIST);
576 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST);
577 UINT8_TO_STREAM(pp, addr_type_peer);
578 BDADDR_TO_STREAM(pp, bda_peer);
579 ARRAY_TO_STREAM(pp, irk_peer, HCIC_BLE_ENCRYT_KEY_SIZE);
580 ARRAY_TO_STREAM(pp, irk_local, HCIC_BLE_ENCRYT_KEY_SIZE);
582 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
585 void btsnd_hcic_ble_rm_device_resolving_list(uint8_t addr_type_peer,
586 const RawAddress& bda_peer) {
587 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
588 uint8_t* pp = (uint8_t*)(p + 1);
590 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST;
593 UINT16_TO_STREAM(pp, HCI_BLE_RM_DEV_RESOLVING_LIST);
594 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST);
595 UINT8_TO_STREAM(pp, addr_type_peer);
596 BDADDR_TO_STREAM(pp, bda_peer);
598 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
601 void btsnd_hcic_ble_set_privacy_mode(uint8_t addr_type_peer,
602 const RawAddress& bda_peer,
603 uint8_t privacy_type) {
604 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
605 uint8_t* pp = (uint8_t*)(p + 1);
607 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_PRIVACY_MODE;
610 UINT16_TO_STREAM(pp, HCI_BLE_SET_PRIVACY_MODE);
611 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_PRIVACY_MODE);
612 UINT8_TO_STREAM(pp, addr_type_peer);
613 BDADDR_TO_STREAM(pp, bda_peer);
614 UINT8_TO_STREAM(pp, privacy_type);
616 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
619 void btsnd_hcic_ble_clear_resolving_list(void) {
620 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
621 uint8_t* pp = (uint8_t*)(p + 1);
623 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST;
626 UINT16_TO_STREAM(pp, HCI_BLE_CLEAR_RESOLVING_LIST);
627 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST);
629 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
632 void btsnd_hcic_ble_read_resolvable_addr_peer(uint8_t addr_type_peer,
633 const RawAddress& bda_peer) {
634 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
635 uint8_t* pp = (uint8_t*)(p + 1);
637 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER;
640 UINT16_TO_STREAM(pp, HCI_BLE_READ_RESOLVABLE_ADDR_PEER);
641 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER);
642 UINT8_TO_STREAM(pp, addr_type_peer);
643 BDADDR_TO_STREAM(pp, bda_peer);
645 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
648 void btsnd_hcic_ble_read_resolvable_addr_local(uint8_t addr_type_peer,
649 const RawAddress& bda_peer) {
650 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
651 uint8_t* pp = (uint8_t*)(p + 1);
653 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL;
656 UINT16_TO_STREAM(pp, HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL);
657 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL);
658 UINT8_TO_STREAM(pp, addr_type_peer);
659 BDADDR_TO_STREAM(pp, bda_peer);
661 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
664 void btsnd_hcic_ble_set_addr_resolution_enable(uint8_t addr_resolution_enable) {
665 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
666 uint8_t* pp = (uint8_t*)(p + 1);
668 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE;
671 UINT16_TO_STREAM(pp, HCI_BLE_SET_ADDR_RESOLUTION_ENABLE);
672 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE);
673 UINT8_TO_STREAM(pp, addr_resolution_enable);
675 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
678 void btsnd_hcic_ble_set_rand_priv_addr_timeout(uint16_t rpa_timout) {
679 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
680 uint8_t* pp = (uint8_t*)(p + 1);
682 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT;
685 UINT16_TO_STREAM(pp, HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT);
686 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT);
687 UINT16_TO_STREAM(pp, rpa_timout);
689 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
692 void btsnd_hcic_ble_set_data_length(uint16_t conn_handle, uint16_t tx_octets,
694 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
695 uint8_t* pp = (uint8_t*)(p + 1);
697 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH;
700 UINT16_TO_STREAM(pp, HCI_BLE_SET_DATA_LENGTH);
701 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH);
703 UINT16_TO_STREAM(pp, conn_handle);
704 UINT16_TO_STREAM(pp, tx_octets);
705 UINT16_TO_STREAM(pp, tx_time);
707 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
710 void btsnd_hcic_ble_enh_rx_test(uint8_t rx_chan, uint8_t phy,
712 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
713 uint8_t* pp = (uint8_t*)(p + 1);
715 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENH_RX_TEST;
718 UINT16_TO_STREAM(pp, HCI_BLE_ENH_RECEIVER_TEST);
719 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ENH_RX_TEST);
721 UINT8_TO_STREAM(pp, rx_chan);
722 UINT8_TO_STREAM(pp, phy);
723 UINT8_TO_STREAM(pp, mod_index);
725 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
728 void btsnd_hcic_ble_enh_tx_test(uint8_t tx_chan, uint8_t data_len,
729 uint8_t payload, uint8_t phy) {
730 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
731 uint8_t* pp = (uint8_t*)(p + 1);
733 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_ENH_TX_TEST;
736 UINT16_TO_STREAM(pp, HCI_BLE_ENH_TRANSMITTER_TEST);
737 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_BLE_ENH_TX_TEST);
738 UINT8_TO_STREAM(pp, tx_chan);
739 UINT8_TO_STREAM(pp, data_len);
740 UINT8_TO_STREAM(pp, payload);
741 UINT8_TO_STREAM(pp, phy);
743 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
746 void btsnd_hcic_ble_set_extended_scan_params(uint8_t own_address_type,
747 uint8_t scanning_filter_policy,
748 uint8_t scanning_phys,
749 scanning_phy_cfg* phy_cfg) {
750 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
751 uint8_t* pp = (uint8_t*)(p + 1);
754 std::bitset<std::numeric_limits<uint8_t>::digits>(scanning_phys).count();
756 uint16_t param_len = 3 + (5 * phy_cnt);
757 p->len = HCIC_PREAMBLE_SIZE + param_len;
760 UINT16_TO_STREAM(pp, HCI_LE_SET_EXTENDED_SCAN_PARAMETERS);
761 UINT8_TO_STREAM(pp, param_len);
763 UINT8_TO_STREAM(pp, own_address_type);
764 UINT8_TO_STREAM(pp, scanning_filter_policy);
765 UINT8_TO_STREAM(pp, scanning_phys);
767 for (int i = 0; i < phy_cnt; i++) {
768 UINT8_TO_STREAM(pp, phy_cfg[i].scan_type);
769 UINT16_TO_STREAM(pp, phy_cfg[i].scan_int);
770 UINT16_TO_STREAM(pp, phy_cfg[i].scan_win);
773 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
776 void btsnd_hcic_ble_set_extended_scan_enable(uint8_t enable,
777 uint8_t filter_duplicates,
780 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
781 uint8_t* pp = (uint8_t*)(p + 1);
783 const int param_len = 6;
784 p->len = HCIC_PREAMBLE_SIZE + param_len;
787 UINT16_TO_STREAM(pp, HCI_LE_SET_EXTENDED_SCAN_ENABLE);
788 UINT8_TO_STREAM(pp, param_len);
790 UINT8_TO_STREAM(pp, enable);
791 UINT8_TO_STREAM(pp, filter_duplicates);
792 UINT16_TO_STREAM(pp, duration);
793 UINT16_TO_STREAM(pp, period);
795 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
798 void btsnd_hcic_ble_ext_create_conn(uint8_t init_filter_policy,
799 uint8_t addr_type_own,
800 uint8_t addr_type_peer,
801 const RawAddress& bda_peer,
802 uint8_t initiating_phys,
803 EXT_CONN_PHY_CFG* phy_cfg) {
804 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
805 uint8_t* pp = (uint8_t*)(p + 1);
808 std::bitset<std::numeric_limits<uint8_t>::digits>(initiating_phys)
811 /* param_len = initial_params + size_per_channel * num_of_channels */
812 uint8_t param_len = 10 + (16 * phy_cnt);
814 p->len = HCIC_PREAMBLE_SIZE + param_len;
817 UINT16_TO_STREAM(pp, HCI_LE_EXTENDED_CREATE_CONNECTION);
818 UINT8_TO_STREAM(pp, param_len);
820 UINT8_TO_STREAM(pp, init_filter_policy);
821 UINT8_TO_STREAM(pp, addr_type_own);
822 UINT8_TO_STREAM(pp, addr_type_peer);
823 BDADDR_TO_STREAM(pp, bda_peer);
825 UINT8_TO_STREAM(pp, initiating_phys);
827 for (int i = 0; i < phy_cnt; i++) {
828 UINT16_TO_STREAM(pp, phy_cfg[i].scan_int);
829 UINT16_TO_STREAM(pp, phy_cfg[i].scan_win);
830 UINT16_TO_STREAM(pp, phy_cfg[i].conn_int_min);
831 UINT16_TO_STREAM(pp, phy_cfg[i].conn_int_max);
832 UINT16_TO_STREAM(pp, phy_cfg[i].conn_latency);
833 UINT16_TO_STREAM(pp, phy_cfg[i].sup_timeout);
834 UINT16_TO_STREAM(pp, phy_cfg[i].min_ce_len);
835 UINT16_TO_STREAM(pp, phy_cfg[i].max_ce_len);
838 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);