2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu/timer.h"
17 #include "qemu/error-report.h"
18 #include "qemu/main-loop.h"
19 #include "qom/object.h"
20 #include "qapi/error.h"
21 #include "sysemu/sysemu.h"
22 #include "sysemu/kvm.h"
23 #include "sysemu/kvm_int.h"
27 #include "internals.h"
28 #include "hw/pci/pci.h"
29 #include "exec/memattrs.h"
30 #include "exec/address-spaces.h"
31 #include "hw/boards.h"
35 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
39 static bool cap_has_mp_state;
40 static bool cap_has_inject_serror_esr;
41 static bool cap_has_inject_ext_dabt;
43 static ARMHostCPUFeatures arm_host_cpu_features;
45 int kvm_arm_vcpu_init(CPUState *cs)
47 ARMCPU *cpu = ARM_CPU(cs);
48 struct kvm_vcpu_init init;
50 init.target = cpu->kvm_target;
51 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
53 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
56 int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
58 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
61 void kvm_arm_init_serror_injection(CPUState *cs)
63 cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
64 KVM_CAP_ARM_INJECT_SERROR_ESR);
67 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
69 struct kvm_vcpu_init *init)
71 int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
74 kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
78 max_vm_pa_size = ioctl(kvmfd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE);
79 if (max_vm_pa_size < 0) {
83 vmfd = ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size);
84 } while (vmfd == -1 && errno == EINTR);
88 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
94 /* Caller doesn't want the VCPU to be initialized, so skip it */
98 if (init->target == -1) {
99 struct kvm_vcpu_init preferred;
101 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
103 init->target = preferred.target;
107 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
111 } else if (cpus_to_try) {
112 /* Old kernel which doesn't know about the
113 * PREFERRED_TARGET ioctl: we know it will only support
114 * creating one kind of guest CPU which is its preferred
117 struct kvm_vcpu_init try;
119 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
120 try.target = *cpus_to_try++;
121 memcpy(try.features, init->features, sizeof(init->features));
122 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try);
130 init->target = try.target;
132 /* Treat a NULL cpus_to_try argument the same as an empty
133 * list, which means we will fail the call since this must
134 * be an old kernel which doesn't support PREFERRED_TARGET.
160 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
164 for (i = 2; i >= 0; i--) {
169 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
171 CPUARMState *env = &cpu->env;
173 if (!arm_host_cpu_features.dtb_compatible) {
174 if (!kvm_enabled() ||
175 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
176 /* We can't report this error yet, so flag that we need to
177 * in arm_cpu_realizefn().
179 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
180 cpu->host_cpu_probe_failed = true;
185 cpu->kvm_target = arm_host_cpu_features.target;
186 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
187 cpu->isar = arm_host_cpu_features.isar;
188 env->features = arm_host_cpu_features.features;
191 static bool kvm_no_adjvtime_get(Object *obj, Error **errp)
193 return !ARM_CPU(obj)->kvm_adjvtime;
196 static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp)
198 ARM_CPU(obj)->kvm_adjvtime = !value;
201 static bool kvm_steal_time_get(Object *obj, Error **errp)
203 return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
206 static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
208 ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
211 /* KVM VCPU properties should be prefixed with "kvm-". */
212 void kvm_arm_add_vcpu_properties(Object *obj)
214 ARMCPU *cpu = ARM_CPU(obj);
215 CPUARMState *env = &cpu->env;
217 if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
218 cpu->kvm_adjvtime = true;
219 object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get,
220 kvm_no_adjvtime_set);
221 object_property_set_description(obj, "kvm-no-adjvtime",
222 "Set on to disable the adjustment of "
223 "the virtual counter. VM stopped time "
227 cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
228 object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get,
230 object_property_set_description(obj, "kvm-steal-time",
231 "Set off to disable KVM steal time.");
234 bool kvm_arm_pmu_supported(void)
236 return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
239 int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
241 KVMState *s = KVM_STATE(ms->accelerator);
244 ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
245 *fixed_ipa = ret <= 0;
247 return ret > 0 ? ret : 40;
250 int kvm_arch_get_default_type(MachineState *ms)
255 int kvm_arch_init(MachineState *ms, KVMState *s)
258 /* For ARM interrupt delivery is always asynchronous,
259 * whether we are using an in-kernel VGIC or not.
261 kvm_async_interrupts_allowed = true;
264 * PSCI wakes up secondary cores, so we always need to
265 * have vCPUs waiting in kernel space
267 kvm_halt_in_kernel_allowed = true;
269 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
271 if (ms->smp.cpus > 256 &&
272 !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
273 error_report("Using more than 256 vcpus requires a host kernel "
274 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
278 if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
279 if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
280 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
282 /* Set status for supporting the external dabt injection */
283 cap_has_inject_ext_dabt = kvm_check_extension(s,
284 KVM_CAP_ARM_INJECT_EXT_DABT);
288 kvm_arm_init_debug(s);
293 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
295 return cpu->cpu_index;
298 /* We track all the KVM devices which need their memory addresses
299 * passing to the kernel in a list of these structures.
300 * When board init is complete we run through the list and
301 * tell the kernel the base addresses of the memory regions.
302 * We use a MemoryListener to track mapping and unmapping of
303 * the regions during board creation, so the board models don't
304 * need to do anything special for the KVM case.
306 * Sometimes the address must be OR'ed with some other fields
307 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
308 * @kda_addr_ormask aims at storing the value of those fields.
310 typedef struct KVMDevice {
311 struct kvm_arm_device_addr kda;
312 struct kvm_device_attr kdattr;
313 uint64_t kda_addr_ormask;
315 QSLIST_ENTRY(KVMDevice) entries;
319 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
321 static void kvm_arm_devlistener_add(MemoryListener *listener,
322 MemoryRegionSection *section)
326 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
327 if (section->mr == kd->mr) {
328 kd->kda.addr = section->offset_within_address_space;
333 static void kvm_arm_devlistener_del(MemoryListener *listener,
334 MemoryRegionSection *section)
338 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
339 if (section->mr == kd->mr) {
345 static MemoryListener devlistener = {
347 .region_add = kvm_arm_devlistener_add,
348 .region_del = kvm_arm_devlistener_del,
349 .priority = MEMORY_LISTENER_PRIORITY_MIN,
352 static void kvm_arm_set_device_addr(KVMDevice *kd)
354 struct kvm_device_attr *attr = &kd->kdattr;
357 /* If the device control API is available and we have a device fd on the
358 * KVMDevice struct, let's use the newer API
360 if (kd->dev_fd >= 0) {
361 uint64_t addr = kd->kda.addr;
363 addr |= kd->kda_addr_ormask;
364 attr->addr = (uintptr_t)&addr;
365 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
367 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
371 fprintf(stderr, "Failed to set device address: %s\n",
377 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
381 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
382 if (kd->kda.addr != -1) {
383 kvm_arm_set_device_addr(kd);
385 memory_region_unref(kd->mr);
386 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
389 memory_listener_unregister(&devlistener);
392 static Notifier notify = {
393 .notify = kvm_arm_machine_init_done,
396 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
397 uint64_t attr, int dev_fd, uint64_t addr_ormask)
401 if (!kvm_irqchip_in_kernel()) {
405 if (QSLIST_EMPTY(&kvm_devices_head)) {
406 memory_listener_register(&devlistener, &address_space_memory);
407 qemu_add_machine_init_done_notifier(¬ify);
409 kd = g_new0(KVMDevice, 1);
413 kd->kdattr.flags = 0;
414 kd->kdattr.group = group;
415 kd->kdattr.attr = attr;
417 kd->kda_addr_ormask = addr_ormask;
418 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
419 memory_region_ref(kd->mr);
422 static int compare_u64(const void *a, const void *b)
424 if (*(uint64_t *)a > *(uint64_t *)b) {
427 if (*(uint64_t *)a < *(uint64_t *)b) {
434 * cpreg_values are sorted in ascending order by KVM register ID
435 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
436 * the storage for a KVM register by ID with a binary search.
438 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
442 res = bsearch(®idx, cpu->cpreg_indexes, cpu->cpreg_array_len,
443 sizeof(uint64_t), compare_u64);
446 return &cpu->cpreg_values[res - cpu->cpreg_indexes];
449 /* Initialize the ARMCPU cpreg list according to the kernel's
450 * definition of what CPU registers it knows about (and throw away
451 * the previous TCG-created cpreg list).
453 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
455 struct kvm_reg_list rl;
456 struct kvm_reg_list *rlp;
457 int i, ret, arraylen;
458 CPUState *cs = CPU(cpu);
461 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
465 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
467 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
471 /* Sort the list we get back from the kernel, since cpreg_tuples
472 * must be in strictly ascending order.
474 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
476 for (i = 0, arraylen = 0; i < rlp->n; i++) {
477 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
480 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
481 case KVM_REG_SIZE_U32:
482 case KVM_REG_SIZE_U64:
485 fprintf(stderr, "Can't handle size of register in kernel list\n");
493 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
494 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
495 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
497 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
499 cpu->cpreg_array_len = arraylen;
500 cpu->cpreg_vmstate_array_len = arraylen;
502 for (i = 0, arraylen = 0; i < rlp->n; i++) {
503 uint64_t regidx = rlp->reg[i];
504 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
507 cpu->cpreg_indexes[arraylen] = regidx;
510 assert(cpu->cpreg_array_len == arraylen);
512 if (!write_kvmstate_to_list(cpu)) {
513 /* Shouldn't happen unless kernel is inconsistent about
514 * what registers exist.
516 fprintf(stderr, "Initial read of kernel register state failed\n");
526 bool write_kvmstate_to_list(ARMCPU *cpu)
528 CPUState *cs = CPU(cpu);
532 for (i = 0; i < cpu->cpreg_array_len; i++) {
533 struct kvm_one_reg r;
534 uint64_t regidx = cpu->cpreg_indexes[i];
540 switch (regidx & KVM_REG_SIZE_MASK) {
541 case KVM_REG_SIZE_U32:
542 r.addr = (uintptr_t)&v32;
543 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
545 cpu->cpreg_values[i] = v32;
548 case KVM_REG_SIZE_U64:
549 r.addr = (uintptr_t)(cpu->cpreg_values + i);
550 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
553 g_assert_not_reached();
562 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
564 CPUState *cs = CPU(cpu);
568 for (i = 0; i < cpu->cpreg_array_len; i++) {
569 struct kvm_one_reg r;
570 uint64_t regidx = cpu->cpreg_indexes[i];
574 if (kvm_arm_cpreg_level(regidx) > level) {
579 switch (regidx & KVM_REG_SIZE_MASK) {
580 case KVM_REG_SIZE_U32:
581 v32 = cpu->cpreg_values[i];
582 r.addr = (uintptr_t)&v32;
584 case KVM_REG_SIZE_U64:
585 r.addr = (uintptr_t)(cpu->cpreg_values + i);
588 g_assert_not_reached();
590 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
592 /* We might fail for "unknown register" and also for
593 * "you tried to set a register which is constant with
594 * a different value from what it actually contains".
602 void kvm_arm_cpu_pre_save(ARMCPU *cpu)
604 /* KVM virtual time adjustment */
605 if (cpu->kvm_vtime_dirty) {
606 *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime;
610 void kvm_arm_cpu_post_load(ARMCPU *cpu)
612 /* KVM virtual time adjustment */
613 if (cpu->kvm_adjvtime) {
614 cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT);
615 cpu->kvm_vtime_dirty = true;
619 void kvm_arm_reset_vcpu(ARMCPU *cpu)
623 /* Re-init VCPU so that all registers are set to
624 * their respective reset values.
626 ret = kvm_arm_vcpu_init(CPU(cpu));
628 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
631 if (!write_kvmstate_to_list(cpu)) {
632 fprintf(stderr, "write_kvmstate_to_list failed\n");
636 * Sync the reset values also into the CPUState. This is necessary
637 * because the next thing we do will be a kvm_arch_put_registers()
638 * which will update the list values from the CPUState before copying
639 * the list values back to KVM. It's OK to ignore failure returns here
640 * for the same reason we do so in kvm_arch_get_registers().
642 write_list_to_cpustate(cpu);
646 * Update KVM's MP_STATE based on what QEMU thinks it is
648 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
650 if (cap_has_mp_state) {
651 struct kvm_mp_state mp_state = {
652 .mp_state = (cpu->power_state == PSCI_OFF) ?
653 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
655 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
657 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
658 __func__, ret, strerror(-ret));
667 * Sync the KVM MP_STATE into QEMU
669 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
671 if (cap_has_mp_state) {
672 struct kvm_mp_state mp_state;
673 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
675 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
676 __func__, ret, strerror(-ret));
679 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
686 void kvm_arm_get_virtual_time(CPUState *cs)
688 ARMCPU *cpu = ARM_CPU(cs);
689 struct kvm_one_reg reg = {
690 .id = KVM_REG_ARM_TIMER_CNT,
691 .addr = (uintptr_t)&cpu->kvm_vtime,
695 if (cpu->kvm_vtime_dirty) {
699 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
701 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
705 cpu->kvm_vtime_dirty = true;
708 void kvm_arm_put_virtual_time(CPUState *cs)
710 ARMCPU *cpu = ARM_CPU(cs);
711 struct kvm_one_reg reg = {
712 .id = KVM_REG_ARM_TIMER_CNT,
713 .addr = (uintptr_t)&cpu->kvm_vtime,
717 if (!cpu->kvm_vtime_dirty) {
721 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
723 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
727 cpu->kvm_vtime_dirty = false;
730 int kvm_put_vcpu_events(ARMCPU *cpu)
732 CPUARMState *env = &cpu->env;
733 struct kvm_vcpu_events events;
736 if (!kvm_has_vcpu_events()) {
740 memset(&events, 0, sizeof(events));
741 events.exception.serror_pending = env->serror.pending;
743 /* Inject SError to guest with specified syndrome if host kernel
744 * supports it, otherwise inject SError without syndrome.
746 if (cap_has_inject_serror_esr) {
747 events.exception.serror_has_esr = env->serror.has_esr;
748 events.exception.serror_esr = env->serror.esr;
751 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
753 error_report("failed to put vcpu events");
759 int kvm_get_vcpu_events(ARMCPU *cpu)
761 CPUARMState *env = &cpu->env;
762 struct kvm_vcpu_events events;
765 if (!kvm_has_vcpu_events()) {
769 memset(&events, 0, sizeof(events));
770 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
772 error_report("failed to get vcpu events");
776 env->serror.pending = events.exception.serror_pending;
777 env->serror.has_esr = events.exception.serror_has_esr;
778 env->serror.esr = events.exception.serror_esr;
783 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
785 ARMCPU *cpu = ARM_CPU(cs);
786 CPUARMState *env = &cpu->env;
788 if (unlikely(env->ext_dabt_raised)) {
790 * Verifying that the ext DABT has been properly injected,
791 * otherwise risking indefinitely re-running the faulting instruction
792 * Covering a very narrow case for kernels 5.5..5.5.4
793 * when injected abort was misconfigured to be
794 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
796 if (!arm_feature(env, ARM_FEATURE_AARCH64) &&
797 unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) {
799 error_report("Data abort exception with no valid ISS generated by "
800 "guest memory access. KVM unable to emulate faulting "
801 "instruction. Failed to inject an external data abort "
805 /* Clear the status */
806 env->ext_dabt_raised = 0;
810 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
813 uint32_t switched_level;
815 if (kvm_irqchip_in_kernel()) {
817 * We only need to sync timer states with user-space interrupt
818 * controllers, so return early and save cycles if we don't.
820 return MEMTXATTRS_UNSPECIFIED;
825 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
826 if (run->s.regs.device_irq_level != cpu->device_irq_level) {
827 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
829 qemu_mutex_lock_iothread();
831 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
832 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
833 !!(run->s.regs.device_irq_level &
834 KVM_ARM_DEV_EL1_VTIMER));
835 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
838 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
839 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
840 !!(run->s.regs.device_irq_level &
841 KVM_ARM_DEV_EL1_PTIMER));
842 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
845 if (switched_level & KVM_ARM_DEV_PMU) {
846 qemu_set_irq(cpu->pmu_interrupt,
847 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
848 switched_level &= ~KVM_ARM_DEV_PMU;
851 if (switched_level) {
852 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
853 __func__, switched_level);
856 /* We also mark unknown levels as processed to not waste cycles */
857 cpu->device_irq_level = run->s.regs.device_irq_level;
858 qemu_mutex_unlock_iothread();
861 return MEMTXATTRS_UNSPECIFIED;
864 void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
866 CPUState *cs = opaque;
867 ARMCPU *cpu = ARM_CPU(cs);
870 if (cpu->kvm_adjvtime) {
871 kvm_arm_put_virtual_time(cs);
874 if (cpu->kvm_adjvtime) {
875 kvm_arm_get_virtual_time(cs);
881 * kvm_arm_handle_dabt_nisv:
883 * @esr_iss: ISS encoding (limited) for the exception from Data Abort
884 * ISV bit set to '0b0' -> no valid instruction syndrome
885 * @fault_ipa: faulting address for the synchronous data abort
887 * Returns: 0 if the exception has been handled, < 0 otherwise
889 static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
892 ARMCPU *cpu = ARM_CPU(cs);
893 CPUARMState *env = &cpu->env;
895 * Request KVM to inject the external data abort into the guest
897 if (cap_has_inject_ext_dabt) {
898 struct kvm_vcpu_events events = { };
900 * The external data abort event will be handled immediately by KVM
901 * using the address fault that triggered the exit on given VCPU.
902 * Requesting injection of the external data abort does not rely
903 * on any other VCPU state. Therefore, in this particular case, the VCPU
904 * synchronization can be exceptionally skipped.
906 events.exception.ext_dabt_pending = 1;
907 /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
908 if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
909 env->ext_dabt_raised = 1;
913 error_report("Data abort exception triggered by guest memory access "
914 "at physical address: 0x" TARGET_FMT_lx,
915 (target_ulong)fault_ipa);
916 error_printf("KVM unable to emulate faulting instruction.\n");
921 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
925 switch (run->exit_reason) {
927 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
929 } /* otherwise return to guest */
931 case KVM_EXIT_ARM_NISV:
932 /* External DABT with no valid iss to decode */
933 ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
934 run->arm_nisv.fault_ipa);
937 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
938 __func__, run->exit_reason);
944 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
949 int kvm_arch_process_async_events(CPUState *cs)
954 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
956 if (kvm_sw_breakpoints_active(cs)) {
957 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
959 if (kvm_arm_hw_debug_active(cs)) {
960 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
961 kvm_arm_copy_hw_debug_data(&dbg->arch);
965 void kvm_arch_init_irq_routing(KVMState *s)
969 int kvm_arch_irqchip_create(KVMState *s)
971 if (kvm_kernel_irqchip_split()) {
972 error_report("-machine kernel_irqchip=split is not supported on ARM.");
976 /* If we can create the VGIC using the newer device control API, we
977 * let the device do this when it initializes itself, otherwise we
978 * fall back to the old API */
979 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
982 int kvm_arm_vgic_probe(void)
986 if (kvm_create_device(kvm_state,
987 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
988 val |= KVM_ARM_VGIC_V3;
990 if (kvm_create_device(kvm_state,
991 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
992 val |= KVM_ARM_VGIC_V2;
997 int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
999 int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
1000 int cpu_idx1 = cpu % 256;
1001 int cpu_idx2 = cpu / 256;
1003 kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
1004 (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
1006 return kvm_set_irq(kvm_state, kvm_irq, !!level);
1009 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
1010 uint64_t address, uint32_t data, PCIDevice *dev)
1012 AddressSpace *as = pci_device_iommu_address_space(dev);
1013 hwaddr xlat, len, doorbell_gpa;
1014 MemoryRegionSection mrs;
1017 if (as == &address_space_memory) {
1021 /* MSI doorbell address is translated by an IOMMU */
1023 RCU_READ_LOCK_GUARD();
1025 mr = address_space_translate(as, address, &xlat, &len, true,
1026 MEMTXATTRS_UNSPECIFIED);
1032 mrs = memory_region_find(mr, xlat, 1);
1038 doorbell_gpa = mrs.offset_within_address_space;
1039 memory_region_unref(mrs.mr);
1041 route->u.msi.address_lo = doorbell_gpa;
1042 route->u.msi.address_hi = doorbell_gpa >> 32;
1044 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
1049 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
1050 int vector, PCIDevice *dev)
1055 int kvm_arch_release_virq_post(int virq)
1060 int kvm_arch_msi_data_to_gsi(uint32_t data)
1062 return (data - 32) & 0xffff;
1065 bool kvm_arch_cpu_check_are_resettable(void)
1070 void kvm_arch_accel_class_init(ObjectClass *oc)