4 * Copyright (c) 2019 Yoshinori Sato
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qemu/bitops.h"
23 #include "exec/cpu_ldst.h"
26 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte)
28 if (env->psw_pm == 0) {
29 env->psw_ipl = FIELD_EX32(psw, PSW, IPL);
31 /* PSW.PM can write RTE and RTFI */
32 env->psw_pm = FIELD_EX32(psw, PSW, PM);
34 env->psw_u = FIELD_EX32(psw, PSW, U);
35 env->psw_i = FIELD_EX32(psw, PSW, I);
37 env->psw_o = FIELD_EX32(psw, PSW, O) << 31;
38 env->psw_s = FIELD_EX32(psw, PSW, S) << 31;
39 env->psw_z = 1 - FIELD_EX32(psw, PSW, Z);
40 env->psw_c = FIELD_EX32(psw, PSW, C);
43 #ifndef CONFIG_USER_ONLY
45 #define INT_FLAGS (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR)
46 void rx_cpu_do_interrupt(CPUState *cs)
48 RXCPU *cpu = RX_CPU(cs);
49 CPURXState *env = &cpu->env;
50 int do_irq = cs->interrupt_request & INT_FLAGS;
56 env->usp = env->regs[0];
58 env->isp = env->regs[0];
60 save_psw = rx_cpu_pack_psw(env);
61 env->psw_pm = env->psw_i = env->psw_u = 0;
64 if (do_irq & CPU_INTERRUPT_FIR) {
69 cs->interrupt_request &= ~CPU_INTERRUPT_FIR;
70 qemu_set_irq(env->ack, env->ack_irq);
71 qemu_log_mask(CPU_LOG_INT, "fast interrupt raised\n");
72 } else if (do_irq & CPU_INTERRUPT_HARD) {
74 cpu_stl_data(env, env->isp, save_psw);
76 cpu_stl_data(env, env->isp, env->pc);
77 env->pc = cpu_ldl_data(env, env->intb + env->ack_irq * 4);
78 env->psw_ipl = env->ack_ipl;
79 cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
80 qemu_set_irq(env->ack, env->ack_irq);
81 qemu_log_mask(CPU_LOG_INT,
82 "interrupt 0x%02x raised\n", env->ack_irq);
85 uint32_t vec = cs->exception_index;
86 const char *expname = "unknown exception";
89 cpu_stl_data(env, env->isp, save_psw);
91 cpu_stl_data(env, env->isp, env->pc);
94 env->pc = cpu_ldl_data(env, 0xffffffc0 + vec * 4);
96 env->pc = cpu_ldl_data(env, env->intb + (vec & 0xff) * 4);
100 expname = "privilege violation";
103 expname = "access exception";
106 expname = "illegal instruction";
109 expname = "fpu exception";
112 expname = "non-maskable interrupt";
114 case 0x100 ... 0x1ff:
115 expname = "unconditional trap";
117 qemu_log_mask(CPU_LOG_INT, "exception 0x%02x [%s] raised\n",
118 (vec & 0xff), expname);
120 env->regs[0] = env->isp;
123 bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
125 RXCPU *cpu = RX_CPU(cs);
126 CPURXState *env = &cpu->env;
128 /* hardware interrupt (Normal) */
129 if ((interrupt_request & CPU_INTERRUPT_HARD) &&
130 env->psw_i && (env->psw_ipl < env->req_ipl)) {
131 env->ack_irq = env->req_irq;
132 env->ack_ipl = env->req_ipl;
135 /* hardware interrupt (FIR) */
136 if ((interrupt_request & CPU_INTERRUPT_FIR) &&
137 env->psw_i && (env->psw_ipl < 15)) {
141 rx_cpu_do_interrupt(cs);
147 hwaddr rx_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
152 #endif /* !CONFIG_USER_ONLY */